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/linux/tools/testing/selftests/arm64/abi/
H A Dsyscall-abi-asm.S11 // x0: SVE VL, 0 for FP only
33 .macro _ldr_za nw, nxbase, offset=0
34 .inst 0xe1000000 \
44 .macro _str_za nw, nxbase, offset=0
45 .inst 0xe1200000 \
57 .inst 0xe11f8000 \
58 | (((\nx) & 0x1f) << 5)
67 .inst 0xe13f8000 \
68 | (((\nx) & 0x1f) << 5)
85 adrp x2, svcr_i
[all...]
/linux/arch/powerpc/boot/dts/fsl/
H A Dmpc8568mds.dts22 reg = <0x0 0x0 0x0 0x0>;
26 reg = <0x0 0xe0005000 0x0 0x1000>;
27 ranges = <0x0 0x
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H A Dmpc8569mds.dts30 reg = <0x0 0xe0005000 0x0 0x1000>;
32 ranges = <0x0 0x0 0x0 0xfe000000 0x02000000
33 0x
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H A Dp1025twr.dtsi43 nor@0,0 {
47 reg = <0x0 0x0 0x4000000>;
51 partition@0 {
54 reg = <0x0 0x00040000>;
61 reg = <0x00040000 0x0004000
[all...]
H A Dp1025rdb.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x0004000
[all...]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8ulp-pinfunc.h13 #define MX8ULP_PAD_PTD0__PTD0 0x0000 0x0000 0x1 0x0
14 #define MX8ULP_PAD_PTD0__I2S6_RX_BCLK 0x0000 0x0B44 0x7 0x1
15 #define MX8ULP_PAD_PTD0__SDHC0_RESET_B 0x0000 0x000
[all...]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7ulp-pinfunc.h15 #define IMX7ULP_PAD_PTC0__PTC0 0x0000 0x0000 0x1 0x0
16 #define IMX7ULP_PAD_PTC0__TRACE_D15 0x0000 0x0000 0xa 0x0
17 #define IMX7ULP_PAD_PTC0__LPUART4_CTS_B 0x0000 0x024
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H A Dimx6sll-pinfunc.h15 #define MX6SLL_PAD_WDOG_B__WDOG1_B 0x0014 0x02DC 0x0000 0x0 0x0
16 #define MX6SLL_PAD_WDOG_B__WDOG1_RESET_B_DEB 0x0014 0x02DC 0x0000 0x1 0x
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H A Dimx6sl-pinfunc.h13 #define MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x04c 0x2a4 0x000 0x0 0x0
14 #define MX6SL_PAD_AUD_MCLK__PWM4_OUT 0x04c 0x2a4 0x000 0x1 0x
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H A Dimx7d-pinfunc.h14 #define MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0000 0x0030 0x0000 0x0 0x0
15 #define MX7D_PAD_LPSR_GPIO1_IO00__PWM4_OUT 0x0000 0x0030 0x0000 0x1 0x
[all...]
H A Dimxrt1050-pinfunc.h10 #define IMX_PAD_SION 0x40000000
17 #define MXRT1050_IOMUXC_GPIO_EMC_00_SEMC_DA00 0x014 0x204 0x000 0x0 0x0
18 #define MXRT1050_IOMUXC_GPIO_EMC_00_FLEXPWM4_PWM0_A 0x014 0x204 0x494 0x
[all...]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-serdes.h13 #define J721E_SERDES0_LANE0_QSGMII_LANE1 0x0
14 #define J721E_SERDES0_LANE0_PCIE0_LANE0 0x1
15 #define J721E_SERDES0_LANE0_USB3_0_SWAP 0x2
16 #define J721E_SERDES0_LANE0_IP4_UNUSED 0x3
18 #define J721E_SERDES0_LANE1_QSGMII_LANE2 0x0
19 #define J721E_SERDES0_LANE1_PCIE0_LANE1 0x1
20 #define J721E_SERDES0_LANE1_USB3_0 0x2
21 #define J721E_SERDES0_LANE1_IP4_UNUSED 0x
[all...]
/linux/include/dt-bindings/mux/
H A Dti-serdes.h19 #define J721E_SERDES0_LANE0_QSGMII_LANE1 0x0
20 #define J721E_SERDES0_LANE0_PCIE0_LANE0 0x1
21 #define J721E_SERDES0_LANE0_USB3_0_SWAP 0x2
22 #define J721E_SERDES0_LANE0_IP4_UNUSED 0x3
24 #define J721E_SERDES0_LANE1_QSGMII_LANE2 0x0
25 #define J721E_SERDES0_LANE1_PCIE0_LANE1 0x1
26 #define J721E_SERDES0_LANE1_USB3_0 0x2
27 #define J721E_SERDES0_LANE1_IP4_UNUSED 0x
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/linux/drivers/pinctrl/sunxi/
H A Dpinctrl-sun8i-h3.c23 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
24 SUNXI_FUNCTION(0x0, "gpio_in"),
25 SUNXI_FUNCTION(0x1, "gpio_out"),
26 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
27 SUNXI_FUNCTION(0x3, "jtag"), /* MS */
28 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PA_EINT0 */
30 SUNXI_FUNCTION(0x
[all...]
H A Dpinctrl-sun8i-a33.c24 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
25 SUNXI_FUNCTION(0x0, "gpio_in"),
26 SUNXI_FUNCTION(0x1, "gpio_out"),
27 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
28 SUNXI_FUNCTION(0x3, "uart0"), /* TX */
29 SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 0)), /* PB_EINT0 */
31 SUNXI_FUNCTION(0x
[all...]
H A Dpinctrl-sun8i-a23.c25 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
26 SUNXI_FUNCTION(0x0, "gpio_in"),
27 SUNXI_FUNCTION(0x1, "gpio_out"),
28 SUNXI_FUNCTION(0x2, "spi1"), /* CS */
29 SUNXI_FUNCTION(0x3, "jtag"), /* MS0 */
30 SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 0)), /* PA_EINT0 */
32 SUNXI_FUNCTION(0x
[all...]
H A Dpinctrl-sun6i-a31.c20 #define PINCTRL_SUN6I_A31 BIT(0)
24 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
25 SUNXI_FUNCTION(0x0, "gpio_in"),
26 SUNXI_FUNCTION(0x1, "gpio_out"),
27 SUNXI_FUNCTION(0x2, "gmac"), /* TXD0 */
28 SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
30 SUNXI_FUNCTION(0x4, "uart1"), /* DTR */
31 SUNXI_FUNCTION_IRQ_BANK(0x6, 0,
[all...]
H A Dpinctrl-sun9i-a80.c21 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
22 SUNXI_FUNCTION(0x0, "gpio_in"),
23 SUNXI_FUNCTION(0x1, "gpio_out"),
24 SUNXI_FUNCTION(0x2, "gmac"), /* RXD3 */
25 SUNXI_FUNCTION(0x4, "uart1"), /* TX */
26 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PA_EINT0 */
28 SUNXI_FUNCTION(0x
[all...]
H A Dpinctrl-sun8i-a83t.c24 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
25 SUNXI_FUNCTION(0x0, "gpio_in"),
26 SUNXI_FUNCTION(0x1, "gpio_out"),
27 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
28 SUNXI_FUNCTION(0x3, "jtag"), /* MS0 */
29 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PB_EINT0 */
31 SUNXI_FUNCTION(0x
[all...]
H A Dpinctrl-sun8i-v3s.c25 #define PINCTRL_SUN8I_V3 BIT(0)
30 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
31 SUNXI_FUNCTION(0x0, "gpio_in"),
32 SUNXI_FUNCTION(0x1, "gpio_out"),
33 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
34 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PB_EINT0 */
36 SUNXI_FUNCTION(0x
[all...]
H A Dpinctrl-sun50i-h6.c16 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
17 SUNXI_FUNCTION(0x2, "emac")), /* ERXD1 */
19 SUNXI_FUNCTION(0x2, "emac")), /* ERXD0 */
21 SUNXI_FUNCTION(0x2, "emac")), /* ECRS_DV */
23 SUNXI_FUNCTION(0x2, "emac")), /* ERXERR */
25 SUNXI_FUNCTION(0x
[all...]
H A Dpinctrl-sun5i.c19 #define PINCTRL_SUN5I_A10S BIT(0)
24 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 0),
26 SUNXI_FUNCTION(0x0, "gpio_in"),
27 SUNXI_FUNCTION(0x1, "gpio_out"),
28 SUNXI_FUNCTION(0x2, "emac"), /* ERXD3 */
29 SUNXI_FUNCTION(0x3, "ts0"), /* CLK */
30 SUNXI_FUNCTION(0x5, "keypad")), /* IN0 */
33 SUNXI_FUNCTION(0x0, "gpio_in"),
34 SUNXI_FUNCTION(0x
[all...]
H A Dpinctrl-sun50i-a64.c23 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
24 SUNXI_FUNCTION(0x0, "gpio_in"),
25 SUNXI_FUNCTION(0x1, "gpio_out"),
26 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
27 SUNXI_FUNCTION(0x4, "jtag"), /* MS0 */
28 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* EINT0 */
30 SUNXI_FUNCTION(0x
[all...]
/linux/drivers/pinctrl/berlin/
H A Dberlin-bg2.c20 BERLIN_PINCTRL_GROUP("G0", 0x00, 0x1, 0x00,
21 BERLIN_PINCTRL_FUNCTION(0x0, "spi1"), /* SS0n */
22 BERLIN_PINCTRL_FUNCTION(0x1, "gpio")),
23 BERLIN_PINCTRL_GROUP("G1", 0x00, 0x2, 0x01,
24 BERLIN_PINCTRL_FUNCTION(0x
[all...]
/linux/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/
H A Dmlx5_ifc_dr_ste_v1.h8 MLX5_MODIFY_HEADER_V1_QW_OFFSET = 0x20,
12 u8 action_id[0x8];
13 u8 flow_tag[0x18];
17 u8 action_id[0x8];
18 u8 num_of_modify_actions[0x8];
19 u8 modify_actions_ptr[0x10];
23 u8 action_id[0x8];
24 u8 reserved_at_8[0x2];
25 u8 start_anchor[0x
[all...]

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