/linux-6.15/drivers/net/wireless/realtek/rtw88/ |
D | rtw8814a.c | 40 efuse->rfe_option = 0; in rtw8814a_read_rfe_type() 52 efuse->pa_type_2g = 0; in rtw8814a_read_amplifier_type() 53 efuse->lna_type_2g = 0; in rtw8814a_read_amplifier_type() 55 efuse->pa_type_5g = BIT(0); in rtw8814a_read_amplifier_type() 62 efuse->pa_type_5g = BIT(0); in rtw8814a_read_amplifier_type() 80 case 0xff: /* 4T4R */ in rtw8814a_read_rf_type() 81 case 0xee: /* 3T3R */ in rtw8814a_read_rf_type() 89 case 0x66: /* 2T2R */ in rtw8814a_read_rf_type() 90 case 0x6f: /* 2T4R */ in rtw8814a_read_rf_type() 124 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n", in rtw8814a_init_hwcap() [all …]
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D | rtw8822c.h | 11 u8 res0[0x30]; /* 0x120 */ 12 u8 vid[2]; /* 0x150 */ 15 u8 mac_addr[ETH_ALEN]; /* 0x157 */ 16 u8 res2[0x3d]; 20 u8 res0[0x4a]; /* 0x120 */ 21 u8 mac_addr[ETH_ALEN]; /* 0x16a */ 25 u8 mac_addr[ETH_ALEN]; /* 0x120 */ 33 u8 ltr_cap; /* 0x133 */ 38 u8 res0:2; /* 0x144 */ 65 u8 res1[0x09]; [all …]
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/linux-6.15/Documentation/devicetree/bindings/arm/omap/ |
D | prm-inst.txt | 21 - #power-domain-cells: Should be 0 if the instance is a power domain provider. 28 reg = <0x1b00 0x40>; 29 #power-domain-cells = <0>;
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/linux-6.15/arch/arm/mach-omap2/ |
D | prm54xx.h | 24 #define OMAP54XX_PRM_BASE 0x4ae06000 31 #define OMAP54XX_PRM_OCP_SOCKET_INST 0x0000 32 #define OMAP54XX_PRM_CKGEN_INST 0x0100 33 #define OMAP54XX_PRM_MPU_INST 0x0300 34 #define OMAP54XX_PRM_DSP_INST 0x0400 35 #define OMAP54XX_PRM_ABE_INST 0x0500 36 #define OMAP54XX_PRM_COREAON_INST 0x0600 37 #define OMAP54XX_PRM_CORE_INST 0x0700 38 #define OMAP54XX_PRM_IVA_INST 0x1200 39 #define OMAP54XX_PRM_CAM_INST 0x1300 [all …]
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D | prm7xx.h | 26 #define DRA7XX_PRM_BASE 0x4ae06000 33 #define DRA7XX_PRM_OCP_SOCKET_INST 0x0000 34 #define DRA7XX_PRM_CKGEN_INST 0x0100 35 #define DRA7XX_PRM_MPU_INST 0x0300 36 #define DRA7XX_PRM_DSP1_INST 0x0400 37 #define DRA7XX_PRM_IPU_INST 0x0500 38 #define DRA7XX_PRM_COREAON_INST 0x0628 39 #define DRA7XX_PRM_CORE_INST 0x0700 40 #define DRA7XX_PRM_IVA_INST 0x0f00 41 #define DRA7XX_PRM_CAM_INST 0x1000 [all …]
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D | prm44xx.h | 28 #define OMAP4430_PRM_BASE 0x4a306000 35 #define OMAP4430_PRM_OCP_SOCKET_INST 0x0000 36 #define OMAP4430_PRM_CKGEN_INST 0x0100 37 #define OMAP4430_PRM_MPU_INST 0x0300 38 #define OMAP4430_PRM_TESLA_INST 0x0400 39 #define OMAP4430_PRM_ABE_INST 0x0500 40 #define OMAP4430_PRM_ALWAYS_ON_INST 0x0600 41 #define OMAP4430_PRM_CORE_INST 0x0700 42 #define OMAP4430_PRM_IVAHD_INST 0x0f00 43 #define OMAP4430_PRM_CAM_INST 0x1000 [all …]
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/linux-6.15/drivers/net/ethernet/qualcomm/ |
D | qca_7k.h | 21 #define QCA7K_SPI_WRITE (0 << 15) 23 #define QCA7K_SPI_EXTERNAL (0 << 14) 27 #define QCASPI_HW_BUF_LEN 0xC5B 30 #define SPI_REG_BFR_SIZE 0x0100 31 #define SPI_REG_WRBUF_SPC_AVA 0x0200 32 #define SPI_REG_RDBUF_BYTE_AVA 0x0300 33 #define SPI_REG_SPI_CONFIG 0x0400 34 #define SPI_REG_SPI_STATUS 0x0500 35 #define SPI_REG_INTR_CAUSE 0x0C00 36 #define SPI_REG_INTR_ENABLE 0x0D00 [all …]
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/linux-6.15/lib/ |
D | crc16.c | 10 /** CRC table for the CRC-16. The poly is 0x8005 (x^16 + x^15 + x^2 + 1) */ 12 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241, 13 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440, 14 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40, 15 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841, 16 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40, 17 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41, 18 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641, 19 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040, 20 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240, [all …]
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/linux-6.15/Documentation/devicetree/bindings/phy/ |
D | mediatek,tphy.yaml | 15 controllers on MediaTek SoCs, includes USB2.0, USB3.0, PCIe and SATA. 22 shared 0x0000 SPLLC 23 0x0100 FMREG 24 u2 port0 0x0800 U2PHY_COM 25 u3 port0 0x0900 U3PHYD 26 0x0a00 U3PHYD_BANK2 27 0x0b00 U3PHYA 28 0x0c00 U3PHYA_DA 29 u2 port1 0x1000 U2PHY_COM 30 u3 port1 0x1100 U3PHYD [all …]
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/linux-6.15/drivers/net/ethernet/qualcomm/emac/ |
D | emac.h | 17 #define EMAC_DMA_MAS_CTRL 0x1400 18 #define EMAC_IRQ_MOD_TIM_INIT 0x1408 19 #define EMAC_BLK_IDLE_STS 0x140c 20 #define EMAC_PHY_LINK_DELAY 0x141c 21 #define EMAC_SYS_ALIV_CTRL 0x1434 22 #define EMAC_MAC_CTRL 0x1480 23 #define EMAC_MAC_IPGIFG_CTRL 0x1484 24 #define EMAC_MAC_STA_ADDR0 0x1488 25 #define EMAC_MAC_STA_ADDR1 0x148c 26 #define EMAC_HASH_TAB_REG0 0x1490 [all …]
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/linux-6.15/drivers/mfd/ |
D | intel_pmc_bxt.c | 37 #define PLAT_RESOURCE_IPC_INDEX 0 38 #define PLAT_RESOURCE_IPC_SIZE 0x1000 39 #define PLAT_RESOURCE_GCR_OFFSET 0x1000 40 #define PLAT_RESOURCE_GCR_SIZE 0x1000 48 #define PLAT_RESOURCE_ACPI_IO_INDEX 0 56 #define SMI_EN_OFFSET 0x0040 58 #define TCO_BASE_OFFSET 0x0060 61 #define TELEM_PMC_SSRAM_OFFSET 0x1b00 62 #define TELEM_PUNIT_SSRAM_OFFSET 0x1a00 65 #define PMC_NORTHPEAK_CTRL 0xed [all …]
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/linux-6.15/drivers/gpu/host1x/ |
D | dev.c | 90 .sync_offset = 0x3000, 94 .num_sid_entries = 0, 105 .sync_offset = 0x3000, 109 .num_sid_entries = 0, 120 .sync_offset = 0x2100, 124 .num_sid_entries = 0, 135 .sync_offset = 0x2100, 139 .num_sid_entries = 0, 145 { /* SE1 */ .base = 0x1ac8, .offset = 0x90, .limit = 0x90 }, 146 { /* SE2 */ .base = 0x1ad0, .offset = 0x90, .limit = 0x90 }, [all …]
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/linux-6.15/drivers/net/wireless/realtek/rtlwifi/ |
D | debug.c | 80 int max = 0xff; in rtl_debug_get_mac_page() 82 for (n = 0; n <= max; ) { in rtl_debug_get_mac_page() 84 for (i = 0; i < 4 && n <= max; i++, n += 4) in rtl_debug_get_mac_page() 89 return 0; in rtl_debug_get_mac_page() 98 RTL_DEBUG_IMPL_MAC_SERIES(0, 0x0000); 99 RTL_DEBUG_IMPL_MAC_SERIES(1, 0x0100); 100 RTL_DEBUG_IMPL_MAC_SERIES(2, 0x0200); 101 RTL_DEBUG_IMPL_MAC_SERIES(3, 0x0300); 102 RTL_DEBUG_IMPL_MAC_SERIES(4, 0x0400); 103 RTL_DEBUG_IMPL_MAC_SERIES(5, 0x0500); [all …]
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/linux-6.15/drivers/clk/imx/ |
D | clk-imx93.c | 20 #define PLAT_IMX93 BIT(0) 65 { IMX93_CLK_A55_PERIPH, "a55_periph_root", 0x0000, FAST_SEL, CLK_IS_CRITICAL }, 66 { IMX93_CLK_A55_MTR_BUS, "a55_mtr_bus_root", 0x0080, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL }, 67 { IMX93_CLK_A55, "a55_alt_root", 0x0100, FAST_SEL, CLK_IS_CRITICAL }, 68 { IMX93_CLK_M33, "m33_root", 0x0180, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL }, 69 { IMX93_CLK_BUS_WAKEUP, "bus_wakeup_root", 0x0280, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL }, 70 { IMX93_CLK_BUS_AON, "bus_aon_root", 0x0300, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL }, 71 { IMX93_CLK_WAKEUP_AXI, "wakeup_axi_root", 0x0380, FAST_SEL, CLK_IS_CRITICAL }, 72 { IMX93_CLK_SWO_TRACE, "swo_trace_root", 0x0400, LOW_SPEED_IO_SEL, }, 73 { IMX93_CLK_M33_SYSTICK, "m33_systick_root", 0x0480, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, }, [all …]
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/linux-6.15/drivers/net/ethernet/amd/ |
D | ariadne.h | 17 * Publication #16907, Rev. B, Amendment/0, May 1994 62 #define CSR0 0x0000 /* - PCnet-ISA Controller Status */ 63 #define CSR1 0x0100 /* - IADR[15:0] */ 64 #define CSR2 0x0200 /* - IADR[23:16] */ 65 #define CSR3 0x0300 /* - Interrupt Masks and Deferral Control */ 66 #define CSR4 0x0400 /* - Test and Features Control */ 67 #define CSR6 0x0600 /* RCV/XMT Descriptor Table Length */ 68 #define CSR8 0x0800 /* - Logical Address Filter, LADRF[15:0] */ 69 #define CSR9 0x0900 /* - Logical Address Filter, LADRF[31:16] */ 70 #define CSR10 0x0a00 /* - Logical Address Filter, LADRF[47:32] */ [all …]
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/linux-6.15/arch/x86/include/asm/ |
D | perf_event.h | 17 #define MSR_ARCH_PERFMON_PERFCTR0 0xc1 18 #define MSR_ARCH_PERFMON_PERFCTR1 0xc2 20 #define MSR_ARCH_PERFMON_EVENTSEL0 0x186 21 #define MSR_ARCH_PERFMON_EVENTSEL1 0x187 23 #define ARCH_PERFMON_EVENTSEL_EVENT 0x000000FFULL 24 #define ARCH_PERFMON_EVENTSEL_UMASK 0x0000FF00ULL 33 #define ARCH_PERFMON_EVENTSEL_CMASK 0xFF000000ULL 36 #define ARCH_PERFMON_EVENTSEL_UMASK2 (0xFFULL << 40) 38 #define INTEL_FIXED_BITS_MASK 0xFULL 40 #define INTEL_FIXED_0_KERNEL (1ULL << 0) [all …]
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/linux-6.15/drivers/media/usb/gspca/ |
D | dtcs033.c | 32 if (gspca_dev->usb_err < 0) in reg_rw() 36 usb_rcvctrlpipe(udev, 0), in reg_rw() 42 if (ret < 0) { in reg_rw() 53 int i = 0; in reg_reqs() 56 while ((i < n_reqs) && (gspca_dev->usb_err >= 0)) { in reg_reqs() 63 if (gspca_dev->usb_err < 0) { in reg_reqs() 111 return 0; in sd_config() 117 return 0; in sd_init() 137 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0); in dtcs033_pkt_scan() 141 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0); in dtcs033_pkt_scan() [all …]
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/linux-6.15/drivers/gpu/drm/bridge/synopsys/ |
D | dw-hdmi-qp.h | 13 #define CORE_ID 0x0 14 #define VER_NUMBER 0x4 15 #define VER_TYPE 0x8 16 #define CONFIG_REG 0xc 19 #define CORE_TIMESTAMP_HHMM 0x14 20 #define CORE_TIMESTAMP_MMDD 0x18 21 #define CORE_TIMESTAMP_YYYY 0x1c 23 #define GLOBAL_SWRESET_REQUEST 0x40 26 #define GLOBAL_SWDISABLE 0x44 30 #define RESET_MANAGER_CONFIG0 0x48 [all …]
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/linux-6.15/sound/soc/codecs/ |
D | rt721-sdca.c | 33 int btn_type = 0; in rt721_sdca_jack_detect_handler() 45 if (rt721->jack_type < 0) in rt721_sdca_jack_detect_handler() 55 if (rt721->jack_type == 0) in rt721_sdca_jack_detect_handler() 56 btn_type = 0; in rt721_sdca_jack_detect_handler() 61 "in %s, btn_type=0x%x\n", __func__, btn_type); in rt721_sdca_jack_detect_handler() 63 "in %s, scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__, in rt721_sdca_jack_detect_handler() 87 int btn_type = 0, ret, idx; in rt721_sdca_btn_check_handler() 93 RT721_SDCA_CTL_DETECTED_MODE, 0), &det_mode); in rt721_sdca_btn_check_handler() 94 if (ret < 0) in rt721_sdca_btn_check_handler() 102 RT721_SDCA_CTL_HIDTX_MESSAGE_OFFSET, 0), &offset); in rt721_sdca_btn_check_handler() [all …]
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/linux-6.15/drivers/net/ethernet/atheros/alx/ |
D | reg.h | 38 #define ALX_DEV_ID_AR8161 0x1091 39 #define ALX_DEV_ID_E2200 0xe091 40 #define ALX_DEV_ID_E2400 0xe0a1 41 #define ALX_DEV_ID_E2500 0xe0b1 42 #define ALX_DEV_ID_AR8162 0x1090 43 #define ALX_DEV_ID_AR8171 0x10A1 44 #define ALX_DEV_ID_AR8172 0x10A0 47 * bit(0): with xD support 52 #define ALX_REV_A0 0 57 #define ALX_DEV_CTRL 0x0060 [all …]
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/linux-6.15/include/sound/ |
D | cs42l42.h | 15 #define CS42L42_PAGE_REGISTER 0x00 /* Page Select Register */ 16 #define CS42L42_WIN_START 0x00 17 #define CS42L42_WIN_LEN 0x100 18 #define CS42L42_RANGE_MIN 0x00 19 #define CS42L42_RANGE_MAX 0x7F 21 #define CS42L42_PAGE_10 0x1000 22 #define CS42L42_PAGE_11 0x1100 23 #define CS42L42_PAGE_12 0x1200 24 #define CS42L42_PAGE_13 0x1300 25 #define CS42L42_PAGE_15 0x1500 [all …]
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/linux-6.15/arch/arm/boot/dts/ti/omap/ |
D | am33xx.dtsi | 47 #size-cells = <0>; 48 cpu@0 { 52 reg = <0>; 87 opp-supported-hw = <0x06 0x0010>; 95 opp-supported-hw = <0x01 0x00FF>; 103 opp-supported-hw = <0x06 0x0020>; 111 opp-supported-hw = <0x01 0xFFFF>; 118 opp-supported-hw = <0x06 0x0040>; 125 opp-supported-hw = <0x01 0xFFFF>; 132 opp-supported-hw = <0x06 0x0080>; [all …]
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D | dm814x.dtsi | 31 #size-cells = <0>; 32 cpu@0 { 35 reg = <0>; 65 reg = <0x47400000 0x1000>; 73 reg = <0x47401300 0x100>; 76 #phy-cells = <0>; 81 reg = <0x47401400 0x400 82 0x47401000 0x200>; 94 dmas = <&cppi41dma 0 0 &cppi41dma 1 0 95 &cppi41dma 2 0 &cppi41dma 3 0 [all …]
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/linux-6.15/arch/openrisc/kernel/ |
D | entry.S | 48 l.addi r2,r1,0 /* move sp to fp */ ;\ 51 l.ori r1,r2,0 /* restore sp */ ;\ 62 l.addi r2,r1,0 /* move sp to fp */ ;\ 65 l.ori r1,r2,0 /* restore sp */ ;\ 218 l.addi r3,r1,0 ;\ 230 l.sw 0(reg),r0 244 /* ---[ 0x100: RESET exception ]----------------------------------------- */ 248 l.andi r0,r0,0 250 /* ---[ 0x200: BUS exception ]------------------------------------------- */ 256 l.addi r3,r1,0 /* pt_regs */ [all …]
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/linux-6.15/drivers/net/ethernet/hisilicon/hns/ |
D | hns_dsaf_reg.h | 10 #define HNS_DEBUG_RING_IRQ_IDX 0 46 #define DSAF_SUB_SC_NT_SRAM_CLK_SEL_REG 0x100 47 #define DSAF_SUB_SC_HILINK3_CRG_CTRL0_REG 0x180 48 #define DSAF_SUB_SC_HILINK3_CRG_CTRL1_REG 0x184 49 #define DSAF_SUB_SC_HILINK3_CRG_CTRL2_REG 0x188 50 #define DSAF_SUB_SC_HILINK3_CRG_CTRL3_REG 0x18C 51 #define DSAF_SUB_SC_HILINK4_CRG_CTRL0_REG 0x190 52 #define DSAF_SUB_SC_HILINK4_CRG_CTRL1_REG 0x194 53 #define DSAF_SUB_SC_DSAF_CLK_EN_REG 0x300 54 #define DSAF_SUB_SC_DSAF_CLK_DIS_REG 0x304 [all …]
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