40 		efuse->rfe_option = 0;  in rtw8814a_read_rfe_type()
52 		efuse->pa_type_2g = 0;  in rtw8814a_read_amplifier_type()
53 		efuse->lna_type_2g = 0;  in rtw8814a_read_amplifier_type()
55 		efuse->pa_type_5g = BIT(0);  in rtw8814a_read_amplifier_type()
62 		efuse->pa_type_5g = BIT(0);  in rtw8814a_read_amplifier_type()
80 	case 0xff: /* 4T4R */  in rtw8814a_read_rf_type()
81 	case 0xee: /* 3T3R */  in rtw8814a_read_rf_type()
89 	case 0x66: /* 2T2R */  in rtw8814a_read_rf_type()
90 	case 0x6f: /* 2T4R */  in rtw8814a_read_rf_type()
124 		"hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n",  in rtw8814a_init_hwcap()
146 	efuse->country_code[0] = map->country_code[0];  in rtw8814a_read_efuse()
149 	efuse->regd = map->rf_board_option & 0x7;  in rtw8814a_read_efuse()
163 	for (i = 0; i < 4; i++)  in rtw8814a_read_efuse()
179 	return 0;  in rtw8814a_read_efuse()
187 		rtw_write32_mask(rtwdev, 0x1994, 0xf, 0xf);  in rtw8814a_init_rfe_reg()
188 		rtw_write8_set(rtwdev, REG_GPIO_MUXCFG + 2, 0xf0);  in rtw8814a_init_rfe_reg()
189 	} else if (rfe_option == 0) {  in rtw8814a_init_rfe_reg()
190 		rtw_write32_mask(rtwdev, 0x1994, 0xf, 0xf);  in rtw8814a_init_rfe_reg()
191 		rtw_write8_set(rtwdev, REG_GPIO_MUXCFG + 2, 0xc0);  in rtw8814a_init_rfe_reg()
197 	0x081, 0x088, 0x090, 0x099, 0x0a2, 0x0ac, 0x0b6, 0x0c0, 0x0cc, 0x0d8,
198 	0x0e5, 0x0f2, 0x101, 0x110, 0x120, 0x131, 0x143, 0x156, 0x16a, 0x180,
199 	0x197, 0x1af, 0x1c8, 0x1e3, 0x200, 0x21e, 0x23e, 0x261, 0x285, 0x2ab,
200 	0x2d3, 0x2fe, 0x32b, 0x35c, 0x38e, 0x3c4, 0x3fe
205 	static const u32 swing2setting[4] = {0x200, 0x16a, 0x101, 0x0b6};  in rtw8814a_get_bb_swing()
215 	tx_bb_swing &= 0x3;  in rtw8814a_get_bb_swing()
228 	for (i = 0; i < ARRAY_SIZE(rtw8814a_txscale_tbl); i++) {  in rtw8814a_get_swing_index()
246 		dm_info->delta_power_index[path] = 0;  in rtw8814a_pwrtrack_init()
247 		dm_info->delta_power_index_last[path] = 0;  in rtw8814a_pwrtrack_init()
260 	rtw_write32_mask(rtwdev, REG_CCK_RX, 0xf0000000, 0x4);  in rtw8814a_config_trx_path()
262 	rtw_write32_mask(rtwdev, REG_CCK_RX, 0x0f000000, 0x5);  in rtw8814a_config_trx_path()
270 	rtw_write32_mask(rtwdev, REG_RXSB, BIT_RXSB_ANA_DIV, 0x0);  in rtw8814a_config_cck_rx_antenna_init()
272 	rtw_write32_mask(rtwdev, REG_CCA, BIT_CCA_CO, 0);  in rtw8814a_config_cck_rx_antenna_init()
274 	rtw_write32_mask(rtwdev, REG_ANTSEL, BIT_ANT_BYCO, 0);  in rtw8814a_config_cck_rx_antenna_init()
276 	rtw_write32_mask(rtwdev, REG_PRECTRL, BIT_DIS_CO_PATHSEL, 0);  in rtw8814a_config_cck_rx_antenna_init()
307 	crystal_cap = rtwdev->efuse.crystal_cap & 0x3F;  in rtw8814a_phy_set_param()
309 	rtw_write32_mask(rtwdev, REG_AFE_CTRL3, 0x07ff8000, crystal_cap);  in rtw8814a_phy_set_param()
313 	for (rf_path = 0; rf_path < rtwdev->hal.rf_path_num; rf_path++)  in rtw8814a_phy_set_param()
323 	rtw_write8(rtwdev, REG_HWSEQ_CTRL, 0xFF);  in rtw8814a_phy_set_param()
325 	rtw_write32(rtwdev, REG_BAR_MODE_CTRL, 0x0201ffff);  in rtw8814a_phy_set_param()
329 	rtw_write8(rtwdev, REG_NAV_CTRL + 2, 0);  in rtw8814a_phy_set_param()
345 	rtw_write8(rtwdev,  REG_FWHW_TXQ_CTRL + 1, 0x1F);  in rtw8814a_phy_set_param()
349 		rtw_write8(rtwdev, REG_SYS_SDIO_CTRL, 0x0);  in rtw8814a_phy_set_param()
350 		rtw_write8(rtwdev, REG_ACLK_MON, 0x0);  in rtw8814a_phy_set_param()
360 	/* 1. set 0x40[1:0] to 0, BIT_GPIOSEL=0, select pin as GPIO */  in rtw8814ae_enable_rf_1_2v()
361 	rtw_write8_clr(rtwdev, REG_GPIO_MUXCFG, BIT(1) | BIT(0));  in rtw8814ae_enable_rf_1_2v()
363 	/* 2. set 0x44[31] to 0  in rtw8814ae_enable_rf_1_2v()
364 	 * mode=0: data port;  in rtw8814ae_enable_rf_1_2v()
365 	 * mode=1 and BIT_GPIO_IO_SEL=0: interrupt mode;  in rtw8814ae_enable_rf_1_2v()
370 	 * 3.1 set 0x44[23] to 1  in rtw8814ae_enable_rf_1_2v()
371 	 * sel=0: input;  in rtw8814ae_enable_rf_1_2v()
376 	/* 3.2 set 0x44[15] to 1  in rtw8814ae_enable_rf_1_2v()
395 	rtw_write32(rtwdev, REG_HIMR0, 0);  in rtw8814a_mac_init()
396 	rtw_write32(rtwdev, REG_HIMR1, 0);  in rtw8814a_mac_init()
398 	rtw_write32_mask(rtwdev, REG_RRSR, 0xfffff, 0xfffff);  in rtw8814a_mac_init()
400 	rtw_write16(rtwdev, REG_RETRY_LIMIT, 0x3030);  in rtw8814a_mac_init()
402 	rtw_write16(rtwdev, REG_RXFLTMAP0, 0xffff);  in rtw8814a_mac_init()
403 	rtw_write16(rtwdev, REG_RXFLTMAP1, 0x0400);  in rtw8814a_mac_init()
404 	rtw_write16(rtwdev, REG_RXFLTMAP2, 0xffff);  in rtw8814a_mac_init()
406 	rtw_write8(rtwdev, REG_MAX_AGGR_NUM, 0x36);  in rtw8814a_mac_init()
407 	rtw_write8(rtwdev, REG_MAX_AGGR_NUM + 1, 0x36);  in rtw8814a_mac_init()
410 	rtw_write16(rtwdev, REG_SPEC_SIFS, 0x100a);  in rtw8814a_mac_init()
411 	rtw_write16(rtwdev, REG_MAC_SPEC_SIFS, 0x100a);  in rtw8814a_mac_init()
414 	rtw_write16(rtwdev, REG_SIFS, 0x100a);  in rtw8814a_mac_init()
417 	rtw_write16(rtwdev, REG_SIFS + 2, 0x100a);  in rtw8814a_mac_init()
420 	rtw_write32(rtwdev, REG_EDCA_BE_PARAM, 0x005EA42B);  in rtw8814a_mac_init()
421 	rtw_write32(rtwdev, REG_EDCA_BK_PARAM, 0x0000A44F);  in rtw8814a_mac_init()
422 	rtw_write32(rtwdev, REG_EDCA_VI_PARAM, 0x005EA324);  in rtw8814a_mac_init()
423 	rtw_write32(rtwdev, REG_EDCA_VO_PARAM, 0x002FA226);  in rtw8814a_mac_init()
427 	rtw_write8(rtwdev, REG_ACKTO, 0x80);  in rtw8814a_mac_init()
431 	rtw_write32_mask(rtwdev, REG_TBTT_PROHIBIT, 0xfffff, WLAN_TBTT_TIME);  in rtw8814a_mac_init()
432 	rtw_write8(rtwdev, REG_DRVERLYINT, 0x05);  in rtw8814a_mac_init()
434 	rtw_write16(rtwdev, REG_BCNTCFG, 0x4413);  in rtw8814a_mac_init()
435 	rtw_write8(rtwdev, REG_BCN_MAX_ERR, 0xFF);  in rtw8814a_mac_init()
437 	rtw_write32(rtwdev, REG_FAST_EDCA_VOVI_SETTING, 0x08070807);  in rtw8814a_mac_init()
438 	rtw_write32(rtwdev, REG_FAST_EDCA_BEBK_SETTING, 0x08070807);  in rtw8814a_mac_init()
442 		/* Disable U1/U2 Mode to avoid 2.5G spur in USB3.0. */  in rtw8814a_mac_init()
445 		rtw_write16(rtwdev, 0xf002, 0);  in rtw8814a_mac_init()
454 		rtw_write8_set(rtwdev, REG_PAD_CTRL1 + 1, BIT(0));  in rtw8814a_mac_init()
459 	return 0;  in rtw8814a_mac_init()
466 		rtw_write32(rtwdev, REG_RFE_PINMUX_A, 0x72707270);  in rtw8814a_set_rfe_reg_24g()
467 		rtw_write32(rtwdev, REG_RFE_PINMUX_B, 0x72707270);  in rtw8814a_set_rfe_reg_24g()
468 		rtw_write32(rtwdev, REG_RFE_PINMUX_C, 0x72707270);  in rtw8814a_set_rfe_reg_24g()
469 		rtw_write32(rtwdev, REG_RFE_PINMUX_D, 0x77707770);  in rtw8814a_set_rfe_reg_24g()
472 				 BIT_RFE_SELSW0_D, 0x72);  in rtw8814a_set_rfe_reg_24g()
476 		rtw_write32(rtwdev, REG_RFE_PINMUX_A, 0x77777777);  in rtw8814a_set_rfe_reg_24g()
477 		rtw_write32(rtwdev, REG_RFE_PINMUX_B, 0x77777777);  in rtw8814a_set_rfe_reg_24g()
478 		rtw_write32(rtwdev, REG_RFE_PINMUX_C, 0x77777777);  in rtw8814a_set_rfe_reg_24g()
479 		rtw_write32(rtwdev, REG_RFE_PINMUX_D, 0x77777777);  in rtw8814a_set_rfe_reg_24g()
482 				 BIT_RFE_SELSW0_D, 0x77);  in rtw8814a_set_rfe_reg_24g()
485 	case 0:  in rtw8814a_set_rfe_reg_24g()
487 		rtw_write32(rtwdev, REG_RFE_PINMUX_A, 0x77777777);  in rtw8814a_set_rfe_reg_24g()
488 		rtw_write32(rtwdev, REG_RFE_PINMUX_B, 0x77777777);  in rtw8814a_set_rfe_reg_24g()
489 		rtw_write32(rtwdev, REG_RFE_PINMUX_C, 0x77777777);  in rtw8814a_set_rfe_reg_24g()
493 				 BIT_RFE_SELSW0_D, 0x77);  in rtw8814a_set_rfe_reg_24g()
503 		rtw_write32(rtwdev, REG_RFE_PINMUX_A, 0x37173717);  in rtw8814a_set_rfe_reg_5g()
504 		rtw_write32(rtwdev, REG_RFE_PINMUX_B, 0x37173717);  in rtw8814a_set_rfe_reg_5g()
505 		rtw_write32(rtwdev, REG_RFE_PINMUX_C, 0x37173717);  in rtw8814a_set_rfe_reg_5g()
506 		rtw_write32(rtwdev, REG_RFE_PINMUX_D, 0x77177717);  in rtw8814a_set_rfe_reg_5g()
509 				 BIT_RFE_SELSW0_D, 0x37);  in rtw8814a_set_rfe_reg_5g()
513 		rtw_write32(rtwdev, REG_RFE_PINMUX_A, 0x33173317);  in rtw8814a_set_rfe_reg_5g()
514 		rtw_write32(rtwdev, REG_RFE_PINMUX_B, 0x33173317);  in rtw8814a_set_rfe_reg_5g()
515 		rtw_write32(rtwdev, REG_RFE_PINMUX_C, 0x33173317);  in rtw8814a_set_rfe_reg_5g()
516 		rtw_write32(rtwdev, REG_RFE_PINMUX_D, 0x77177717);  in rtw8814a_set_rfe_reg_5g()
519 				 BIT_RFE_SELSW0_D, 0x33);  in rtw8814a_set_rfe_reg_5g()
522 	case 0:  in rtw8814a_set_rfe_reg_5g()
524 		rtw_write32(rtwdev, REG_RFE_PINMUX_A, 0x54775477);  in rtw8814a_set_rfe_reg_5g()
525 		rtw_write32(rtwdev, REG_RFE_PINMUX_B, 0x54775477);  in rtw8814a_set_rfe_reg_5g()
526 		rtw_write32(rtwdev, REG_RFE_PINMUX_C, 0x54775477);  in rtw8814a_set_rfe_reg_5g()
527 		rtw_write32(rtwdev, REG_RFE_PINMUX_D, 0x54775477);  in rtw8814a_set_rfe_reg_5g()
530 				 BIT_RFE_SELSW0_D, 0x54);  in rtw8814a_set_rfe_reg_5g()
551 	u32 adc = 0;  in rtw8814a_set_bw_reg_adc()
554 		adc = 0;  in rtw8814a_set_bw_reg_adc()
560 	rtw_write32_mask(rtwdev, REG_ADCCLK, BIT(1) | BIT(0), adc);  in rtw8814a_set_bw_reg_adc()
578 	rtw_write32_mask(rtwdev, REG_CCASEL, 0xf000, agc);  in rtw8814a_set_bw_reg_agc()
583 	/* Clear 0x1000[16], When this bit is set to 0, CCK and OFDM  in rtw8814a_switch_band()
590 		rtw_write32_mask(rtwdev, REG_AGC_TABLE, 0x1f, 0);  in rtw8814a_switch_band()
594 		rtw_write32_mask(rtwdev, REG_TXPSEL, 0xf0, 0x2);  in rtw8814a_switch_band()
595 		rtw_write32_mask(rtwdev, REG_CCK_RX, 0x0f000000, 0x5);  in rtw8814a_switch_band()
597 		rtw_write32_mask(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST, 0x3);  in rtw8814a_switch_band()
599 		rtw_write8(rtwdev, REG_CCK_CHECK, 0);  in rtw8814a_switch_band()
601 		rtw_write32_mask(rtwdev, 0xa80, BIT(18), 0);  in rtw8814a_switch_band()
606 		rtw_write32_mask(rtwdev, 0xa80, BIT(18), 1);  in rtw8814a_switch_band()
610 		rtw_write32_mask(rtwdev, REG_TXPSEL, 0xf0, 0x0);  in rtw8814a_switch_band()
611 		rtw_write32_mask(rtwdev, REG_CCK_RX, 0x0f000000, 0xf);  in rtw8814a_switch_band()
613 		rtw_write32_mask(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST, 0x2);  in rtw8814a_switch_band()
632 		fc_area = 0x494;  in rtw8814a_switch_channel()
635 		fc_area = 0x453;  in rtw8814a_switch_channel()
638 		fc_area = 0x452;  in rtw8814a_switch_channel()
642 			fc_area = 0x412;  in rtw8814a_switch_channel()
644 			fc_area = 0x96a;  in rtw8814a_switch_channel()
648 	rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, fc_area);  in rtw8814a_switch_channel()
650 	for (path = 0; path < hal->rf_path_num; path++) {  in rtw8814a_switch_channel()
653 			rf_mod_ag = 0x101;  in rtw8814a_switch_channel()
656 			rf_mod_ag = 0x301;  in rtw8814a_switch_channel()
660 				rf_mod_ag = 0x501;  in rtw8814a_switch_channel()
662 				rf_mod_ag = 0x000;  in rtw8814a_switch_channel()
674 		rtw_write32_mask(rtwdev, REG_AGC_TABLE, 0x1f, 1);  in rtw8814a_switch_channel()
677 		rtw_write32_mask(rtwdev, REG_AGC_TABLE, 0x1f, 2);  in rtw8814a_switch_channel()
681 			rtw_write32_mask(rtwdev, REG_AGC_TABLE, 0x1f, 3);  in rtw8814a_switch_channel()
690 		rtw_write32(rtwdev, REG_CCK0_TX_FILTER1, 0x1a1b0030);  in rtw8814a_24g_cck_tx_dfir()
691 		rtw_write32(rtwdev, REG_CCK0_TX_FILTER2, 0x090e1317);  in rtw8814a_24g_cck_tx_dfir()
692 		rtw_write32(rtwdev, REG_CCK0_DEBUG_PORT, 0x00000204);  in rtw8814a_24g_cck_tx_dfir()
694 		rtw_write32(rtwdev, REG_CCK0_TX_FILTER1, 0x1a1b0030);  in rtw8814a_24g_cck_tx_dfir()
695 		rtw_write32(rtwdev, REG_CCK0_TX_FILTER2, 0x090e1217);  in rtw8814a_24g_cck_tx_dfir()
696 		rtw_write32(rtwdev, REG_CCK0_DEBUG_PORT, 0x00000305);  in rtw8814a_24g_cck_tx_dfir()
698 		rtw_write32(rtwdev, REG_CCK0_TX_FILTER1, 0x1a1b0030);  in rtw8814a_24g_cck_tx_dfir()
699 		rtw_write32(rtwdev, REG_CCK0_TX_FILTER2, 0x00000E17);  in rtw8814a_24g_cck_tx_dfir()
700 		rtw_write32(rtwdev, REG_CCK0_DEBUG_PORT, 0x00000000);  in rtw8814a_24g_cck_tx_dfir()
733 			rtw_write_rf(rtwdev, path, RF_CFGCH, RF18_BW_MASK, 0);  in rtw8814a_set_bw_rf()
748 	u32 i = 0, mac_active = 1;  in rtw8814a_adc_clk()
758 	rtw_write8(rtwdev, REG_TXPAUSE, 0x3f);  in rtw8814a_adc_clk()
760 	/* 1 Step 2. Backup rxiqc & rxiqc = 0 */  in rtw8814a_adc_clk()
761 	for (i = 0; i < 4; i++) {  in rtw8814a_adc_clk()
762 		rxiqc[i] = rtw_read32(rtwdev, rxiqc_reg[0][i]);  in rtw8814a_adc_clk()
763 		rtw_write32(rtwdev, rxiqc_reg[0][i], 0x0);  in rtw8814a_adc_clk()
764 		rtw_write32(rtwdev, rxiqc_reg[1][i], 0x0);  in rtw8814a_adc_clk()
766 	rtw_write32_mask(rtwdev, REG_PRECTRL, BIT_IQ_WGT, 0x3);  in rtw8814a_adc_clk()
767 	i = 0;  in rtw8814a_adc_clk()
770 	rtw_write32(rtwdev, REG_DBGSEL, 0x0);  in rtw8814a_adc_clk()
772 		mac_active = rtw_read32(rtwdev, REG_DBGRPT) & 0x803e0008;  in rtw8814a_adc_clk()
779 	rtw_write8(rtwdev, REG_RXPSEL, 0x11);  in rtw8814a_adc_clk()
780 	rtw_write32_mask(rtwdev, REG_DAC_RSTB, BIT(13), 0x1);  in rtw8814a_adc_clk()
781 	rtw_write8_mask(rtwdev, REG_GNT_BT, BIT(2) | BIT(1), 0x3);  in rtw8814a_adc_clk()
782 	rtw_write32_mask(rtwdev, REG_CCK_RPT_FORMAT, BIT(2), 0x1);  in rtw8814a_adc_clk()
784 	/* 0xc1c/0xe1c/0x181c/0x1a1c[4] must=1 to ensure table can be  in rtw8814a_adc_clk()
785 	 * written when bbrstb=0  in rtw8814a_adc_clk()
786 	 * 0xc60/0xe60/0x1860/0x1a60[15] always = 1 after this line  in rtw8814a_adc_clk()
787 	 * 0xc60/0xe60/0x1860/0x1a60[14] always = 0 bcz its error in A-cut  in rtw8814a_adc_clk()
791 	rtw_write32(rtwdev, REG_AFE_PWR1_A, 0x15800002);  in rtw8814a_adc_clk()
792 	rtw_write32(rtwdev, REG_AFE_PWR1_A, 0x01808003);  in rtw8814a_adc_clk()
793 	rtw_write32(rtwdev, REG_AFE_PWR1_B, 0x15800002);  in rtw8814a_adc_clk()
794 	rtw_write32(rtwdev, REG_AFE_PWR1_B, 0x01808003);  in rtw8814a_adc_clk()
795 	rtw_write32(rtwdev, REG_AFE_PWR1_C, 0x15800002);  in rtw8814a_adc_clk()
796 	rtw_write32(rtwdev, REG_AFE_PWR1_C, 0x01808003);  in rtw8814a_adc_clk()
797 	rtw_write32(rtwdev, REG_AFE_PWR1_D, 0x15800002);  in rtw8814a_adc_clk()
798 	rtw_write32(rtwdev, REG_AFE_PWR1_D, 0x01808003);  in rtw8814a_adc_clk()
800 	rtw_write8_mask(rtwdev, REG_GNT_BT, BIT(2), 0x0);  in rtw8814a_adc_clk()
801 	rtw_write32_mask(rtwdev, REG_CCK_RPT_FORMAT, BIT(2), 0x0);  in rtw8814a_adc_clk()
803 	rtw_write32(rtwdev, REG_CK_MONHA, 0x0D080058);  in rtw8814a_adc_clk()
804 	rtw_write32(rtwdev, REG_CK_MONHB, 0x0D080058);  in rtw8814a_adc_clk()
805 	rtw_write32(rtwdev, REG_CK_MONHC, 0x0D080058);  in rtw8814a_adc_clk()
806 	rtw_write32(rtwdev, REG_CK_MONHD, 0x0D080058);  in rtw8814a_adc_clk()
809 	/* [19] = 0 to turn on ADC */  in rtw8814a_adc_clk()
810 	rtw_write32(rtwdev, REG_CK_MONHA, 0x0D000058);  in rtw8814a_adc_clk()
811 	rtw_write32(rtwdev, REG_CK_MONHB, 0x0D000058);  in rtw8814a_adc_clk()
812 	rtw_write32(rtwdev, REG_CK_MONHC, 0x0D000058);  in rtw8814a_adc_clk()
813 	rtw_write32(rtwdev, REG_CK_MONHD, 0x0D000058);  in rtw8814a_adc_clk()
816 	rtw_write32(rtwdev, REG_AFE_PWR1_A, 0x05808032);  in rtw8814a_adc_clk()
817 	rtw_write32(rtwdev, REG_AFE_PWR1_B, 0x05808032);  in rtw8814a_adc_clk()
818 	rtw_write32(rtwdev, REG_AFE_PWR1_C, 0x05808032);  in rtw8814a_adc_clk()
819 	rtw_write32(rtwdev, REG_AFE_PWR1_D, 0x05808032);  in rtw8814a_adc_clk()
820 	rtw_write8_mask(rtwdev, REG_GNT_BT, BIT(2), 0x1);  in rtw8814a_adc_clk()
821 	rtw_write32_mask(rtwdev, REG_CCK_RPT_FORMAT, BIT(2), 0x1);  in rtw8814a_adc_clk()
824 	rtw_write32(rtwdev, REG_AFE_PWR1_A, 0x05808032);  in rtw8814a_adc_clk()
825 	rtw_write32(rtwdev, REG_AFE_PWR1_B, 0x05808032);  in rtw8814a_adc_clk()
826 	rtw_write32(rtwdev, REG_AFE_PWR1_C, 0x05808032);  in rtw8814a_adc_clk()
827 	rtw_write32(rtwdev, REG_AFE_PWR1_D, 0x05808032);  in rtw8814a_adc_clk()
829 	rtw_write32(rtwdev, REG_AFE_PWR1_A, 0x05800002);  in rtw8814a_adc_clk()
830 	rtw_write32(rtwdev, REG_AFE_PWR1_A, 0x07808003);  in rtw8814a_adc_clk()
831 	rtw_write32(rtwdev, REG_AFE_PWR1_B, 0x05800002);  in rtw8814a_adc_clk()
832 	rtw_write32(rtwdev, REG_AFE_PWR1_B, 0x07808003);  in rtw8814a_adc_clk()
833 	rtw_write32(rtwdev, REG_AFE_PWR1_C, 0x05800002);  in rtw8814a_adc_clk()
834 	rtw_write32(rtwdev, REG_AFE_PWR1_C, 0x07808003);  in rtw8814a_adc_clk()
835 	rtw_write32(rtwdev, REG_AFE_PWR1_D, 0x05800002);  in rtw8814a_adc_clk()
836 	rtw_write32(rtwdev, REG_AFE_PWR1_D, 0x07808003);  in rtw8814a_adc_clk()
838 	rtw_write8_mask(rtwdev, REG_GNT_BT, BIT(2) | BIT(1), 0x0);  in rtw8814a_adc_clk()
839 	rtw_write32_mask(rtwdev, REG_CCK_RPT_FORMAT, BIT(2), 0x0);  in rtw8814a_adc_clk()
840 	rtw_write32_mask(rtwdev, REG_DAC_RSTB, BIT(13), 0x0);  in rtw8814a_adc_clk()
846 	for (i = 0; i < 4; i++) {  in rtw8814a_adc_clk()
847 		rtw_write32(rtwdev, rxiqc_reg[0][i], rxiqc[i]);  in rtw8814a_adc_clk()
848 		rtw_write32(rtwdev, rxiqc_reg[1][i], 0x01000000);  in rtw8814a_adc_clk()
850 	rtw_write32_mask(rtwdev, REG_PRECTRL, BIT_IQ_WGT, 0x0);  in rtw8814a_adc_clk()
859 		if (hal->ch_param[0] == 0)  in rtw8814a_spur_calibration_ch140()
860 			hal->ch_param[0] = rtw_read32(rtwdev, REG_CCASEL);  in rtw8814a_spur_calibration_ch140()
861 		if (hal->ch_param[1] == 0)  in rtw8814a_spur_calibration_ch140()
864 		rtw_write32(rtwdev, REG_CCASEL, 0x75438170);  in rtw8814a_spur_calibration_ch140()
865 		rtw_write32(rtwdev, REG_PDMFTH, 0x79a18a0a);  in rtw8814a_spur_calibration_ch140()
867 		if (rtw_read32(rtwdev, REG_CCASEL) == 0x75438170 &&  in rtw8814a_spur_calibration_ch140()
868 		    hal->ch_param[0] != 0)  in rtw8814a_spur_calibration_ch140()
869 			rtw_write32(rtwdev, REG_CCASEL, hal->ch_param[0]);  in rtw8814a_spur_calibration_ch140()
871 		if (rtw_read32(rtwdev, REG_PDMFTH) == 0x79a18a0a &&  in rtw8814a_spur_calibration_ch140()
872 		    hal->ch_param[1] != 0)  in rtw8814a_spur_calibration_ch140()
875 		hal->ch_param[0] = rtw_read32(rtwdev, REG_CCASEL);  in rtw8814a_spur_calibration_ch140()
890 	u32 reg_idx = 0;  in rtw8814a_set_nbi_reg()
893 	for (i = 0; i < ARRAY_SIZE(nbi_128); i++) {  in rtw8814a_set_nbi_reg()
900 	rtw_write32_mask(rtwdev, REG_NBI_SETTING, 0xfc000, reg_idx);  in rtw8814a_set_nbi_reg()
923 	if (rfe_type != 0 && rfe_type != 1 && rfe_type != 6 && rfe_type != 7)  in rtw8814a_spur_nbi_setting()
931 		rtw_write32_mask(rtwdev, REG_NBI_SETTING, BIT_NBI_ENABLE, 0);  in rtw8814a_spur_nbi_setting()
940 	if (rfe_type == 0) {  in rtw8814a_spur_calibration()
945 						 0x000fe000, 0x3e >> 1);  in rtw8814a_spur_calibration()
947 						 BIT(0), 1);  in rtw8814a_spur_calibration()
948 				rtw_write32(rtwdev, REG_CSI_FIX_MASK0, 0);  in rtw8814a_spur_calibration()
950 						 BIT(0), 1);  in rtw8814a_spur_calibration()
951 				rtw_write32(rtwdev, REG_CSI_FIX_MASK6, 0);  in rtw8814a_spur_calibration()
952 				rtw_write32(rtwdev, REG_CSI_FIX_MASK7, 0);  in rtw8814a_spur_calibration()
957 						 0x000fe000, 0x1e >> 1);  in rtw8814a_spur_calibration()
959 						 BIT(0), 1);  in rtw8814a_spur_calibration()
962 				rtw_write32(rtwdev, REG_CSI_FIX_MASK1, 0);  in rtw8814a_spur_calibration()
963 				rtw_write32(rtwdev, REG_CSI_FIX_MASK6, 0);  in rtw8814a_spur_calibration()
964 				rtw_write32(rtwdev, REG_CSI_FIX_MASK7, 0);  in rtw8814a_spur_calibration()
972 						 0x000fe000, 0x3a >> 1);  in rtw8814a_spur_calibration()
974 						 BIT(0), 1);  in rtw8814a_spur_calibration()
975 				rtw_write32(rtwdev, REG_CSI_FIX_MASK0, 0);  in rtw8814a_spur_calibration()
976 				rtw_write32(rtwdev, REG_CSI_FIX_MASK1, 0);  in rtw8814a_spur_calibration()
977 				rtw_write32(rtwdev, REG_CSI_FIX_MASK6, 0);  in rtw8814a_spur_calibration()
979 						 BIT(0), 1);  in rtw8814a_spur_calibration()
984 						 0x000fe000, 0x5a >> 1);  in rtw8814a_spur_calibration()
986 						 BIT(0), 1);  in rtw8814a_spur_calibration()
987 				rtw_write32(rtwdev, REG_CSI_FIX_MASK0, 0);  in rtw8814a_spur_calibration()
988 				rtw_write32(rtwdev, REG_CSI_FIX_MASK1, 0);  in rtw8814a_spur_calibration()
991 				rtw_write32(rtwdev, REG_CSI_FIX_MASK7, 0);  in rtw8814a_spur_calibration()
999 						 0x000fe000, 0x1e >> 1);  in rtw8814a_spur_calibration()
1001 						 BIT(0), 1);  in rtw8814a_spur_calibration()
1002 				rtw_write32(rtwdev, REG_CSI_FIX_MASK0, 0);  in rtw8814a_spur_calibration()
1003 				rtw_write32(rtwdev, REG_CSI_FIX_MASK1, 0);  in rtw8814a_spur_calibration()
1004 				rtw_write32(rtwdev, REG_CSI_FIX_MASK6, 0);  in rtw8814a_spur_calibration()
1021 						 0x000fe000, 0x1E >> 1);  in rtw8814a_spur_calibration()
1023 						 BIT(0), 1);  in rtw8814a_spur_calibration()
1024 				rtw_write32(rtwdev, REG_CSI_FIX_MASK0, 0);  in rtw8814a_spur_calibration()
1025 				rtw_write32(rtwdev, REG_CSI_FIX_MASK1, 0);  in rtw8814a_spur_calibration()
1026 				rtw_write32(rtwdev, REG_CSI_FIX_MASK6, 0);  in rtw8814a_spur_calibration()
1036 						 0x000fe000, 0x1e >> 1);  in rtw8814a_spur_calibration()
1038 						 BIT(0), 1);  in rtw8814a_spur_calibration()
1041 				rtw_write32(rtwdev, REG_CSI_FIX_MASK1, 0);  in rtw8814a_spur_calibration()
1042 				rtw_write32(rtwdev, REG_CSI_FIX_MASK6, 0);  in rtw8814a_spur_calibration()
1043 				rtw_write32(rtwdev, REG_CSI_FIX_MASK7, 0);  in rtw8814a_spur_calibration()
1051 						 0x000fe000, 0x5a >> 1);  in rtw8814a_spur_calibration()
1053 						 BIT(0), 1);  in rtw8814a_spur_calibration()
1054 				rtw_write32(rtwdev, REG_CSI_FIX_MASK0, 0);  in rtw8814a_spur_calibration()
1055 				rtw_write32(rtwdev, REG_CSI_FIX_MASK1, 0);  in rtw8814a_spur_calibration()
1058 				rtw_write32(rtwdev, REG_CSI_FIX_MASK7, 0);  in rtw8814a_spur_calibration()
1070 				 0x000fe000, 0xfc >> 1);  in rtw8814a_spur_calibration()
1071 		rtw_write32_mask(rtwdev, REG_CSI_MASK_SETTING1, BIT(0), 0);  in rtw8814a_spur_calibration()
1072 		rtw_write32(rtwdev, REG_CSI_FIX_MASK0, 0);  in rtw8814a_spur_calibration()
1073 		rtw_write32(rtwdev, REG_CSI_FIX_MASK1, 0);  in rtw8814a_spur_calibration()
1074 		rtw_write32(rtwdev, REG_CSI_FIX_MASK6, 0);  in rtw8814a_spur_calibration()
1075 		rtw_write32(rtwdev, REG_CSI_FIX_MASK7, 0);  in rtw8814a_spur_calibration()
1084 	u8 txsc40 = 0, txsc20, txsc;  in rtw8814a_set_bw_mode()
1103 		rtw_write32_mask(rtwdev, REG_ADCCLK, 0x3c, txsc);  in rtw8814a_set_bw_mode()
1105 		rtw_write32_mask(rtwdev, REG_ADCCLK, 0x3c, txsc);  in rtw8814a_set_bw_mode()
1147 	s8 rx_pwr_all = 0;  in rtw8814a_cck_rx_pwr()
1251 		if (rfmode == 1 && subchannel == 0) {  in rtw8814a_query_phy_status()
1254 			if (subchannel == 0)  in rtw8814a_query_phy_status()
1278 	for (j = 0; j < rtw_rate_size[rs]; j++) {  in rtw8814a_set_tx_power_index_by_rate()
1285 		txagc_table_wd = 0x00801000;  in rtw8814a_set_tx_power_index_by_rate()
1303 	for (path = 0; path < hal->rf_path_num; path++) {  in rtw8814a_set_tx_power_index()
1381 	rtw_write32_set(rtwdev, REG_CNTRST, BIT(0));  in rtw8814a_false_alarm_statistics()
1382 	rtw_write32_clr(rtwdev, REG_CNTRST, BIT(0));  in rtw8814a_false_alarm_statistics()
1397 	for (i = 0; i < MAC_REG_NUM_8814; i++)  in rtw8814a_iqk_backup_mac_bb()
1400 	for (i = 0; i < BB_REG_NUM_8814; i++)  in rtw8814a_iqk_backup_mac_bb()
1410 	for (i = 0; i < RF_REG_NUM_8814; i++) {  in rtw8814a_iqk_backup_rf()
1426 		rtw_write32(rtwdev, REG_AFE_PWR1_A, 0x0e808003);  in rtw8814a_iqk_afe_setting()
1427 		rtw_write32(rtwdev, REG_AFE_PWR1_B, 0x0e808003);  in rtw8814a_iqk_afe_setting()
1428 		rtw_write32(rtwdev, REG_AFE_PWR1_C, 0x0e808003);  in rtw8814a_iqk_afe_setting()
1429 		rtw_write32(rtwdev, REG_AFE_PWR1_D, 0x0e808003);  in rtw8814a_iqk_afe_setting()
1431 		rtw_write32(rtwdev, REG_AFE_PWR1_A, 0x07808003);  in rtw8814a_iqk_afe_setting()
1432 		rtw_write32(rtwdev, REG_AFE_PWR1_B, 0x07808003);  in rtw8814a_iqk_afe_setting()
1433 		rtw_write32(rtwdev, REG_AFE_PWR1_C, 0x07808003);  in rtw8814a_iqk_afe_setting()
1434 		rtw_write32(rtwdev, REG_AFE_PWR1_D, 0x07808003);  in rtw8814a_iqk_afe_setting()
1437 	rtw_write32_mask(rtwdev, REG_DAC_RSTB, BIT(13), 0x1);  in rtw8814a_iqk_afe_setting()
1454 	for (i = 0; i < MAC_REG_NUM_8814; i++)  in rtw8814a_iqk_restore_mac_bb()
1457 	for (i = 0; i < BB_REG_NUM_8814; i++)  in rtw8814a_iqk_restore_mac_bb()
1467 	rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWE, RFREG_MASK, 0x0);  in rtw8814a_iqk_restore_rf()
1468 	rtw_write_rf(rtwdev, RF_PATH_B, RF_LUTWE, RFREG_MASK, 0x0);  in rtw8814a_iqk_restore_rf()
1469 	rtw_write_rf(rtwdev, RF_PATH_C, RF_LUTWE, RFREG_MASK, 0x0);  in rtw8814a_iqk_restore_rf()
1470 	rtw_write_rf(rtwdev, RF_PATH_D, RF_LUTWE, RFREG_MASK, 0x0);  in rtw8814a_iqk_restore_rf()
1472 	rtw_write_rf(rtwdev, RF_PATH_A, RF_RXBB2, RFREG_MASK, 0x88001);  in rtw8814a_iqk_restore_rf()
1473 	rtw_write_rf(rtwdev, RF_PATH_B, RF_RXBB2, RFREG_MASK, 0x88001);  in rtw8814a_iqk_restore_rf()
1474 	rtw_write_rf(rtwdev, RF_PATH_C, RF_RXBB2, RFREG_MASK, 0x88001);  in rtw8814a_iqk_restore_rf()
1475 	rtw_write_rf(rtwdev, RF_PATH_D, RF_RXBB2, RFREG_MASK, 0x88001);  in rtw8814a_iqk_restore_rf()
1477 	for (i = 0; i < RF_REG_NUM_8814; i++) {  in rtw8814a_iqk_restore_rf()
1491 	rtw_write32(rtwdev, 0x1b00, 0xf8000000);  in rtw8814a_iqk_reset_nctl()
1492 	rtw_write32(rtwdev, 0x1b80, 0x00000006);  in rtw8814a_iqk_reset_nctl()
1494 	rtw_write32(rtwdev, 0x1b00, 0xf8000000);  in rtw8814a_iqk_reset_nctl()
1495 	rtw_write32(rtwdev, 0x1b80, 0x00000002);  in rtw8814a_iqk_reset_nctl()
1500 	rtw_write8(rtwdev, REG_TXPAUSE, 0x3f);  in rtw8814a_iqk_configure_mac()
1505 	rtw_write8(rtwdev, REG_RXPSEL, 0x00);  in rtw8814a_iqk_configure_mac()
1507 	rtw_write32_mask(rtwdev, REG_CCA2ND, 0xf, 0xe);  in rtw8814a_iqk_configure_mac()
1510 	rtw_write32(rtwdev, REG_RFE_PINMUX_A, 0x77777777);  in rtw8814a_iqk_configure_mac()
1511 	rtw_write32(rtwdev, REG_RFE_PINMUX_B, 0x77777777);  in rtw8814a_iqk_configure_mac()
1512 	rtw_write32(rtwdev, REG_RFE_PINMUX_C, 0x77777777);  in rtw8814a_iqk_configure_mac()
1513 	rtw_write32(rtwdev, REG_RFE_PINMUX_D, 0x77777777);  in rtw8814a_iqk_configure_mac()
1514 	rtw_write32_mask(rtwdev, REG_RFE_INVSEL_D, BIT_RFE_SELSW0_D, 0x77);  in rtw8814a_iqk_configure_mac()
1515 	rtw_write32_mask(rtwdev, REG_PSD, BIT_PSD_INI, 0x0);  in rtw8814a_iqk_configure_mac()
1517 	rtw_write32_mask(rtwdev, REG_RFE_INV0, 0xf, 0x0);  in rtw8814a_iqk_configure_mac()
1528 	/* LOK: CMD ID = 0  in rtw8814a_lok_one_shot()
1529 	 * {0xf8000011, 0xf8000021, 0xf8000041, 0xf8000081}  in rtw8814a_lok_one_shot()
1531 	rtw_write32(rtwdev, 0x1b00, 0xf8000001 | (BIT(path) << 4));  in rtw8814a_lok_one_shot()
1537 			      rtwdev, 0x1b00, BIT(0))) {  in rtw8814a_lok_one_shot()
1542 		rtw_write_rf(rtwdev, path, RF_DTXLOK, RFREG_MASK, 0x08400);  in rtw8814a_lok_one_shot()
1547 	rtw_write32(rtwdev, 0x1b00, 0xf8000000 | (path << 1));  in rtw8814a_lok_one_shot()
1548 	rtw_write32(rtwdev, 0x1bd4, 0x003f0001);  in rtw8814a_lok_one_shot()
1550 	lok_temp2 = rtw_read32_mask(rtwdev, 0x1bfc, 0x003e0000);  in rtw8814a_lok_one_shot()
1551 	lok_temp2 = (lok_temp2 + 0x10) & 0x1f;  in rtw8814a_lok_one_shot()
1553 	lok_temp1 = rtw_read32_mask(rtwdev, 0x1bfc, 0x0000003e);  in rtw8814a_lok_one_shot()
1554 	lok_temp1 = (lok_temp1 + 0x10) & 0x1f;  in rtw8814a_lok_one_shot()
1565 	rtw_write_rf(rtwdev, path, RF_DTXLOK, 0x07c00, lok_temp1 >> 4);  in rtw8814a_lok_one_shot()
1566 	rtw_write_rf(rtwdev, path, RF_DTXLOK, 0xf8000, lok_temp2 >> 4);  in rtw8814a_lok_one_shot()
1576 	for (cal_retry = 0; cal_retry < 4; cal_retry++) {  in rtw8814a_iqk_tx_one_shot()
1579 		iqk_cmd = 0xf8000001 | ((bw + 3) << 8) | (BIT(path) << 4);  in rtw8814a_iqk_tx_one_shot()
1583 		rtw_write32(rtwdev, 0x1b00, iqk_cmd);  in rtw8814a_iqk_tx_one_shot()
1589 				      rtwdev, 0x1b00, BIT(0))) {  in rtw8814a_iqk_tx_one_shot()
1595 			*tx_ok = !rtw_read32_mask(rtwdev, 0x1b08, BIT(26));  in rtw8814a_iqk_tx_one_shot()
1602 	rtw_dbg(rtwdev, RTW_DBG_RFK, "S%d tx ==> 0x1b00 = 0x%x\n",  in rtw8814a_iqk_tx_one_shot()
1603 		path, rtw_read32(rtwdev, 0x1b00));  in rtw8814a_iqk_tx_one_shot()
1604 	rtw_dbg(rtwdev, RTW_DBG_RFK, "S%d tx ==> 0x1b08 = 0x%x\n",  in rtw8814a_iqk_tx_one_shot()
1605 		path, rtw_read32(rtwdev, 0x1b08));  in rtw8814a_iqk_tx_one_shot()
1609 	rtw_write32(rtwdev, 0x1b00, 0xf8000000 | (path << 1));  in rtw8814a_iqk_tx_one_shot()
1612 		*tx_matrix = rtw_read32(rtwdev, 0x1b38);  in rtw8814a_iqk_tx_one_shot()
1614 		rtw_dbg(rtwdev, RTW_DBG_RFK, "S%d_IQC = 0x%x\n",  in rtw8814a_iqk_tx_one_shot()
1632 	for (cal_retry = 0; cal_retry < 4; cal_retry++) {  in rtw8814a_iqk_rx_one_shot()
1636 			rtw_write_rf(rtwdev, path, RF_LUTDBG, BIT(11), 0x1);  in rtw8814a_iqk_rx_one_shot()
1637 			rtw_write_rf(rtwdev, path, RF_GAINTX, 0xfffff, 0x51ce1);  in rtw8814a_iqk_rx_one_shot()
1640 			case 0:  in rtw8814a_iqk_rx_one_shot()
1643 					    0x54775477);  in rtw8814a_iqk_rx_one_shot()
1647 					    0x54775477);  in rtw8814a_iqk_rx_one_shot()
1650 				rtw_write32(rtwdev, REG_RFE_INVSEL_D, 0x75400000);  in rtw8814a_iqk_rx_one_shot()
1652 					    0x77777777);  in rtw8814a_iqk_rx_one_shot()
1657 		iqk_cmd = 0xf8000001 | ((9 - bw) << 8) | (BIT(path) << 4);  in rtw8814a_iqk_rx_one_shot()
1659 		rtw_dbg(rtwdev, RTW_DBG_RFK, "RXK_Trigger = 0x%x\n", iqk_cmd);  in rtw8814a_iqk_rx_one_shot()
1661 		rtw_write32(rtwdev, 0x1b00, iqk_cmd);  in rtw8814a_iqk_rx_one_shot()
1667 				      rtwdev, 0x1b00, BIT(0))) {  in rtw8814a_iqk_rx_one_shot()
1673 			rx_ok = !rtw_read32_mask(rtwdev, 0x1b08, BIT(26));  in rtw8814a_iqk_rx_one_shot()
1680 	rtw_dbg(rtwdev, RTW_DBG_RFK, "S%d rx ==> 0x1b00 = 0x%x\n",  in rtw8814a_iqk_rx_one_shot()
1681 		path, rtw_read32(rtwdev, 0x1b00));  in rtw8814a_iqk_rx_one_shot()
1682 	rtw_dbg(rtwdev, RTW_DBG_RFK, "S%d rx ==> 0x1b08 = 0x%x\n",  in rtw8814a_iqk_rx_one_shot()
1683 		path, rtw_read32(rtwdev, 0x1b08));  in rtw8814a_iqk_rx_one_shot()
1687 	rtw_write32(rtwdev, 0x1b00, 0xf8000000 | (path << 1));  in rtw8814a_iqk_rx_one_shot()
1690 		rtw_write32(rtwdev, 0x1b3c, 0x20000000);  in rtw8814a_iqk_rx_one_shot()
1691 		rx_matrix = rtw_read32(rtwdev, 0x1b3c);  in rtw8814a_iqk_rx_one_shot()
1693 		rtw_dbg(rtwdev, RTW_DBG_RFK, "S%d_IQC = 0x%x\n",  in rtw8814a_iqk_rx_one_shot()
1698 		rtw_write32(rtwdev, 0x1b38, *tx_matrix);  in rtw8814a_iqk_rx_one_shot()
1700 		rtw_write32_mask(rtwdev, iqk_apply[path], BIT(0), 0x0);  in rtw8814a_iqk_rx_one_shot()
1704 				 BIT(11) | BIT(10), 0x0);  in rtw8814a_iqk_rx_one_shot()
1707 		rtw_write_rf(rtwdev, path, RF_LUTDBG, BIT(11), 0x0);  in rtw8814a_iqk_rx_one_shot()
1721 	rtw_write_rf(rtwdev, RF_PATH_A, RF_TXMOD, BIT(19), 0x1);  in rtw8814a_iqk()
1722 	rtw_write_rf(rtwdev, RF_PATH_B, RF_TXMOD, BIT(19), 0x1);  in rtw8814a_iqk()
1723 	rtw_write_rf(rtwdev, RF_PATH_C, RF_TXMOD, BIT(19), 0x1);  in rtw8814a_iqk()
1724 	rtw_write_rf(rtwdev, RF_PATH_D, RF_TXMOD, BIT(19), 0x1);  in rtw8814a_iqk()
1727 			 (BIT(11) | BIT(10) | BIT(0)), 0x401);  in rtw8814a_iqk()
1729 			 (BIT(11) | BIT(10) | BIT(0)), 0x401);  in rtw8814a_iqk()
1731 			 (BIT(11) | BIT(10) | BIT(0)), 0x401);  in rtw8814a_iqk()
1733 			 (BIT(11) | BIT(10) | BIT(0)), 0x401);  in rtw8814a_iqk()
1736 		rtw_write32(rtwdev, 0x1b00, 0xf8000ff1);  in rtw8814a_iqk()
1738 		rtw_write32(rtwdev, 0x1b00, 0xf8000ef1);  in rtw8814a_iqk()
1742 	rtw_write32(rtwdev, 0x810, 0x20101063);  in rtw8814a_iqk()
1743 	rtw_write32(rtwdev, REG_DAC_RSTB, 0x0B00C000);  in rtw8814a_iqk()
1759 	static const u32 backup_mac_reg[MAC_REG_NUM_8814] = {0x520, 0x550};  in rtw8814a_do_iqk()
1761 		0xa14, 0x808, 0x838, 0x90c, 0x810, 0xcb0, 0xeb0,  in rtw8814a_do_iqk()
1762 		0x18b4, 0x1ab4, 0x1abc, 0x9a4, 0x764, 0xcbc, 0x910  in rtw8814a_do_iqk()
1764 	static const u32 backup_rf_reg[RF_REG_NUM_8814] = {0x0};  in rtw8814a_do_iqk()
1834 	u8 max_tx_pwr_idx_offset = 0xf;  in rtw8814a_txagc_swing_offset()
1835 	u8 swing_lower_bound = 0;  in rtw8814a_txagc_swing_offset()
1836 	s8 agc_index = 0;  in rtw8814a_txagc_swing_offset()
1840 	if (delta_pwr_idx >= 0) {  in rtw8814a_txagc_swing_offset()
1858 		agc_index = 0;  in rtw8814a_txagc_swing_offset()
1939 	if (rtwdev->efuse.thermal_meter[RF_PATH_A] == 0xff)  in rtw8814a_phy_pwrtrack()
1942 	thermal_value = rtw_read_rf(rtwdev, RF_PATH_A, RF_T_METER, 0xfc00);  in rtw8814a_phy_pwrtrack()
1966 			     GENMASK(17, 16), 0x03);  in rtw8814a_pwr_track()
1977 	static const u8 pd[CCK_PD_LV_MAX] = {0x40, 0x83, 0xcd, 0xdd, 0xed};  in rtw8814a_phy_cck_pd_set()
2025 		led_gpio_cfg &= ~(BIT(0) | BIT(1) | BIT(5) | BIT(6));  in rtw8814a_led_set()
2114 	{0, 0, 0, 0, 0},	/* hq nq lq exq gapq */
2116 	{32, 32, 32, 32, 0},
2118 	{32, 32, 32, 32, 0},
2120 	{32, 32, 32, 32, 0},
2122 	{32, 32, 32, 32, 0},
2128 	[0] = { .addr = 0xc50, .mask = 0x7f },
2129 	[1] = { .addr = 0xe50, .mask = 0x7f },
2130 	[2] = { .addr = 0x1850, .mask = 0x7f },
2131 	[3] = { .addr = 0x1a50, .mask = 0x7f },
2135 	[0] = { .phy_pg_tbl	= &rtw8814a_bb_pg_type0_tbl,
2149 	{0, 0, false, 7},  /* for normal */
2150 	{0, 16, false, 7}, /* for WL-CPT */
2151 	{4, 0, true, 1},
2158 	{0, 0, false, 7},  /* for normal */
2159 	{0, 16, false, 7}, /* for WL-CPT */
2160 	{4, 0, true, 1},
2179 	.ptct_efuse_size = 0,
2185 	.csi_buf_pg_num = 0,
2186 	.dig_min = 0x1c,
2190 	.max_power_index = 0x3f,
2199 	.sys_func_en = 0xDC,
2208 	.rf_base_addr = {0x2800, 0x2c00, 0x3800, 0x3c00},
2209 	.rf_sipi_addr = {0xc90, 0xe90, 0x1890, 0x1a90},
2221 	.coex_para_ver = 0,
2222 	.bt_desired_ver = 0,
2233 	.table_sant_num = 0,
2235 	.table_nsant_num = 0,
2237 	.tdma_sant_num = 0,
2239 	.tdma_nsant_num = 0,
2244 	.bt_afh_span_bw20 = 0x24,
2245 	.bt_afh_span_bw40 = 0x36,
2246 	.afh_5g_num = 0,
2248 	.coex_info_hw_regs_num = 0,