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/linux-5.10/Documentation/devicetree/bindings/clock/
Dlsi,axm5516-clks.txt18 reg = <0x20 0x10020000 0 0x20000>;
23 reg = <0x20 0x10080000 0 0x1000>;
/linux-5.10/arch/arm/boot/dts/
Dlpc4350.dtsi18 cpu@0 {
26 reg = <0x10000000 0x20000>; /* 96 + 32 KiB local SRAM */
31 reg = <0x10080000 0x12000>; /* 64 + 8 KiB local SRAM */
36 reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
Dlpc4357.dtsi18 cpu@0 {
26 reg = <0x10000000 0x8000>; /* 32 KiB local SRAM */
31 reg = <0x10080000 0xa000>; /* 32 + 8 KiB local SRAM */
36 reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
Daxm55xx.dtsi32 #clock-cells = <0>;
38 #clock-cells = <0>;
44 #clock-cells = <0>;
51 reg = <0x20 0x10020000 0 0x20000>;
58 #address-cells = <0>;
60 reg = <0x20 0x01001000 0 0x1000>,
61 <0x20 0x01002000 0 0x2000>,
62 <0x20 0x01004000 0 0x2000>,
63 <0x20 0x01006000 0 0x2000>;
97 reg = <0x20 0x10030000 0 0x2000>;
[all …]
Drk3188.dtsi18 #size-cells = <0>;
21 cpu0: cpu@0 {
25 reg = <0x0>;
35 reg = <0x1>;
43 reg = <0x2>;
51 reg = <0x3>;
104 reg = <0x10080000 0x8000>;
107 ranges = <0 0x10080000 0x8000>;
109 smp-sram@0 {
111 reg = <0x0 0x50>;
[all …]
Drk3036.dtsi33 #size-cells = <0>;
39 reg = <0xf00>;
52 reg = <0xf01>;
65 reg = <0x20078000 0x4000>;
66 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
102 #clock-cells = <0>;
107 reg = <0x10080000 0x2000>;
110 ranges = <0 0x10080000 0x2000>;
112 smp-sram@0 {
114 reg = <0x00 0x10>;
[all …]
Drk3066a.dtsi18 #size-cells = <0>;
21 cpu0: cpu@0 {
25 reg = <0x0>;
43 reg = <0x1>;
54 reg = <0x10080000 0x10000>;
57 ranges = <0 0x10080000 0x10000>;
59 smp-sram@0 {
61 reg = <0x0 0x50>;
67 reg = <0x1010c000 0x19c>;
82 #size-cells = <0>;
[all …]
Drv1108.dtsi29 #size-cells = <0>;
34 reg = <0xf00>;
85 #clock-cells = <0>;
96 reg = <0x102a0000 0x4000>;
97 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
108 reg = <0x10080000 0x2000>;
111 ranges = <0 0x10080000 0x2000>;
116 reg = <0x10210000 0x100>;
125 pinctrl-0 = <&uart2m0_xfer>;
131 reg = <0x10220000 0x100>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/sram/
Dsram.yaml143 reg = <0x5c000000 0x40000>; /* 256 KiB SRAM at address 0x5c000000 */
147 ranges = <0 0x5c000000 0x40000>;
150 reg = <0x100 0x50>;
154 reg = <0x1000 0x1000>;
159 reg = <0x20000 0x20000>;
174 reg = <0x02020000 0x54000>;
177 ranges = <0 0x02020000 0x54000>;
179 smp-sram@0 {
181 reg = <0x0 0x1000>;
186 reg = <0x53000 0x1000>;
[all …]
/linux-5.10/arch/m68k/coldfire/
Dm53xx.c30 DEFINE_CLK(0, "flexbus", 2, MCF_CLK);
31 DEFINE_CLK(0, "mcfcan.0", 8, MCF_CLK);
32 DEFINE_CLK(0, "fec.0", 12, MCF_CLK);
33 DEFINE_CLK(0, "edma", 17, MCF_CLK);
34 DEFINE_CLK(0, "intc.0", 18, MCF_CLK);
35 DEFINE_CLK(0, "intc.1", 19, MCF_CLK);
36 DEFINE_CLK(0, "iack.0", 21, MCF_CLK);
37 DEFINE_CLK(0, "imx1-i2c.0", 22, MCF_CLK);
38 DEFINE_CLK(0, "mcfqspi.0", 23, MCF_CLK);
39 DEFINE_CLK(0, "mcfuart.0", 24, MCF_BUSCLK);
[all …]
/linux-5.10/arch/mips/boot/dts/loongson/
Dls7a-pch.dtsi8 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
9 0 0x20000000 0 0x20000000 0 0x10000000
10 0 0x40000000 0 0x40000000 0 0x40000000 /* PCI MEM */
11 0xe00 0x00000000 0xe00 0x00000000 0x100 0x0000000>;
15 reg = <0 0x10000000 0 0x400>;
18 loongson,pic-base-vec = <0>;
24 reg = <0 0x10080000 0 0x100>;
34 reg = <0 0x10080100 0 0x100>;
44 reg = <0 0x10080200 0 0x100>;
54 reg = <0 0x10080300 0 0x100>;
[all …]
/linux-5.10/arch/powerpc/include/asm/
Dreg.h50 #define MSR_FE0_LG 11 /* Floating Exception mode 0 */
55 #define MSR_IP_LG 6 /* Exception prefix 0x000/0xFFF */
62 #define MSR_LE_LG 0 /* Little Endian */
77 #define MSR_SF 0
78 #define MSR_ISF 0
79 #define MSR_HV 0
80 #define MSR_S 0
88 #define MSR_SPE 0
102 #define MSR_FE0 __MASK(MSR_FE0_LG) /* Floating Exception mode 0 */
107 #define MSR_IP __MASK(MSR_IP_LG) /* Exception prefix 0x000/0xFFF */
[all …]