/linux-5.10/drivers/gpu/drm/amd/display/dc/core/ |
D | dc_hw_sequencer.c | 33 #define NUM_ELEMENTS(a) (sizeof(a) / sizeof((a)[0])) 37 BLACK_COLOR_FORMAT_RGB_FULLRANGE = 0, 58 {0, 0, 0}, 60 {0x40, 0x40, 0x40}, 62 {0x200, 0x40, 0x200}, 64 {0x1f4, 0x40, 0x1f4}, 66 {0x1a2, 0x20, 0x1a2}, 68 {0xff, 0xff, 0}, 78 { 0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} }, 80 { 0x1B67, 0, 0, 0x201, 0, 0x1B67, 0, 0x201, 0, 0, 0x1B67, 0x201} }, [all …]
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/linux-5.10/include/linux/mtd/ |
D | doc2000.h | 17 #define DoC_Sig1 0 20 #define DoC_ChipID 0x1000 21 #define DoC_DOCStatus 0x1001 22 #define DoC_DOCControl 0x1002 23 #define DoC_FloorSelect 0x1003 24 #define DoC_CDSNControl 0x1004 25 #define DoC_CDSNDeviceSelect 0x1005 26 #define DoC_ECCConf 0x1006 27 #define DoC_2k_ECCStatus 0x1007 29 #define DoC_CDSNSlowIO 0x100d [all …]
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/linux-5.10/arch/x86/include/uapi/asm/ |
D | prctl.h | 5 #define ARCH_SET_GS 0x1001 6 #define ARCH_SET_FS 0x1002 7 #define ARCH_GET_FS 0x1003 8 #define ARCH_GET_GS 0x1004 10 #define ARCH_GET_CPUID 0x1011 11 #define ARCH_SET_CPUID 0x1012 13 #define ARCH_MAP_VDSO_X32 0x2001 14 #define ARCH_MAP_VDSO_32 0x2002 15 #define ARCH_MAP_VDSO_64 0x2003
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/linux-5.10/tools/arch/x86/include/uapi/asm/ |
D | prctl.h | 5 #define ARCH_SET_GS 0x1001 6 #define ARCH_SET_FS 0x1002 7 #define ARCH_GET_FS 0x1003 8 #define ARCH_GET_GS 0x1004 10 #define ARCH_GET_CPUID 0x1011 11 #define ARCH_SET_CPUID 0x1012 13 #define ARCH_MAP_VDSO_X32 0x2001 14 #define ARCH_MAP_VDSO_32 0x2002 15 #define ARCH_MAP_VDSO_64 0x2003
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/linux-5.10/drivers/clk/qcom/ |
D | gpucc-sc7180.c | 20 #define CX_GMU_CBCR_SLEEP_MASK 0xF 22 #define CX_GMU_CBCR_WAKE_MASK 0xF 25 #define CLK_DIS_WAIT_MASK (0xf << CLK_DIS_WAIT_SHIFT) 38 { 249600000, 2000000000, 0 }, 42 .offset = 0x100, 59 { P_BI_TCXO, 0 }, 73 F(19200000, P_BI_TCXO, 1, 0, 0), 74 F(200000000, P_GPLL0_OUT_MAIN_DIV, 1.5, 0, 0), 79 .cmd_rcgr = 0x1120, 80 .mnd_width = 0, [all …]
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D | gpucc-sm8150.c | 31 { 249600000, 2000000000, 0 }, 35 .l = 0x1a, 36 .alpha = 0xaaa, 37 .config_ctl_val = 0x20485699, 38 .config_ctl_hi_val = 0x00002267, 39 .config_ctl_hi1_val = 0x00000024, 40 .test_ctl_val = 0x00000000, 41 .test_ctl_hi_val = 0x00000002, 42 .test_ctl_hi1_val = 0x00000000, 43 .user_ctl_val = 0x00000000, [all …]
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D | gpucc-sm8250.c | 22 #define CX_GMU_CBCR_SLEEP_MASK 0xf 24 #define CX_GMU_CBCR_WAKE_MASK 0xf 37 { 249600000, 2000000000, 0 }, 41 .l = 0x1a, 42 .alpha = 0xaaa, 43 .config_ctl_val = 0x20485699, 44 .config_ctl_hi_val = 0x00002261, 45 .config_ctl_hi1_val = 0x029a699c, 46 .user_ctl_val = 0x00000000, 47 .user_ctl_hi_val = 0x00000805, [all …]
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/linux-5.10/include/linux/ |
D | kernelcapi.h | 19 #define CAPI_NOERROR 0x0000 21 #define CAPI_TOOMANYAPPLS 0x1001 22 #define CAPI_LOGBLKSIZETOSMALL 0x1002 23 #define CAPI_BUFFEXECEEDS64K 0x1003 24 #define CAPI_MSGBUFSIZETOOSMALL 0x1004 25 #define CAPI_ANZLOGCONNNOTSUPPORTED 0x1005 26 #define CAPI_REGRESERVED 0x1006 27 #define CAPI_REGBUSY 0x1007 28 #define CAPI_REGOSRESOURCEERR 0x1008 29 #define CAPI_REGNOTINSTALLED 0x1009 [all …]
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/linux-5.10/arch/xtensa/include/asm/ |
D | bootparam.h | 18 #define BP_VERSION 0x0001 20 #define BP_TAG_COMMAND_LINE 0x1001 /* command line (0-terminated string)*/ 21 #define BP_TAG_INITRD 0x1002 /* ramdisk addr and size (bp_meminfo) */ 22 #define BP_TAG_MEMORY 0x1003 /* memory addr and size (bp_meminfo) */ 23 #define BP_TAG_SERIAL_BAUDRATE 0x1004 /* baud rate of current console. */ 24 #define BP_TAG_SERIAL_PORT 0x1005 /* serial device of current console */ 25 #define BP_TAG_FDT 0x1006 /* flat device tree addr */ 27 #define BP_TAG_FIRST 0x7B0B /* first tag with a version number */ 28 #define BP_TAG_LAST 0x7E0B /* last tag */ 37 unsigned long data[0]; /* data */ [all …]
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/linux-5.10/arch/m68k/include/asm/ |
D | mac_psc.h | 37 #define PSC_BASE (0x50F31000) 44 * To access a particular set of registers, add 0xn0 to the base 48 #define pIFRbase 0x100 49 #define pIERbase 0x104 55 #define PSC_MYSTERY 0x804 57 #define PSC_CTL_BASE 0xC00 59 #define PSC_SCSI_CTL 0xC00 60 #define PSC_ENETRD_CTL 0xC10 61 #define PSC_ENETWR_CTL 0xC20 62 #define PSC_FDC_CTL 0xC30 [all …]
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/linux-5.10/Documentation/devicetree/bindings/timer/ |
D | renesas,cmt.yaml | 162 reg = <0xffca0000 0x1004>; 173 reg = <0xe6130000 0x1004>;
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/linux-5.10/arch/arm/mach-pxa/ |
D | pcm990_baseboard.h | 29 #define PCM990_CTRL_REG0 0x0000 /* RESET REGISTER */ 30 #define PCM990_CTRL_SYSRES 0x0001 /* System RESET REGISTER */ 31 #define PCM990_CTRL_RESOUT 0x0002 /* RESETOUT Enable REGISTER */ 32 #define PCM990_CTRL_RESGPIO 0x0004 /* RESETGPIO Enable REGISTER */ 34 #define PCM990_CTRL_REG1 0x0002 /* Power REGISTER */ 35 #define PCM990_CTRL_5VOFF 0x0001 /* Disable 5V Regulators */ 36 #define PCM990_CTRL_CANPWR 0x0004 /* Enable CANPWR ADUM */ 37 #define PCM990_CTRL_PM_5V 0x0008 /* Read 5V OK */ 39 #define PCM990_CTRL_REG2 0x0004 /* LED REGISTER */ 40 #define PCM990_CTRL_LEDPWR 0x0001 /* POWER LED enable */ [all …]
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/linux-5.10/drivers/power/reset/ |
D | axxia-reset.c | 19 #define SC_CRIT_WRITE_KEY 0x1000 20 #define SC_LATCH_ON_RESET 0x1004 21 #define SC_RESET_CONTROL 0x1008 25 #define RSTCTL_RST_SYS (1<<0) 26 #define SC_EFUSE_INT_STATUS 0x180c 34 /* Access Key (0xab) */ in axxia_restart_handler() 35 regmap_write(syscon, SC_CRIT_WRITE_KEY, 0xab); in axxia_restart_handler() 36 /* Select internal boot from 0xffff0000 */ in axxia_restart_handler() 37 regmap_write(syscon, SC_LATCH_ON_RESET, 0x00000040); in axxia_restart_handler()
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/linux-5.10/include/linux/soc/samsung/ |
D | exynos-regs-pmu.h | 17 #define S5P_CENTRAL_SEQ_CONFIGURATION 0x0200 21 #define S5P_CENTRAL_SEQ_OPTION 0x0208 42 #define EXYNOS_SWRESET 0x0400 44 #define S5P_WAKEUP_STAT 0x0600 46 #define EXYNOS_EINT_WAKEUP_MASK_DISABLED 0xffffffff 47 #define EXYNOS_EINT_WAKEUP_MASK 0x0604 48 #define S5P_WAKEUP_MASK 0x0608 49 #define S5P_WAKEUP_MASK2 0x0614 52 #define EXYNOS4_MIPI_PHY_CONTROL(n) (0x0710 + (n) * 4) 54 #define EXYNOS4_PHY_ENABLE (1 << 0) [all …]
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/linux-5.10/drivers/media/platform/exynos4-is/ |
D | fimc-is-command.h | 21 #define HIC_PREVIEW_STILL 0x0001 22 #define HIC_PREVIEW_VIDEO 0x0002 23 #define HIC_CAPTURE_STILL 0x0003 24 #define HIC_CAPTURE_VIDEO 0x0004 25 #define HIC_STREAM_ON 0x0005 26 #define HIC_STREAM_OFF 0x0006 27 #define HIC_SET_PARAMETER 0x0007 28 #define HIC_GET_PARAMETER 0x0008 29 #define HIC_SET_TUNE 0x0009 30 #define HIC_GET_STATUS 0x000b [all …]
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/linux-5.10/arch/s390/include/asm/ |
D | irq.h | 5 #define EXT_INTERRUPT 0 15 #define EXT_IRQ_INTERRUPT_KEY 0x0040 16 #define EXT_IRQ_CLK_COMP 0x1004 17 #define EXT_IRQ_CPU_TIMER 0x1005 18 #define EXT_IRQ_WARNING_TRACK 0x1007 19 #define EXT_IRQ_MALFUNC_ALERT 0x1200 20 #define EXT_IRQ_EMERGENCY_SIG 0x1201 21 #define EXT_IRQ_EXTERNAL_CALL 0x1202 22 #define EXT_IRQ_TIMING_ALERT 0x1406 23 #define EXT_IRQ_MEASURE_ALERT 0x1407 [all …]
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/linux-5.10/arch/parisc/include/uapi/asm/ |
D | socket.h | 9 #define SOL_SOCKET 0xffff 11 #define SO_DEBUG 0x0001 12 #define SO_REUSEADDR 0x0004 13 #define SO_KEEPALIVE 0x0008 14 #define SO_DONTROUTE 0x0010 15 #define SO_BROADCAST 0x0020 16 #define SO_LINGER 0x0080 17 #define SO_OOBINLINE 0x0100 18 #define SO_REUSEPORT 0x0200 19 #define SO_SNDBUF 0x1001 [all …]
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/linux-5.10/drivers/net/ethernet/huawei/hinic/ |
D | hinic_hw_csr.h | 11 #define HINIC_CSR_FUNC_ATTR0_ADDR 0x0 12 #define HINIC_CSR_FUNC_ATTR1_ADDR 0x4 13 #define HINIC_CSR_FUNC_ATTR2_ADDR 0x8 14 #define HINIC_CSR_FUNC_ATTR4_ADDR 0x10 15 #define HINIC_CSR_FUNC_ATTR5_ADDR 0x14 17 #define HINIC_DMA_ATTR_BASE 0xC80 18 #define HINIC_ELECTION_BASE 0x4200 20 #define HINIC_DMA_ATTR_STRIDE 0x4 24 #define HINIC_PPF_ELECTION_STRIDE 0x4 31 #define HINIC_CSR_API_CMD_BASE 0xF000 [all …]
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/linux-5.10/drivers/usb/serial/ |
D | qcaux.c | 28 #define UTSTARCOM_VENDOR_ID 0x106c 29 #define UTSTARCOM_PRODUCT_PC5740 0x3701 30 #define UTSTARCOM_PRODUCT_PC5750 0x3702 /* aka Pantech PX-500 */ 31 #define UTSTARCOM_PRODUCT_UM150 0x3711 32 #define UTSTARCOM_PRODUCT_UM175_V1 0x3712 33 #define UTSTARCOM_PRODUCT_UM175_V2 0x3714 34 #define UTSTARCOM_PRODUCT_UM175_ALLTEL 0x3715 37 #define CMOTECH_VENDOR_ID 0x16d8 38 #define CMOTECH_PRODUCT_CDU550 0x5553 39 #define CMOTECH_PRODUCT_CDX650 0x6512 [all …]
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D | usb-serial-simple.c | 38 { USB_DEVICE(0x0a21, 0x8001) } /* MMT-7305WW */ 43 { USB_DEVICE(0x1CBE, 0x0103) } 48 { USB_DEVICE(0x1404, 0xcddc) } 53 { USB_DEVICE_INTERFACE_CLASS(0x058b, 0x0041, USB_CLASS_CDC_DATA) }, \ 54 { USB_DEVICE(0x8087, 0x0716) }, \ 55 { USB_DEVICE(0x8087, 0x0801) } 60 { USB_VENDOR_AND_INTERFACE_INFO(0x18d1, \ 62 0x50, \ 63 0x01) } 68 { USB_DEVICE(0x1209, 0x8b00) } [all …]
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/linux-5.10/sound/soc/qcom/qdsp6/ |
D | q6asm.h | 8 #define CMD_PAUSE 0x0001 9 #define ASM_CLIENT_EVENT_CMD_PAUSE_DONE 0x1001 10 #define CMD_FLUSH 0x0002 11 #define ASM_CLIENT_EVENT_CMD_FLUSH_DONE 0x1002 12 #define CMD_EOS 0x0003 13 #define ASM_CLIENT_EVENT_CMD_EOS_DONE 0x1003 14 #define CMD_CLOSE 0x0004 15 #define ASM_CLIENT_EVENT_CMD_CLOSE_DONE 0x1004 16 #define CMD_OUT_FLUSH 0x0005 17 #define ASM_CLIENT_EVENT_CMD_OUT_FLUSH_DONE 0x1005 [all …]
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/linux-5.10/arch/mips/include/uapi/asm/ |
D | socket.h | 21 #define SOL_SOCKET 0xffff 23 #define SO_DEBUG 0x0001 /* Record debugging information. */ 24 #define SO_REUSEADDR 0x0004 /* Allow reuse of local addresses. */ 25 #define SO_KEEPALIVE 0x0008 /* Keep connections alive and send 27 #define SO_DONTROUTE 0x0010 /* Don't do local routing. */ 28 #define SO_BROADCAST 0x0020 /* Allow transmission of 30 #define SO_LINGER 0x0080 /* Block on close of a reliable 32 #define SO_OOBINLINE 0x0100 /* Receive out-of-band data in-band. */ 33 #define SO_REUSEPORT 0x0200 /* Allow local address and port reuse. */ 35 #define SO_TYPE 0x1008 /* Compatible name for SO_STYLE. */ [all …]
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/linux-5.10/sound/soc/kirkwood/ |
D | kirkwood.h | 13 #define KIRKWOOD_RECORD_WIN 0 17 #define KIRKWOOD_AUDIO_WIN_BASE_REG(win) (0xA00 + ((win)<<3)) 18 #define KIRKWOOD_AUDIO_WIN_CTRL_REG(win) (0xA04 + ((win)<<3)) 21 #define KIRKWOOD_RECCTL 0x1000 31 #define KIRKWOOD_RECCTL_MONO_CHAN_LEFT (0<<3) 32 #define KIRKWOOD_RECCTL_SIZE_MASK (7<<0) 33 #define KIRKWOOD_RECCTL_SIZE_16 (7<<0) 34 #define KIRKWOOD_RECCTL_SIZE_16_C (3<<0) 35 #define KIRKWOOD_RECCTL_SIZE_20 (2<<0) 36 #define KIRKWOOD_RECCTL_SIZE_24 (1<<0) [all …]
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/linux-5.10/include/uapi/linux/ |
D | media-bus-format.h | 16 * These bus formats uniquely identify data formats on the data bus. Format 0 35 #define MEDIA_BUS_FMT_FIXED 0x0001 37 /* RGB - next is 0x101d */ 38 #define MEDIA_BUS_FMT_RGB444_1X12 0x1016 39 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x1001 40 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x1002 41 #define MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE 0x1003 42 #define MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE 0x1004 43 #define MEDIA_BUS_FMT_RGB565_1X16 0x1017 44 #define MEDIA_BUS_FMT_BGR565_2X8_BE 0x1005 [all …]
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/linux-5.10/drivers/net/ethernet/ezchip/ |
D | nps_enet.h | 10 #define NPS_ENET_NAPI_POLL_WEIGHT 0x2 11 #define NPS_ENET_MAX_FRAME_LENGTH 0x3FFF 12 #define NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR 0x7 13 #define NPS_ENET_GE_MAC_CFG_0_RX_IFG 0x5 14 #define NPS_ENET_GE_MAC_CFG_0_TX_IFG 0xC 15 #define NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN 0x7 16 #define NPS_ENET_GE_MAC_CFG_2_STAT_EN 0x3 17 #define NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH 0x14 18 #define NPS_ENET_GE_MAC_CFG_3_MAX_LEN 0x3FFC 20 #define NPS_ENET_DISABLE 0 [all …]
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