| /qemu/scripts/ |
| H A D | xml-preprocess-test.py | 5 # SPDX-License-Identifier: MIT
6 """Unit tests for xml-preprocess"""
17 xmlpp = importlib.import_module("xml-preprocess")
21 """Tests for xml-preprocess.Preprocessor"""
25 temp_file.write("<root></root>")
28 self.assertEqual(result, "<root></root>")
34 xmlpp.save_xml("<root></root>", temp_file_name)
52 xml_str = "<root>$(env.TEST_ENV_VAR)</root>"
53 expected = "<root>TestValue</root>"
60 xml_str = "<root>$(sys.ARCH)</root>"
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| /qemu/tests/unit/ |
| H A D | test-interval-tree.c | 5 * See the COPYING.LIB file in the top-level directory.
10 #include "qemu/interval-tree.h"
13 static IntervalTreeRoot root; variable
19 if (last - start > INT32_MAX) { in rand_interval()
22 l_max = last - start; in rand_interval()
27 n->start = start + s_ofs; in rand_interval()
28 n->last = start + l_ofs; in rand_interval()
33 g_assert(root.rb_root.rb_node == NULL); in test_empty()
34 g_assert(root.rb_leftmost == NULL); in test_empty()
35 g_assert(interval_tree_iter_first(&root, 0, UINT64_MAX) == NULL); in test_empty()
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| H A D | test-bdrv-graph-mod.c | 4 * Copyright (c) 2019-2021 Virtuozzo International GmbH. All rights reserved.
23 #include "qemu/main-loop.h"
25 #include "system/block-backend.h"
28 .format_name = "pass-through",
45 .format_name = "no-perm",
61 .format_name = "exclusive-writer",
94 * +--------+
95 * | root |
96 * +--------+
101 * +--------------------+ +----------------+
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| H A D | check-block-qdict.c | 2 * Unit-tests for Block layer QDict extras
4 * Copyright (c) 2013-2018 Red Hat, Inc.
7 * See the COPYING.LIB file in the top-level directory.
46 QDict *root = qdict_new(); in qdict_flatten_test() local
104 qdict_put(root, "e", e); in qdict_flatten_test()
105 qdict_put(root, "f", f); in qdict_flatten_test()
106 qdict_put_int(root, "g", 4); in qdict_flatten_test()
107 qdict_put(root, "y", y); in qdict_flatten_test()
108 qdict_put(root, "z", z); in qdict_flatten_test()
110 qdict_flatten(root); in qdict_flatten_test()
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| /qemu/hw/pci-host/ |
| H A D | designware.c | 29 #include "hw/qdev-properties.h"
32 #include "hw/pci-host/designware.h"
64 * Designware has only a single root complex. Enforce the limit on the in designware_pcie_root_bus_class_init()
67 k->max_dev = 1; in designware_pcie_root_bus_class_init()
71 designware_pcie_root_to_host(DesignwarePCIERoot *root) in designware_pcie_root_to_host() argument
73 BusState *bus = qdev_get_parent_bus(DEVICE(root)); in designware_pcie_root_to_host()
74 return DESIGNWARE_PCIE_HOST(bus->parent); in designware_pcie_root_to_host()
85 * AHB/AXI bus like any other PCI-device-initiated DMA read. in designware_pcie_root_msi_read()
87 * well-behaved guests won't ever ask a PCI device to DMA from in designware_pcie_root_msi_read()
97 DesignwarePCIERoot *root = DESIGNWARE_PCIE_ROOT(opaque); in designware_pcie_root_msi_write() local
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| H A D | xilinx-pcie.c | 25 #include "hw/qdev-properties.h"
27 #include "hw/pci-host/xilinx-pcie.h"
45 /* Root Port Status/Control Register */
54 /* Root Port Interrupt FIFO Read Register 1 */
59 /* Root Port Interrupt FIFO Read Register 2 */
68 s->intr |= set; in xilinx_pcie_update_intr()
69 s->intr &= ~clear; in xilinx_pcie_update_intr()
71 if (s->intr_fifo_r != s->intr_fifo_w) { in xilinx_pcie_update_intr()
72 s->intr |= ROOTCFG_INTMASK_INTX; in xilinx_pcie_update_intr()
75 level = !!(s->intr & s->intr_mask); in xilinx_pcie_update_intr()
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| /qemu/docs/ |
| H A D | pcie.txt | 25 QEMU does not have a clear socket-device matching mechanism
34 PCI Express devices should be plugged only into PCI Express Root Ports and
37 2.1 Root Bus (pcie.0)
39 Place only the following kinds of devices directly on the Root Complex:
42 the Root Complex. These will be considered Integrated Endpoints.
43 Note: Integrated Endpoints are not hot-pluggable.
47 devices with the Root Complex. Guest OSes are suspected to behave
49 with the Root Complex.
51 (2) PCI Express Root Ports (pcie-root-port), for starting exclusively
54 (3) PCI Express to PCI Bridge (pcie-pci-bridge), for starting legacy PCI
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| H A D | pcie_pci_bridge.txt | 6 PCIE-to-PCI bridge is a new method for legacy PCI
9 Previously Intel DMI-to-PCI bridge was used for this purpose.
10 But due to its strict limitations - no support of hot-plug,
11 no cross-platform and cross-architecture support - a new generic
12 PCIE-to-PCI bridge should now be used for any legacy PCI device usage
15 This generic PCIE-PCI bridge is a cross-platform device,
16 can be hot-plugged into appropriate root port (requires additional actions,
17 see 'PCIE-PCI bridge hot-plug' section),
18 and supports devices hot-plug into the bridge itself
21 Hot-plug of legacy PCI devices into the bridge
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| /qemu/include/qemu/ |
| H A D | interval-tree.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
12 * For now, don't expose Linux Red-Black Trees separately, but retain the
47 * @root: root of the tree.
51 static inline bool interval_tree_is_empty(const IntervalTreeRoot *root) in interval_tree_is_empty() argument
53 return root->rb_root.rb_node == NULL; in interval_tree_is_empty()
59 * @root: root of the tree.
61 * Insert @node into @root, and rebalance.
63 void interval_tree_insert(IntervalTreeNode *node, IntervalTreeRoot *root);
68 * @root: root of the tree.
70 * Remove @node from @root, and rebalance.
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| /qemu/hw/virtio/ |
| H A D | virtio-nsm.c | 8 * top-level directory.
13 #include "qemu/guest-random.h"
18 #include "hw/virtio/virtio-nsm.h"
19 #include "hw/virtio/cbor-helpers.h"
20 #include "standard-headers/linux/virtio_ids.h"
91 cbor_item_t *root; in error_response() local
95 root = cbor_new_definite_map(1); in error_response()
96 if (!root) { in error_response()
100 if (!qemu_cbor_add_string_to_map(root, "Error", error_string(error))) { in error_response()
104 len = cbor_serialize(root, response->iov_base, response->iov_len); in error_response()
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| /qemu/util/ |
| H A D | interval-tree.c | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 #include "qemu/interval-tree.h"
10 * For now, don't expose Linux Red-Black Trees separately, but retain the
18 * red-black trees properties: https://en.wikipedia.org/wiki/Rbtree
21 * 2) The root is black
24 * 5) Every simple path from root to leaves contains the same number
42 * These two requirements will allow lockless iteration of the tree -- not
47 * and that it will indeed complete -- does not get stuck in a loop.
67 return qatomic_read(&n->rb_parent_color); in rb_pc()
72 qatomic_set(&n->rb_parent_color, pc); in rb_set_pc()
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| H A D | selfmap.c | 6 * SPDX-License-Identifier: GPL-2.0-or-later
15 IntervalTreeRoot *root; in read_self_maps() local
23 root = g_new0(IntervalTreeRoot, 1); in read_self_maps()
59 e->itree.start = start; in read_self_maps()
60 e->itree.last = end - 1; in read_self_maps()
61 e->offset = offset; in read_self_maps()
62 e->dev = makedev(dev_maj, dev_min); in read_self_maps()
63 e->inode = inode; in read_self_maps()
65 e->is_read = fields[1][0] == 'r'; in read_self_maps()
66 e->is_write = fields[1][1] == 'w'; in read_self_maps()
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| H A D | qtree.c | 2 * GLIB - Library of useful routines for C programming
3 * Copyright (C) 1995-1997 Peter Mattis, Spencer Kimball and Josh MacDonald
5 * SPDX-License-Identifier: LGPL-2.1-or-later
22 * Modified by the GLib Team and others 1997-2000. See the AUTHORS
36 * SECTION:trees-binary
73 * [balanced binary tree][glib-Balanced-Binary-Trees]. It should be
77 QTreeNode *root; member
91 gint8 balance; /* height (right) - height (left) */
124 node->balance = 0; in q_tree_node_new()
125 node->left = NULL; in q_tree_node_new()
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| /qemu/docs/system/s390x/ |
| H A D | vfio-ccw.rst | 1 Subchannel passthrough via vfio-ccw
4 vfio-ccw (based upon the mediated vfio device infrastructure) allows to
8 Note that while vfio-ccw should work with most non-QDIO devices, only ECKD
12 ---------------------
19 [root@host ~]# uuidgen
20 7e270a25-e163-4922-af60-757fc8ed48c6
30 [root@host ~]# driverctl -b css set-override 0.0.0313 vfio_ccw
31 [root@host ~]# mdevctl define -u 7e270a25-e163-4922-af60-757fc8ed48c6 \
32 -p 0.0.0313 -t vfio_ccw-io -a
39 [root@host ~]# lscss | grep 0.0.2b09 | awk '{print $2}'
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| /qemu/docs/config/ |
| H A D | mach-virt-serial.cfg | 1 # mach-virt - VirtIO guest (serial console)
6 # $ qemu-system-aarch64 \
7 # -nodefaults \
8 # -readconfig mach-virt-serial.cfg \
9 # -display none -serial mon:stdio \
10 # -cpu host
19 # ---------------------------------------------------------
21 # Using -nodefaults is required to have full control over
24 # such as the PL011 UART, plus a PCI Express Root Bus; the
27 # The PCI Express Root Bus shows up in the guest as:
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| H A D | q35-virtio-graphical.cfg | 1 # q35 - VirtIO guest (graphical console)
6 # $ qemu-system-x86_64 \
7 # -nodefaults \
8 # -readconfig q35-virtio-graphical.cfg
17 # ---------------------------------------------------------
19 # Using -nodefaults is required to have full control over
38 # 00.1c.* PCI bridge (PCI Express Root Ports)
66 # PCI bridge (PCI Express Root Ports)
69 # We create eight PCI Express Root Ports, and we plug them
75 driver = "pcie-root-port"
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| H A D | q35-virtio-serial.cfg | 1 # q35 - VirtIO guest (serial console)
6 # $ qemu-system-x86_64 \
7 # -nodefaults \
8 # -readconfig q35-virtio-serial.cfg \
9 # -display none -serial mon:stdio
18 # ---------------------------------------------------------
20 # Using -nodefaults is required to have full control over
37 # 00.1c.* PCI bridge (PCI Express Root Ports)
43 # We use '-display none' to prevent QEMU from creating a
45 # this specific configuration, and '-serial mon:stdio' to
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| H A D | mach-virt-graphical.cfg | 1 # mach-virt - VirtIO guest (graphical console)
6 # $ qemu-system-aarch64 \
7 # -nodefaults \
8 # -readconfig mach-virt-graphical.cfg \
9 # -cpu host
18 # ---------------------------------------------------------
20 # Using -nodefaults is required to have full control over
23 # such as the PL011 UART, plus a PCI Express Root Bus; the
26 # The PCI Express Root Bus shows up in the guest as:
34 # 00.1c.* PCI bridge (PCI Express Root Ports)
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| /qemu/hw/uefi/ |
| H A D | var-service-pkcs7.c | 2 * SPDX-License-Identifier: GPL-2.0-or-later
4 * uefi vars device - pkcs7 verification
7 #include "qemu/error-report.h"
14 #include "hw/uefi/var-service.h"
25 uint64_t data_offset = sizeof(efi_time) + auth->hdr_length; in build_signed_data()
31 sdata->size = (va->name_size - 2 in build_signed_data()
33 + sizeof(va->attributes) in build_signed_data()
34 + sizeof(auth->timestamp) in build_signed_data()
35 + va->data_size - data_offset); in build_signed_data()
36 sdata->data = g_malloc(sdata->size); in build_signed_data()
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| /qemu/tests/functional/qemu_test/ |
| H A D | config.py | 5 # Original Author (Avocado-based tests):
12 # later. See the COPYING file in the top-level directory.
20 # Determine top-level directory of the QEMU sources
24 root = os.getenv('QEMU_BUILD_ROOT')
25 if root is not None:
26 return Path(root)
31 root = os.path.join(_source_dir(), 'build')
32 if os.path.exists(root):
33 return Path(root)
|
| H A D | tuxruntest.py | 10 # SPDX-License-Identifier: GPL-2.0-or-later
22 # Tests are ~10-40s, allow for --debug/--enable-gcov overhead
32 # Pre-init TuxRun specific settings: Most machines work with
37 # The tuxboot tag matches the root directory
46 self.root = "vda"
55 failure_message='Kernel panic - not syncing',
76 + f"file.filename={disk},node-name=hd0"
79 self.kcmd_line += f" root=/dev/{self.root}"
82 self.vm.add_args('-kernel', kernel,
83 '-append', self.kcmd_line,
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| /qemu/qapi/ |
| H A D | qobject-output-visitor.c | 4 * Copyright (C) 2012-2016 Red Hat, Inc.
11 * See the COPYING.LIB file in the top-level directory.
16 #include "qapi/compat-policy.h"
17 #include "qapi/qobject-output-visitor.h"
18 #include "qapi/visitor-impl.h"
37 QObject *root; /* Root of the output visit */ member
57 assert(qov->root); in qobject_output_push_obj()
59 e->value = value; in qobject_output_push_obj()
60 e->qapi = qapi; in qobject_output_push_obj()
61 QSLIST_INSERT_HEAD(&qov->stack, e, node); in qobject_output_push_obj()
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| /qemu/tests/qtest/ |
| H A D | readconfig-test.c | 2 * Validate -readconfig
7 * See the COPYING file in the top-level directory.
13 #include "qapi/qapi-visit-machine.h"
14 #include "qapi/qapi-visit-qom.h"
15 #include "qapi/qapi-visit-ui.h"
18 #include "qapi/qobject-input-visitor.h"
26 int cfgfd = -1; in qtest_init_with_config()
31 cfgfd = g_file_open_tmp("readconfig-test-XXXXXX", &cfgpath, &error); in qtest_init_with_config()
42 args = g_strdup_printf("-nodefaults -machine none -readconfig %s", cfgpath); in qtest_init_with_config()
62 g_assert(memdevs->value); in test_x86_memdev_resp()
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| /qemu/docs/interop/ |
| H A D | prl-xml.rst | 5 Copyright (c) 2015-2017, Virtuozzo, Inc.
8 2015 Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
9 2016-2017 Klim Kireev <klim.kireev@virtuozzo.com>
10 2016-2017 Edgar Kaziakhmedov <edgar.kaziakhmedov@virtuozzo.com>
13 See the COPYING file in the top-level directory.
28 -----------
41 Root image
42 a snapshot image with no parent, the root of the snapshot tree.
49 particular root image. Split images are not considered here
52 contains a root image and may also contain overlays. The
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| /qemu/docs/system/devices/ |
| H A D | cxl.rst | 14 with CXL Host Bridges, which have CXL Root Ports which may be directly
26 - Configuration space access
27 - BAR mapped memory accesses used for registers and mailboxes.
28 - MSI/MSI-X
29 - AER
30 - DOE mailboxes
31 - IDE
32 - Many other PCI express defined interfaces..
36 - Equivalent of accessing DRAM / NVDIMMs. Any access / feature
46 --------------------
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