Lines Matching refs:asc
192 #define DMA_DRAM_ADDR(asc, val) ((val) & (asc)->dma_dram_mask) argument
194 #define DMA_FLASH_ADDR(asc, val) ((val) & (asc)->dma_flash_mask) argument
216 static inline bool aspeed_smc_has_dma(const AspeedSMCClass *asc) in aspeed_smc_has_dma() argument
218 return !!(asc->features & ASPEED_SMC_FEATURE_DMA); in aspeed_smc_has_dma()
221 static inline bool aspeed_smc_has_wdt_control(const AspeedSMCClass *asc) in aspeed_smc_has_wdt_control() argument
223 return !!(asc->features & ASPEED_SMC_FEATURE_WDT_CONTROL); in aspeed_smc_has_wdt_control()
226 static inline bool aspeed_smc_has_dma64(const AspeedSMCClass *asc) in aspeed_smc_has_dma64() argument
228 return !!(asc->features & ASPEED_SMC_FEATURE_DMA_DRAM_ADDR_HIGH); in aspeed_smc_has_dma64()
238 AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s); in aspeed_smc_flash_overlap() local
242 for (i = 0; i < asc->cs_num_max; i++) { in aspeed_smc_flash_overlap()
247 asc->reg_to_segment(s, s->regs[R_SEG_ADDR0 + i], &seg); in aspeed_smc_flash_overlap()
265 AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s); in aspeed_smc_flash_set_segment_region() local
269 asc->reg_to_segment(s, regval, &seg); in aspeed_smc_flash_set_segment_region()
273 memory_region_set_address(&fl->mmio, seg.addr - asc->flash_window_base); in aspeed_smc_flash_set_segment_region()
277 if (asc->segment_addr_mask) { in aspeed_smc_flash_set_segment_region()
278 regval &= asc->segment_addr_mask; in aspeed_smc_flash_set_segment_region()
287 AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s); in aspeed_smc_flash_set_segment() local
290 asc->reg_to_segment(s, new, &seg); in aspeed_smc_flash_set_segment()
295 if (cs == 0 && seg.addr != asc->flash_window_base) { in aspeed_smc_flash_set_segment()
298 seg.addr = asc->flash_window_base; in aspeed_smc_flash_set_segment()
299 new = asc->segment_to_reg(s, &seg); in aspeed_smc_flash_set_segment()
306 if ((asc->segments == aspeed_2500_spi1_segments || in aspeed_smc_flash_set_segment()
307 asc->segments == aspeed_2500_spi2_segments) && in aspeed_smc_flash_set_segment()
308 cs == asc->cs_num_max && in aspeed_smc_flash_set_segment()
309 seg.addr + seg.size != asc->segments[cs].addr + in aspeed_smc_flash_set_segment()
310 asc->segments[cs].size) { in aspeed_smc_flash_set_segment()
313 seg.size = asc->segments[cs].addr + asc->segments[cs].size - in aspeed_smc_flash_set_segment()
315 new = asc->segment_to_reg(s, &seg); in aspeed_smc_flash_set_segment()
320 (seg.addr + seg.size <= asc->flash_window_base || in aspeed_smc_flash_set_segment()
321 seg.addr > asc->flash_window_base + asc->flash_window_size)) { in aspeed_smc_flash_set_segment()
406 AspeedSMCClass *asc = fl->asc; in aspeed_smc_flash_addr_width() local
408 if (asc->addr_width) { in aspeed_smc_flash_addr_width()
409 return asc->addr_width(s); in aspeed_smc_flash_addr_width()
438 AspeedSMCClass *asc = fl->asc; in aspeed_smc_check_segment_addr() local
441 asc->reg_to_segment(s, s->regs[R_SEG_ADDR0 + fl->cs], &seg); in aspeed_smc_check_segment_addr()
714 AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s); in aspeed_smc_reset() local
717 if (asc->resets) { in aspeed_smc_reset()
718 memcpy(s->regs, asc->resets, sizeof s->regs); in aspeed_smc_reset()
723 for (i = 0; i < asc->cs_num_max; i++) { in aspeed_smc_reset()
740 for (i = 0; i < asc->cs_num_max; ++i) { in aspeed_smc_reset()
748 for (i = 0; i < asc->cs_num_max; ++i) { in aspeed_smc_reset()
750 asc->segment_to_reg(s, &asc->segments[i])); in aspeed_smc_reset()
760 AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(opaque); in aspeed_smc_read() local
766 addr < s->r_timings + asc->nregs_timings) || in aspeed_smc_read()
771 (aspeed_smc_has_wdt_control(asc) && addr == R_FMC_WDT2_CTRL) || in aspeed_smc_read()
772 (aspeed_smc_has_dma(asc) && addr == R_DMA_CTRL) || in aspeed_smc_read()
773 (aspeed_smc_has_dma(asc) && addr == R_DMA_FLASH_ADDR) || in aspeed_smc_read()
774 (aspeed_smc_has_dma(asc) && addr == R_DMA_DRAM_ADDR) || in aspeed_smc_read()
775 (aspeed_smc_has_dma(asc) && aspeed_smc_has_dma64(asc) && in aspeed_smc_read()
777 (aspeed_smc_has_dma(asc) && addr == R_DMA_LEN) || in aspeed_smc_read()
778 (aspeed_smc_has_dma(asc) && addr == R_DMA_CHECKSUM) || in aspeed_smc_read()
780 addr < R_SEG_ADDR0 + asc->cs_num_max) || in aspeed_smc_read()
781 (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + asc->cs_num_max)) { in aspeed_smc_read()
884 AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s); in aspeed_smc_dma_len() local
886 return QEMU_ALIGN_UP(s->regs[R_DMA_LEN] + asc->dma_start_length, 4); in aspeed_smc_dma_len()
938 AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s); in aspeed_smc_dma_rw() local
948 if (aspeed_smc_has_dma64(asc)) { in aspeed_smc_dma_rw()
1071 AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s); in aspeed_smc_dma_granted() local
1073 if (!(asc->features & ASPEED_SMC_FEATURE_DMA_GRANT)) { in aspeed_smc_dma_granted()
1115 AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s); in aspeed_smc_write() local
1124 addr < s->r_timings + asc->nregs_timings) || in aspeed_smc_write()
1127 } else if (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + asc->cs_num_max) { in aspeed_smc_write()
1131 addr < R_SEG_ADDR0 + asc->cs_num_max) { in aspeed_smc_write()
1141 } else if (aspeed_smc_has_wdt_control(asc) && addr == R_FMC_WDT2_CTRL) { in aspeed_smc_write()
1145 } else if (aspeed_smc_has_dma(asc) && addr == R_DMA_CTRL) { in aspeed_smc_write()
1146 asc->dma_ctrl(s, value); in aspeed_smc_write()
1147 } else if (aspeed_smc_has_dma(asc) && addr == R_DMA_DRAM_ADDR && in aspeed_smc_write()
1149 s->regs[addr] = DMA_DRAM_ADDR(asc, value); in aspeed_smc_write()
1150 } else if (aspeed_smc_has_dma(asc) && addr == R_DMA_FLASH_ADDR && in aspeed_smc_write()
1152 s->regs[addr] = DMA_FLASH_ADDR(asc, value); in aspeed_smc_write()
1153 } else if (aspeed_smc_has_dma(asc) && addr == R_DMA_LEN && in aspeed_smc_write()
1156 } else if (aspeed_smc_has_dma(asc) && aspeed_smc_has_dma64(asc) && in aspeed_smc_write()
1175 AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s); in aspeed_smc_instance_init() local
1178 for (i = 0; i < asc->cs_num_max; i++) { in aspeed_smc_instance_init()
1204 AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s); in aspeed_smc_realize() local
1209 s->r_conf = asc->r_conf; in aspeed_smc_realize()
1210 s->r_ce_ctrl = asc->r_ce_ctrl; in aspeed_smc_realize()
1211 s->r_ctrl0 = asc->r_ctrl0; in aspeed_smc_realize()
1212 s->r_timings = asc->r_timings; in aspeed_smc_realize()
1213 s->conf_enable_w0 = asc->conf_enable_w0; in aspeed_smc_realize()
1221 s->cs_lines = g_new0(qemu_irq, asc->cs_num_max); in aspeed_smc_realize()
1222 qdev_init_gpio_out_named(DEVICE(s), s->cs_lines, "cs", asc->cs_num_max); in aspeed_smc_realize()
1226 TYPE_ASPEED_SMC, asc->nregs * 4); in aspeed_smc_realize()
1236 asc->flash_window_size); in aspeed_smc_realize()
1242 asc->flash_window_size); in aspeed_smc_realize()
1253 for (i = 0; i < asc->cs_num_max; ++i) { in aspeed_smc_realize()
1268 offset += asc->segments[i].size; in aspeed_smc_realize()
1272 if (aspeed_smc_has_dma(asc)) { in aspeed_smc_realize()
1327 s->asc = ASPEED_SMC_GET_CLASS(s->controller); in aspeed_smc_flash_realize()
1333 memory_region_init_io(&s->mmio, OBJECT(s), s->asc->reg_ops, in aspeed_smc_flash_realize()
1334 s, name, s->asc->segments[s->cs].size); in aspeed_smc_flash_realize()
1389 AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); in aspeed_2400_smc_class_init() local
1392 asc->r_conf = R_CONF; in aspeed_2400_smc_class_init()
1393 asc->r_ce_ctrl = R_CE_CTRL; in aspeed_2400_smc_class_init()
1394 asc->r_ctrl0 = R_CTRL0; in aspeed_2400_smc_class_init()
1395 asc->r_timings = R_TIMINGS; in aspeed_2400_smc_class_init()
1396 asc->nregs_timings = 1; in aspeed_2400_smc_class_init()
1397 asc->conf_enable_w0 = CONF_ENABLE_W0; in aspeed_2400_smc_class_init()
1398 asc->cs_num_max = 1; in aspeed_2400_smc_class_init()
1399 asc->segments = aspeed_2400_smc_segments; in aspeed_2400_smc_class_init()
1400 asc->flash_window_base = 0x10000000; in aspeed_2400_smc_class_init()
1401 asc->flash_window_size = 0x6000000; in aspeed_2400_smc_class_init()
1402 asc->features = 0x0; in aspeed_2400_smc_class_init()
1403 asc->nregs = ASPEED_SMC_R_SMC_MAX; in aspeed_2400_smc_class_init()
1404 asc->segment_to_reg = aspeed_smc_segment_to_reg; in aspeed_2400_smc_class_init()
1405 asc->reg_to_segment = aspeed_smc_reg_to_segment; in aspeed_2400_smc_class_init()
1406 asc->dma_ctrl = aspeed_smc_dma_ctrl; in aspeed_2400_smc_class_init()
1407 asc->reg_ops = &aspeed_smc_flash_ops; in aspeed_2400_smc_class_init()
1435 AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); in aspeed_2400_fmc_class_init() local
1438 asc->r_conf = R_CONF; in aspeed_2400_fmc_class_init()
1439 asc->r_ce_ctrl = R_CE_CTRL; in aspeed_2400_fmc_class_init()
1440 asc->r_ctrl0 = R_CTRL0; in aspeed_2400_fmc_class_init()
1441 asc->r_timings = R_TIMINGS; in aspeed_2400_fmc_class_init()
1442 asc->nregs_timings = 1; in aspeed_2400_fmc_class_init()
1443 asc->conf_enable_w0 = CONF_ENABLE_W0; in aspeed_2400_fmc_class_init()
1444 asc->cs_num_max = 5; in aspeed_2400_fmc_class_init()
1445 asc->segments = aspeed_2400_fmc_segments; in aspeed_2400_fmc_class_init()
1446 asc->segment_addr_mask = 0xffff0000; in aspeed_2400_fmc_class_init()
1447 asc->resets = aspeed_2400_fmc_resets; in aspeed_2400_fmc_class_init()
1448 asc->flash_window_base = 0x20000000; in aspeed_2400_fmc_class_init()
1449 asc->flash_window_size = 0x10000000; in aspeed_2400_fmc_class_init()
1450 asc->features = ASPEED_SMC_FEATURE_DMA; in aspeed_2400_fmc_class_init()
1451 asc->dma_flash_mask = 0x0FFFFFFC; in aspeed_2400_fmc_class_init()
1452 asc->dma_dram_mask = 0x1FFFFFFC; in aspeed_2400_fmc_class_init()
1453 asc->dma_start_length = 4; in aspeed_2400_fmc_class_init()
1454 asc->nregs = ASPEED_SMC_R_MAX; in aspeed_2400_fmc_class_init()
1455 asc->segment_to_reg = aspeed_smc_segment_to_reg; in aspeed_2400_fmc_class_init()
1456 asc->reg_to_segment = aspeed_smc_reg_to_segment; in aspeed_2400_fmc_class_init()
1457 asc->dma_ctrl = aspeed_smc_dma_ctrl; in aspeed_2400_fmc_class_init()
1458 asc->reg_ops = &aspeed_smc_flash_ops; in aspeed_2400_fmc_class_init()
1479 AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); in aspeed_2400_spi1_class_init() local
1482 asc->r_conf = R_SPI_CONF; in aspeed_2400_spi1_class_init()
1483 asc->r_ce_ctrl = 0xff; in aspeed_2400_spi1_class_init()
1484 asc->r_ctrl0 = R_SPI_CTRL0; in aspeed_2400_spi1_class_init()
1485 asc->r_timings = R_SPI_TIMINGS; in aspeed_2400_spi1_class_init()
1486 asc->nregs_timings = 1; in aspeed_2400_spi1_class_init()
1487 asc->conf_enable_w0 = SPI_CONF_ENABLE_W0; in aspeed_2400_spi1_class_init()
1488 asc->cs_num_max = 1; in aspeed_2400_spi1_class_init()
1489 asc->segments = aspeed_2400_spi1_segments; in aspeed_2400_spi1_class_init()
1490 asc->flash_window_base = 0x30000000; in aspeed_2400_spi1_class_init()
1491 asc->flash_window_size = 0x10000000; in aspeed_2400_spi1_class_init()
1492 asc->features = 0x0; in aspeed_2400_spi1_class_init()
1493 asc->nregs = ASPEED_SMC_R_SPI_MAX; in aspeed_2400_spi1_class_init()
1494 asc->segment_to_reg = aspeed_smc_segment_to_reg; in aspeed_2400_spi1_class_init()
1495 asc->reg_to_segment = aspeed_smc_reg_to_segment; in aspeed_2400_spi1_class_init()
1496 asc->dma_ctrl = aspeed_smc_dma_ctrl; in aspeed_2400_spi1_class_init()
1497 asc->addr_width = aspeed_2400_spi1_addr_width; in aspeed_2400_spi1_class_init()
1498 asc->reg_ops = &aspeed_smc_flash_ops; in aspeed_2400_spi1_class_init()
1521 AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); in aspeed_2500_fmc_class_init() local
1524 asc->r_conf = R_CONF; in aspeed_2500_fmc_class_init()
1525 asc->r_ce_ctrl = R_CE_CTRL; in aspeed_2500_fmc_class_init()
1526 asc->r_ctrl0 = R_CTRL0; in aspeed_2500_fmc_class_init()
1527 asc->r_timings = R_TIMINGS; in aspeed_2500_fmc_class_init()
1528 asc->nregs_timings = 1; in aspeed_2500_fmc_class_init()
1529 asc->conf_enable_w0 = CONF_ENABLE_W0; in aspeed_2500_fmc_class_init()
1530 asc->cs_num_max = 3; in aspeed_2500_fmc_class_init()
1531 asc->segments = aspeed_2500_fmc_segments; in aspeed_2500_fmc_class_init()
1532 asc->segment_addr_mask = 0xffff0000; in aspeed_2500_fmc_class_init()
1533 asc->resets = aspeed_2500_fmc_resets; in aspeed_2500_fmc_class_init()
1534 asc->flash_window_base = 0x20000000; in aspeed_2500_fmc_class_init()
1535 asc->flash_window_size = 0x10000000; in aspeed_2500_fmc_class_init()
1536 asc->features = ASPEED_SMC_FEATURE_DMA; in aspeed_2500_fmc_class_init()
1537 asc->dma_flash_mask = 0x0FFFFFFC; in aspeed_2500_fmc_class_init()
1538 asc->dma_dram_mask = 0x3FFFFFFC; in aspeed_2500_fmc_class_init()
1539 asc->dma_start_length = 4; in aspeed_2500_fmc_class_init()
1540 asc->nregs = ASPEED_SMC_R_MAX; in aspeed_2500_fmc_class_init()
1541 asc->segment_to_reg = aspeed_smc_segment_to_reg; in aspeed_2500_fmc_class_init()
1542 asc->reg_to_segment = aspeed_smc_reg_to_segment; in aspeed_2500_fmc_class_init()
1543 asc->dma_ctrl = aspeed_smc_dma_ctrl; in aspeed_2500_fmc_class_init()
1544 asc->reg_ops = &aspeed_smc_flash_ops; in aspeed_2500_fmc_class_init()
1561 AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); in aspeed_2500_spi1_class_init() local
1564 asc->r_conf = R_CONF; in aspeed_2500_spi1_class_init()
1565 asc->r_ce_ctrl = R_CE_CTRL; in aspeed_2500_spi1_class_init()
1566 asc->r_ctrl0 = R_CTRL0; in aspeed_2500_spi1_class_init()
1567 asc->r_timings = R_TIMINGS; in aspeed_2500_spi1_class_init()
1568 asc->nregs_timings = 1; in aspeed_2500_spi1_class_init()
1569 asc->conf_enable_w0 = CONF_ENABLE_W0; in aspeed_2500_spi1_class_init()
1570 asc->cs_num_max = 2; in aspeed_2500_spi1_class_init()
1571 asc->segments = aspeed_2500_spi1_segments; in aspeed_2500_spi1_class_init()
1572 asc->segment_addr_mask = 0xffff0000; in aspeed_2500_spi1_class_init()
1573 asc->flash_window_base = 0x30000000; in aspeed_2500_spi1_class_init()
1574 asc->flash_window_size = 0x8000000; in aspeed_2500_spi1_class_init()
1575 asc->features = 0x0; in aspeed_2500_spi1_class_init()
1576 asc->nregs = ASPEED_SMC_R_MAX; in aspeed_2500_spi1_class_init()
1577 asc->segment_to_reg = aspeed_smc_segment_to_reg; in aspeed_2500_spi1_class_init()
1578 asc->reg_to_segment = aspeed_smc_reg_to_segment; in aspeed_2500_spi1_class_init()
1579 asc->dma_ctrl = aspeed_smc_dma_ctrl; in aspeed_2500_spi1_class_init()
1580 asc->reg_ops = &aspeed_smc_flash_ops; in aspeed_2500_spi1_class_init()
1597 AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); in aspeed_2500_spi2_class_init() local
1600 asc->r_conf = R_CONF; in aspeed_2500_spi2_class_init()
1601 asc->r_ce_ctrl = R_CE_CTRL; in aspeed_2500_spi2_class_init()
1602 asc->r_ctrl0 = R_CTRL0; in aspeed_2500_spi2_class_init()
1603 asc->r_timings = R_TIMINGS; in aspeed_2500_spi2_class_init()
1604 asc->nregs_timings = 1; in aspeed_2500_spi2_class_init()
1605 asc->conf_enable_w0 = CONF_ENABLE_W0; in aspeed_2500_spi2_class_init()
1606 asc->cs_num_max = 2; in aspeed_2500_spi2_class_init()
1607 asc->segments = aspeed_2500_spi2_segments; in aspeed_2500_spi2_class_init()
1608 asc->segment_addr_mask = 0xffff0000; in aspeed_2500_spi2_class_init()
1609 asc->flash_window_base = 0x38000000; in aspeed_2500_spi2_class_init()
1610 asc->flash_window_size = 0x8000000; in aspeed_2500_spi2_class_init()
1611 asc->features = 0x0; in aspeed_2500_spi2_class_init()
1612 asc->nregs = ASPEED_SMC_R_MAX; in aspeed_2500_spi2_class_init()
1613 asc->segment_to_reg = aspeed_smc_segment_to_reg; in aspeed_2500_spi2_class_init()
1614 asc->reg_to_segment = aspeed_smc_reg_to_segment; in aspeed_2500_spi2_class_init()
1615 asc->dma_ctrl = aspeed_smc_dma_ctrl; in aspeed_2500_spi2_class_init()
1616 asc->reg_ops = &aspeed_smc_flash_ops; in aspeed_2500_spi2_class_init()
1654 AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s); in aspeed_2600_smc_reg_to_segment() local
1657 seg->addr = asc->flash_window_base + start_offset; in aspeed_2600_smc_reg_to_segment()
1660 seg->addr = asc->flash_window_base; in aspeed_2600_smc_reg_to_segment()
1680 AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); in aspeed_2600_fmc_class_init() local
1683 asc->r_conf = R_CONF; in aspeed_2600_fmc_class_init()
1684 asc->r_ce_ctrl = R_CE_CTRL; in aspeed_2600_fmc_class_init()
1685 asc->r_ctrl0 = R_CTRL0; in aspeed_2600_fmc_class_init()
1686 asc->r_timings = R_TIMINGS; in aspeed_2600_fmc_class_init()
1687 asc->nregs_timings = 1; in aspeed_2600_fmc_class_init()
1688 asc->conf_enable_w0 = CONF_ENABLE_W0; in aspeed_2600_fmc_class_init()
1689 asc->cs_num_max = 3; in aspeed_2600_fmc_class_init()
1690 asc->segments = aspeed_2600_fmc_segments; in aspeed_2600_fmc_class_init()
1691 asc->segment_addr_mask = 0x0ff00ff0; in aspeed_2600_fmc_class_init()
1692 asc->resets = aspeed_2600_fmc_resets; in aspeed_2600_fmc_class_init()
1693 asc->flash_window_base = 0x20000000; in aspeed_2600_fmc_class_init()
1694 asc->flash_window_size = 0x10000000; in aspeed_2600_fmc_class_init()
1695 asc->features = ASPEED_SMC_FEATURE_DMA | in aspeed_2600_fmc_class_init()
1697 asc->dma_flash_mask = 0x0FFFFFFC; in aspeed_2600_fmc_class_init()
1698 asc->dma_dram_mask = 0x3FFFFFFC; in aspeed_2600_fmc_class_init()
1699 asc->dma_start_length = 1; in aspeed_2600_fmc_class_init()
1700 asc->nregs = ASPEED_SMC_R_MAX; in aspeed_2600_fmc_class_init()
1701 asc->segment_to_reg = aspeed_2600_smc_segment_to_reg; in aspeed_2600_fmc_class_init()
1702 asc->reg_to_segment = aspeed_2600_smc_reg_to_segment; in aspeed_2600_fmc_class_init()
1703 asc->dma_ctrl = aspeed_2600_smc_dma_ctrl; in aspeed_2600_fmc_class_init()
1704 asc->reg_ops = &aspeed_smc_flash_ops; in aspeed_2600_fmc_class_init()
1721 AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); in aspeed_2600_spi1_class_init() local
1724 asc->r_conf = R_CONF; in aspeed_2600_spi1_class_init()
1725 asc->r_ce_ctrl = R_CE_CTRL; in aspeed_2600_spi1_class_init()
1726 asc->r_ctrl0 = R_CTRL0; in aspeed_2600_spi1_class_init()
1727 asc->r_timings = R_TIMINGS; in aspeed_2600_spi1_class_init()
1728 asc->nregs_timings = 2; in aspeed_2600_spi1_class_init()
1729 asc->conf_enable_w0 = CONF_ENABLE_W0; in aspeed_2600_spi1_class_init()
1730 asc->cs_num_max = 2; in aspeed_2600_spi1_class_init()
1731 asc->segments = aspeed_2600_spi1_segments; in aspeed_2600_spi1_class_init()
1732 asc->segment_addr_mask = 0x0ff00ff0; in aspeed_2600_spi1_class_init()
1733 asc->flash_window_base = 0x30000000; in aspeed_2600_spi1_class_init()
1734 asc->flash_window_size = 0x10000000; in aspeed_2600_spi1_class_init()
1735 asc->features = ASPEED_SMC_FEATURE_DMA | in aspeed_2600_spi1_class_init()
1737 asc->dma_flash_mask = 0x0FFFFFFC; in aspeed_2600_spi1_class_init()
1738 asc->dma_dram_mask = 0x3FFFFFFC; in aspeed_2600_spi1_class_init()
1739 asc->dma_start_length = 1; in aspeed_2600_spi1_class_init()
1740 asc->nregs = ASPEED_SMC_R_MAX; in aspeed_2600_spi1_class_init()
1741 asc->segment_to_reg = aspeed_2600_smc_segment_to_reg; in aspeed_2600_spi1_class_init()
1742 asc->reg_to_segment = aspeed_2600_smc_reg_to_segment; in aspeed_2600_spi1_class_init()
1743 asc->dma_ctrl = aspeed_2600_smc_dma_ctrl; in aspeed_2600_spi1_class_init()
1744 asc->reg_ops = &aspeed_smc_flash_ops; in aspeed_2600_spi1_class_init()
1762 AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); in aspeed_2600_spi2_class_init() local
1765 asc->r_conf = R_CONF; in aspeed_2600_spi2_class_init()
1766 asc->r_ce_ctrl = R_CE_CTRL; in aspeed_2600_spi2_class_init()
1767 asc->r_ctrl0 = R_CTRL0; in aspeed_2600_spi2_class_init()
1768 asc->r_timings = R_TIMINGS; in aspeed_2600_spi2_class_init()
1769 asc->nregs_timings = 3; in aspeed_2600_spi2_class_init()
1770 asc->conf_enable_w0 = CONF_ENABLE_W0; in aspeed_2600_spi2_class_init()
1771 asc->cs_num_max = 3; in aspeed_2600_spi2_class_init()
1772 asc->segments = aspeed_2600_spi2_segments; in aspeed_2600_spi2_class_init()
1773 asc->segment_addr_mask = 0x0ff00ff0; in aspeed_2600_spi2_class_init()
1774 asc->flash_window_base = 0x50000000; in aspeed_2600_spi2_class_init()
1775 asc->flash_window_size = 0x10000000; in aspeed_2600_spi2_class_init()
1776 asc->features = ASPEED_SMC_FEATURE_DMA | in aspeed_2600_spi2_class_init()
1778 asc->dma_flash_mask = 0x0FFFFFFC; in aspeed_2600_spi2_class_init()
1779 asc->dma_dram_mask = 0x3FFFFFFC; in aspeed_2600_spi2_class_init()
1780 asc->dma_start_length = 1; in aspeed_2600_spi2_class_init()
1781 asc->nregs = ASPEED_SMC_R_MAX; in aspeed_2600_spi2_class_init()
1782 asc->segment_to_reg = aspeed_2600_smc_segment_to_reg; in aspeed_2600_spi2_class_init()
1783 asc->reg_to_segment = aspeed_2600_smc_reg_to_segment; in aspeed_2600_spi2_class_init()
1784 asc->dma_ctrl = aspeed_2600_smc_dma_ctrl; in aspeed_2600_spi2_class_init()
1785 asc->reg_ops = &aspeed_smc_flash_ops; in aspeed_2600_spi2_class_init()
1820 AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s); in aspeed_1030_smc_reg_to_segment() local
1823 seg->addr = asc->flash_window_base + start_offset; in aspeed_1030_smc_reg_to_segment()
1826 seg->addr = asc->flash_window_base; in aspeed_1030_smc_reg_to_segment()
1845 AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); in aspeed_1030_fmc_class_init() local
1848 asc->r_conf = R_CONF; in aspeed_1030_fmc_class_init()
1849 asc->r_ce_ctrl = R_CE_CTRL; in aspeed_1030_fmc_class_init()
1850 asc->r_ctrl0 = R_CTRL0; in aspeed_1030_fmc_class_init()
1851 asc->r_timings = R_TIMINGS; in aspeed_1030_fmc_class_init()
1852 asc->nregs_timings = 2; in aspeed_1030_fmc_class_init()
1853 asc->conf_enable_w0 = CONF_ENABLE_W0; in aspeed_1030_fmc_class_init()
1854 asc->cs_num_max = 2; in aspeed_1030_fmc_class_init()
1855 asc->segments = aspeed_1030_fmc_segments; in aspeed_1030_fmc_class_init()
1856 asc->segment_addr_mask = 0x0ff80ff8; in aspeed_1030_fmc_class_init()
1857 asc->resets = aspeed_1030_fmc_resets; in aspeed_1030_fmc_class_init()
1858 asc->flash_window_base = 0x80000000; in aspeed_1030_fmc_class_init()
1859 asc->flash_window_size = 0x10000000; in aspeed_1030_fmc_class_init()
1860 asc->features = ASPEED_SMC_FEATURE_DMA; in aspeed_1030_fmc_class_init()
1861 asc->dma_flash_mask = 0x0FFFFFFC; in aspeed_1030_fmc_class_init()
1862 asc->dma_dram_mask = 0x000BFFFC; in aspeed_1030_fmc_class_init()
1863 asc->dma_start_length = 1; in aspeed_1030_fmc_class_init()
1864 asc->nregs = ASPEED_SMC_R_MAX; in aspeed_1030_fmc_class_init()
1865 asc->segment_to_reg = aspeed_1030_smc_segment_to_reg; in aspeed_1030_fmc_class_init()
1866 asc->reg_to_segment = aspeed_1030_smc_reg_to_segment; in aspeed_1030_fmc_class_init()
1867 asc->dma_ctrl = aspeed_2600_smc_dma_ctrl; in aspeed_1030_fmc_class_init()
1868 asc->reg_ops = &aspeed_smc_flash_ops; in aspeed_1030_fmc_class_init()
1885 AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); in aspeed_1030_spi1_class_init() local
1888 asc->r_conf = R_CONF; in aspeed_1030_spi1_class_init()
1889 asc->r_ce_ctrl = R_CE_CTRL; in aspeed_1030_spi1_class_init()
1890 asc->r_ctrl0 = R_CTRL0; in aspeed_1030_spi1_class_init()
1891 asc->r_timings = R_TIMINGS; in aspeed_1030_spi1_class_init()
1892 asc->nregs_timings = 2; in aspeed_1030_spi1_class_init()
1893 asc->conf_enable_w0 = CONF_ENABLE_W0; in aspeed_1030_spi1_class_init()
1894 asc->cs_num_max = 2; in aspeed_1030_spi1_class_init()
1895 asc->segments = aspeed_1030_spi1_segments; in aspeed_1030_spi1_class_init()
1896 asc->segment_addr_mask = 0x0ff00ff0; in aspeed_1030_spi1_class_init()
1897 asc->flash_window_base = 0x90000000; in aspeed_1030_spi1_class_init()
1898 asc->flash_window_size = 0x10000000; in aspeed_1030_spi1_class_init()
1899 asc->features = ASPEED_SMC_FEATURE_DMA; in aspeed_1030_spi1_class_init()
1900 asc->dma_flash_mask = 0x0FFFFFFC; in aspeed_1030_spi1_class_init()
1901 asc->dma_dram_mask = 0x000BFFFC; in aspeed_1030_spi1_class_init()
1902 asc->dma_start_length = 1; in aspeed_1030_spi1_class_init()
1903 asc->nregs = ASPEED_SMC_R_MAX; in aspeed_1030_spi1_class_init()
1904 asc->segment_to_reg = aspeed_2600_smc_segment_to_reg; in aspeed_1030_spi1_class_init()
1905 asc->reg_to_segment = aspeed_2600_smc_reg_to_segment; in aspeed_1030_spi1_class_init()
1906 asc->dma_ctrl = aspeed_2600_smc_dma_ctrl; in aspeed_1030_spi1_class_init()
1907 asc->reg_ops = &aspeed_smc_flash_ops; in aspeed_1030_spi1_class_init()
1923 AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); in aspeed_1030_spi2_class_init() local
1926 asc->r_conf = R_CONF; in aspeed_1030_spi2_class_init()
1927 asc->r_ce_ctrl = R_CE_CTRL; in aspeed_1030_spi2_class_init()
1928 asc->r_ctrl0 = R_CTRL0; in aspeed_1030_spi2_class_init()
1929 asc->r_timings = R_TIMINGS; in aspeed_1030_spi2_class_init()
1930 asc->nregs_timings = 2; in aspeed_1030_spi2_class_init()
1931 asc->conf_enable_w0 = CONF_ENABLE_W0; in aspeed_1030_spi2_class_init()
1932 asc->cs_num_max = 2; in aspeed_1030_spi2_class_init()
1933 asc->segments = aspeed_1030_spi2_segments; in aspeed_1030_spi2_class_init()
1934 asc->segment_addr_mask = 0x0ff00ff0; in aspeed_1030_spi2_class_init()
1935 asc->flash_window_base = 0xb0000000; in aspeed_1030_spi2_class_init()
1936 asc->flash_window_size = 0x10000000; in aspeed_1030_spi2_class_init()
1937 asc->features = ASPEED_SMC_FEATURE_DMA; in aspeed_1030_spi2_class_init()
1938 asc->dma_flash_mask = 0x0FFFFFFC; in aspeed_1030_spi2_class_init()
1939 asc->dma_dram_mask = 0x000BFFFC; in aspeed_1030_spi2_class_init()
1940 asc->dma_start_length = 1; in aspeed_1030_spi2_class_init()
1941 asc->nregs = ASPEED_SMC_R_MAX; in aspeed_1030_spi2_class_init()
1942 asc->segment_to_reg = aspeed_2600_smc_segment_to_reg; in aspeed_1030_spi2_class_init()
1943 asc->reg_to_segment = aspeed_2600_smc_reg_to_segment; in aspeed_1030_spi2_class_init()
1944 asc->dma_ctrl = aspeed_2600_smc_dma_ctrl; in aspeed_1030_spi2_class_init()
1945 asc->reg_ops = &aspeed_smc_flash_ops; in aspeed_1030_spi2_class_init()
1980 AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s); in aspeed_2700_smc_reg_to_segment() local
1983 seg->addr = asc->flash_window_base + start_offset; in aspeed_2700_smc_reg_to_segment()
1986 seg->addr = asc->flash_window_base; in aspeed_2700_smc_reg_to_segment()
2028 AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); in aspeed_2700_fmc_class_init() local
2031 asc->r_conf = R_CONF; in aspeed_2700_fmc_class_init()
2032 asc->r_ce_ctrl = R_CE_CTRL; in aspeed_2700_fmc_class_init()
2033 asc->r_ctrl0 = R_CTRL0; in aspeed_2700_fmc_class_init()
2034 asc->r_timings = R_TIMINGS; in aspeed_2700_fmc_class_init()
2035 asc->nregs_timings = 3; in aspeed_2700_fmc_class_init()
2036 asc->conf_enable_w0 = CONF_ENABLE_W0; in aspeed_2700_fmc_class_init()
2037 asc->cs_num_max = 3; in aspeed_2700_fmc_class_init()
2038 asc->segments = aspeed_2700_fmc_segments; in aspeed_2700_fmc_class_init()
2039 asc->segment_addr_mask = 0xffffffff; in aspeed_2700_fmc_class_init()
2040 asc->resets = aspeed_2700_fmc_resets; in aspeed_2700_fmc_class_init()
2041 asc->flash_window_base = 0x100000000; in aspeed_2700_fmc_class_init()
2042 asc->flash_window_size = 1 * GiB; in aspeed_2700_fmc_class_init()
2043 asc->features = ASPEED_SMC_FEATURE_DMA | in aspeed_2700_fmc_class_init()
2045 asc->dma_flash_mask = 0x2FFFFFFC; in aspeed_2700_fmc_class_init()
2046 asc->dma_dram_mask = 0xFFFFFFFC; in aspeed_2700_fmc_class_init()
2047 asc->dma_start_length = 1; in aspeed_2700_fmc_class_init()
2048 asc->nregs = ASPEED_SMC_R_MAX; in aspeed_2700_fmc_class_init()
2049 asc->segment_to_reg = aspeed_2700_smc_segment_to_reg; in aspeed_2700_fmc_class_init()
2050 asc->reg_to_segment = aspeed_2700_smc_reg_to_segment; in aspeed_2700_fmc_class_init()
2051 asc->dma_ctrl = aspeed_2600_smc_dma_ctrl; in aspeed_2700_fmc_class_init()
2052 asc->reg_ops = &aspeed_2700_smc_flash_ops; in aspeed_2700_fmc_class_init()
2070 AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); in aspeed_2700_spi0_class_init() local
2073 asc->r_conf = R_CONF; in aspeed_2700_spi0_class_init()
2074 asc->r_ce_ctrl = R_CE_CTRL; in aspeed_2700_spi0_class_init()
2075 asc->r_ctrl0 = R_CTRL0; in aspeed_2700_spi0_class_init()
2076 asc->r_timings = R_TIMINGS; in aspeed_2700_spi0_class_init()
2077 asc->nregs_timings = 2; in aspeed_2700_spi0_class_init()
2078 asc->conf_enable_w0 = CONF_ENABLE_W0; in aspeed_2700_spi0_class_init()
2079 asc->cs_num_max = 2; in aspeed_2700_spi0_class_init()
2080 asc->segments = aspeed_2700_spi0_segments; in aspeed_2700_spi0_class_init()
2081 asc->segment_addr_mask = 0xffffffff; in aspeed_2700_spi0_class_init()
2082 asc->flash_window_base = 0x180000000; in aspeed_2700_spi0_class_init()
2083 asc->flash_window_size = 1 * GiB; in aspeed_2700_spi0_class_init()
2084 asc->features = ASPEED_SMC_FEATURE_DMA | in aspeed_2700_spi0_class_init()
2086 asc->dma_flash_mask = 0x2FFFFFFC; in aspeed_2700_spi0_class_init()
2087 asc->dma_dram_mask = 0xFFFFFFFC; in aspeed_2700_spi0_class_init()
2088 asc->dma_start_length = 1; in aspeed_2700_spi0_class_init()
2089 asc->nregs = ASPEED_SMC_R_MAX; in aspeed_2700_spi0_class_init()
2090 asc->segment_to_reg = aspeed_2700_smc_segment_to_reg; in aspeed_2700_spi0_class_init()
2091 asc->reg_to_segment = aspeed_2700_smc_reg_to_segment; in aspeed_2700_spi0_class_init()
2092 asc->dma_ctrl = aspeed_2600_smc_dma_ctrl; in aspeed_2700_spi0_class_init()
2093 asc->reg_ops = &aspeed_2700_smc_flash_ops; in aspeed_2700_spi0_class_init()
2110 AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); in aspeed_2700_spi1_class_init() local
2113 asc->r_conf = R_CONF; in aspeed_2700_spi1_class_init()
2114 asc->r_ce_ctrl = R_CE_CTRL; in aspeed_2700_spi1_class_init()
2115 asc->r_ctrl0 = R_CTRL0; in aspeed_2700_spi1_class_init()
2116 asc->r_timings = R_TIMINGS; in aspeed_2700_spi1_class_init()
2117 asc->nregs_timings = 2; in aspeed_2700_spi1_class_init()
2118 asc->conf_enable_w0 = CONF_ENABLE_W0; in aspeed_2700_spi1_class_init()
2119 asc->cs_num_max = 2; in aspeed_2700_spi1_class_init()
2120 asc->segments = aspeed_2700_spi1_segments; in aspeed_2700_spi1_class_init()
2121 asc->segment_addr_mask = 0xffffffff; in aspeed_2700_spi1_class_init()
2122 asc->flash_window_base = 0x200000000; in aspeed_2700_spi1_class_init()
2123 asc->flash_window_size = 1 * GiB; in aspeed_2700_spi1_class_init()
2124 asc->features = ASPEED_SMC_FEATURE_DMA | in aspeed_2700_spi1_class_init()
2126 asc->dma_flash_mask = 0x2FFFFFFC; in aspeed_2700_spi1_class_init()
2127 asc->dma_dram_mask = 0xFFFFFFFC; in aspeed_2700_spi1_class_init()
2128 asc->dma_start_length = 1; in aspeed_2700_spi1_class_init()
2129 asc->nregs = ASPEED_SMC_R_MAX; in aspeed_2700_spi1_class_init()
2130 asc->segment_to_reg = aspeed_2700_smc_segment_to_reg; in aspeed_2700_spi1_class_init()
2131 asc->reg_to_segment = aspeed_2700_smc_reg_to_segment; in aspeed_2700_spi1_class_init()
2132 asc->dma_ctrl = aspeed_2600_smc_dma_ctrl; in aspeed_2700_spi1_class_init()
2133 asc->reg_ops = &aspeed_2700_smc_flash_ops; in aspeed_2700_spi1_class_init()
2150 AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); in aspeed_2700_spi2_class_init() local
2153 asc->r_conf = R_CONF; in aspeed_2700_spi2_class_init()
2154 asc->r_ce_ctrl = R_CE_CTRL; in aspeed_2700_spi2_class_init()
2155 asc->r_ctrl0 = R_CTRL0; in aspeed_2700_spi2_class_init()
2156 asc->r_timings = R_TIMINGS; in aspeed_2700_spi2_class_init()
2157 asc->nregs_timings = 2; in aspeed_2700_spi2_class_init()
2158 asc->conf_enable_w0 = CONF_ENABLE_W0; in aspeed_2700_spi2_class_init()
2159 asc->cs_num_max = 2; in aspeed_2700_spi2_class_init()
2160 asc->segments = aspeed_2700_spi2_segments; in aspeed_2700_spi2_class_init()
2161 asc->segment_addr_mask = 0xffffffff; in aspeed_2700_spi2_class_init()
2162 asc->flash_window_base = 0x280000000; in aspeed_2700_spi2_class_init()
2163 asc->flash_window_size = 1 * GiB; in aspeed_2700_spi2_class_init()
2164 asc->features = ASPEED_SMC_FEATURE_DMA | in aspeed_2700_spi2_class_init()
2166 asc->dma_flash_mask = 0x0FFFFFFC; in aspeed_2700_spi2_class_init()
2167 asc->dma_dram_mask = 0xFFFFFFFC; in aspeed_2700_spi2_class_init()
2168 asc->dma_start_length = 1; in aspeed_2700_spi2_class_init()
2169 asc->nregs = ASPEED_SMC_R_MAX; in aspeed_2700_spi2_class_init()
2170 asc->segment_to_reg = aspeed_2700_smc_segment_to_reg; in aspeed_2700_spi2_class_init()
2171 asc->reg_to_segment = aspeed_2700_smc_reg_to_segment; in aspeed_2700_spi2_class_init()
2172 asc->dma_ctrl = aspeed_2600_smc_dma_ctrl; in aspeed_2700_spi2_class_init()
2173 asc->reg_ops = &aspeed_2700_smc_flash_ops; in aspeed_2700_spi2_class_init()