Lines Matching full:spi
2 * ASPEED AST2400 SMC Controller (SPI Flash Only)
55 #define CONF_FLASH_TYPE_SPI 0x2 /* AST2600 is SPI only */
59 #define CTRL_EXTENDED4 4 /* 32 bit addressing for SPI */
60 #define CTRL_EXTENDED3 3 /* 32 bit addressing for SPI */
61 #define CTRL_EXTENDED2 2 /* 32 bit addressing for SPI */
62 #define CTRL_EXTENDED1 1 /* 32 bit addressing for SPI */
63 #define CTRL_EXTENDED0 0 /* 32 bit addressing for SPI */
125 /* SPI dummy cycle data */
166 /* SPI controller registers and bits (AST2400) */
303 * The end address of the AST2500 spi controllers is also in aspeed_smc_flash_set_segment()
386 * In read mode, the default SPI command is READ (0x3). In other in aspeed_smc_flash_cmd()
476 ssi_transfer(s->spi, cmd); in aspeed_smc_flash_setup()
479 ssi_transfer(s->spi, (addr >> (i * 8)) & 0xff); in aspeed_smc_flash_setup()
491 ssi_transfer(fl->controller->spi, s->regs[R_DUMMY_DATA] & 0xff); in aspeed_smc_flash_setup()
506 ret |= (uint64_t) ssi_transfer(s->spi, 0x0) << (8 * i); in aspeed_smc_flash_read()
515 ret |= (uint64_t) ssi_transfer(s->spi, 0x0) << (8 * i); in aspeed_smc_flash_read()
604 /* The SPI transfer has reached the dummy cycles sequence */ in aspeed_smc_do_snoop()
606 ssi_transfer(s->spi, s->regs[R_DUMMY_DATA] & 0xff); in aspeed_smc_do_snoop()
618 * SPI transfer in aspeed_smc_do_snoop()
649 ssi_transfer(s->spi, (data >> (8 * i)) & 0xff); in aspeed_smc_flash_write()
657 ssi_transfer(s->spi, (data >> (8 * i)) & 0xff); in aspeed_smc_flash_write()
724 DeviceState *dev = ssi_get_cs(s->spi, i); in aspeed_smc_reset()
730 BUS(s->spi)->name, i, object_get_typename(o)); in aspeed_smc_reset()
811 * When doing calibration, the SPI clock rate in the CE0 Control
827 * the SPI bus and only HCLK/1 - HCLK/5 can have tunable delays in aspeed_smc_dma_calibration()
849 * Register. This will help in tuning the SPI timing calibration
1218 s->spi = ssi_create_bus(dev, NULL); in aspeed_smc_realize()
1362 * unit. The address range of a flash SPI peripheral is encoded with
1627 * range of a flash SPI peripheral is encoded with offsets in the overall