Lines Matching +full:- +full:eq
32 #include "hw/qdev-properties.h"
38 int len = strlen(core_type) - strlen(PNV_CORE_TYPE_SUFFIX); in pnv_core_cpu_typename()
48 CPUPPCState *env = &cpu->env; in pnv_core_cpu_reset()
49 PnvChipClass *pcc = PNV_CHIP_GET_CLASS(pc->chip); in pnv_core_cpu_reset()
57 env->gpr[3] = PNV_FDT_ADDR; in pnv_core_cpu_reset()
58 env->nip = 0x10; in pnv_core_cpu_reset()
59 env->msr |= MSR_HVB; /* Hypervisor mode */ in pnv_core_cpu_reset()
60 env->spr[SPR_HRMOR] = pc->hrmor; in pnv_core_cpu_reset()
61 if (pc->big_core) { in pnv_core_cpu_reset()
63 env->spr[SPR_PVR] &= ~PPC_BIT(51); in pnv_core_cpu_reset()
70 pcc->intc_reset(pc->chip, cpu); in pnv_core_cpu_reset()
196 int nr_threads = CPU_CORE(pc)->nr_threads; in pnv_core_power10_xscom_read()
204 PowerPCCPU *cpu = pc->threads[i]; in pnv_core_power10_xscom_read()
207 if (cs->halted) { in pnv_core_power10_xscom_read()
211 if (pc->lpar_per_core) { in pnv_core_power10_xscom_read()
219 PowerPCCPU *cpu = pc->threads[i]; in pnv_core_power10_xscom_read()
220 CPUPPCState *env = &cpu->env; in pnv_core_power10_xscom_read()
221 if (env->quiesced) { in pnv_core_power10_xscom_read()
238 int nr_threads = CPU_CORE(pc)->nr_threads; in pnv_core_power10_xscom_write()
245 PowerPCCPU *cpu = pc->threads[i]; in pnv_core_power10_xscom_write()
247 CPUPPCState *env = &cpu->env; in pnv_core_power10_xscom_write()
251 env->quiesced = true; in pnv_core_power10_xscom_write()
257 env->quiesced = false; in pnv_core_power10_xscom_write()
263 env->quiesced = false; in pnv_core_power10_xscom_write()
268 env->quiesced = false; in pnv_core_power10_xscom_write()
305 CPUPPCState *env = &cpu->env; in pnv_core_cpu_realize()
307 ppc_spr_t *pir_spr = &env->spr_cb[SPR_PIR]; in pnv_core_cpu_realize()
308 ppc_spr_t *tir_spr = &env->spr_cb[SPR_TIR]; in pnv_core_cpu_realize()
311 PnvChipClass *pcc = PNV_CHIP_GET_CLASS(pc->chip); in pnv_core_cpu_realize()
317 pcc->intc_create(pc->chip, cpu, &local_err); in pnv_core_cpu_realize()
325 pcc->get_pir_tir(pc->chip, core_hwid, thread_index, &pir, &tir); in pnv_core_cpu_realize()
326 pir_spr->default_value = pir; in pnv_core_cpu_realize()
327 tir_spr->default_value = tir; in pnv_core_cpu_realize()
329 env->chip_index = pc->chip->chip_id; in pnv_core_cpu_realize()
331 if (pc->big_core) { in pnv_core_cpu_realize()
333 env->core_index = core_hwid >> 1; in pnv_core_cpu_realize()
335 env->core_index = core_hwid; in pnv_core_cpu_realize()
338 if (pc->lpar_per_core) { in pnv_core_cpu_realize()
342 /* Set time-base frequency to 512 MHz */ in pnv_core_cpu_realize()
352 for (i = 0; i < cc->nr_threads; i++) { in pnv_core_reset()
353 pnv_core_cpu_reset(pc, pc->threads[i]); in pnv_core_reset()
368 assert(pc->chip); in pnv_core_realize()
370 pc->threads = g_new(PowerPCCPU *, cc->nr_threads); in pnv_core_realize()
371 for (i = 0; i < cc->nr_threads; i++) { in pnv_core_realize()
378 pc->threads[i] = POWERPC_CPU(obj); in pnv_core_realize()
379 if (cc->nr_threads > 1) { in pnv_core_realize()
380 cpu->env.has_smt_siblings = true; in pnv_core_realize()
386 cpu->machine_data = g_new0(PnvCPUState, 1); in pnv_core_realize()
388 pnv_cpu->pnv_core = pc; in pnv_core_realize()
393 for (j = 0; j < cc->nr_threads; j++) { in pnv_core_realize()
394 pnv_core_cpu_realize(pc, pc->threads[j], &local_err, j); in pnv_core_realize()
400 snprintf(name, sizeof(name), "xscom-core.%d", cc->core_id); in pnv_core_realize()
401 pnv_xscom_region_init(&pc->xscom_regs, OBJECT(dev), pcc->xscom_ops, in pnv_core_realize()
402 pc, name, pcc->xscom_size); in pnv_core_realize()
408 while (--i >= 0) { in pnv_core_realize()
409 obj = OBJECT(pc->threads[i]); in pnv_core_realize()
412 g_free(pc->threads); in pnv_core_realize()
419 PnvChipClass *pcc = PNV_CHIP_GET_CLASS(pc->chip); in pnv_core_cpu_unrealize()
421 pcc->intc_destroy(pc->chip, cpu); in pnv_core_cpu_unrealize()
423 cpu->machine_data = NULL; in pnv_core_cpu_unrealize()
436 for (i = 0; i < cc->nr_threads; i++) { in pnv_core_unrealize()
437 pnv_core_cpu_unrealize(pc, pc->threads[i]); in pnv_core_unrealize()
439 g_free(pc->threads); in pnv_core_unrealize()
445 DEFINE_PROP_BOOL("big-core", PnvCore, big_core, false),
446 DEFINE_PROP_BOOL("quirk-tb-big-core", PnvCore, tod_state.big_core_quirk,
448 DEFINE_PROP_BOOL("lpar-per-core", PnvCore, lpar_per_core, false),
456 pcc->xscom_ops = &pnv_core_power8_xscom_ops; in pnv_core_power8_class_init()
457 pcc->xscom_size = PNV_XSCOM_EX_SIZE; in pnv_core_power8_class_init()
464 pcc->xscom_ops = &pnv_core_power9_xscom_ops; in pnv_core_power9_class_init()
465 pcc->xscom_size = PNV_XSCOM_EX_SIZE; in pnv_core_power9_class_init()
472 pcc->xscom_ops = &pnv_core_power10_xscom_ops; in pnv_core_power10_class_init()
473 pcc->xscom_size = PNV10_XSCOM_EC_SIZE; in pnv_core_power10_class_init()
480 dc->realize = pnv_core_realize; in pnv_core_class_init()
481 dc->unrealize = pnv_core_unrealize; in pnv_core_class_init()
483 dc->user_creatable = false; in pnv_core_class_init()
521 uint64_t val = -1; in DEFINE_TYPES()
569 uint64_t val = -1; in pnv_quad_power10_xscom_read()
608 PnvQuad *eq = PNV_QUAD(opaque); in pnv_qme_power10_xscom_read() local
610 uint64_t val = -1; in pnv_qme_power10_xscom_read()
619 if (eq->special_wakeup_done) { in pnv_qme_power10_xscom_read()
635 PnvQuad *eq = PNV_QUAD(opaque); in pnv_qme_power10_xscom_write() local
643 eq->special_wakeup_done = set; in pnv_qme_power10_xscom_write()
647 eq->special_wakeup[i] = set; in pnv_qme_power10_xscom_write()
669 PnvQuad *eq = PNV_QUAD(dev); in pnv_quad_power9_realize() local
670 PnvQuadClass *pqc = PNV_QUAD_GET_CLASS(eq); in pnv_quad_power9_realize()
673 snprintf(name, sizeof(name), "xscom-quad.%d", eq->quad_id); in pnv_quad_power9_realize()
674 pnv_xscom_region_init(&eq->xscom_regs, OBJECT(dev), in pnv_quad_power9_realize()
675 pqc->xscom_ops, in pnv_quad_power9_realize()
676 eq, name, in pnv_quad_power9_realize()
677 pqc->xscom_size); in pnv_quad_power9_realize()
682 PnvQuad *eq = PNV_QUAD(dev); in pnv_quad_power10_realize() local
683 PnvQuadClass *pqc = PNV_QUAD_GET_CLASS(eq); in pnv_quad_power10_realize()
686 snprintf(name, sizeof(name), "xscom-quad.%d", eq->quad_id); in pnv_quad_power10_realize()
687 pnv_xscom_region_init(&eq->xscom_regs, OBJECT(dev), in pnv_quad_power10_realize()
688 pqc->xscom_ops, in pnv_quad_power10_realize()
689 eq, name, in pnv_quad_power10_realize()
690 pqc->xscom_size); in pnv_quad_power10_realize()
692 snprintf(name, sizeof(name), "xscom-qme.%d", eq->quad_id); in pnv_quad_power10_realize()
693 pnv_xscom_region_init(&eq->xscom_qme_regs, OBJECT(dev), in pnv_quad_power10_realize()
694 pqc->xscom_qme_ops, in pnv_quad_power10_realize()
695 eq, name, in pnv_quad_power10_realize()
696 pqc->xscom_qme_size); in pnv_quad_power10_realize()
700 DEFINE_PROP_UINT32("quad-id", PnvQuad, quad_id, 0),
708 dc->realize = pnv_quad_power9_realize; in pnv_quad_power9_class_init()
710 pqc->xscom_ops = &pnv_quad_power9_xscom_ops; in pnv_quad_power9_class_init()
711 pqc->xscom_size = PNV9_XSCOM_EQ_SIZE; in pnv_quad_power9_class_init()
719 dc->realize = pnv_quad_power10_realize; in pnv_quad_power10_class_init()
721 pqc->xscom_ops = &pnv_quad_power10_xscom_ops; in pnv_quad_power10_class_init()
722 pqc->xscom_size = PNV10_XSCOM_EQ_SIZE; in pnv_quad_power10_class_init()
724 pqc->xscom_qme_ops = &pnv_qme_power10_xscom_ops; in pnv_quad_power10_class_init()
725 pqc->xscom_qme_size = PNV10_XSCOM_QME_SIZE; in pnv_quad_power10_class_init()
733 dc->user_creatable = false; in pnv_quad_class_init()