kvm/arm64/get-reg-list.c

130 static const char *core_id_to_str(const char *prefix, __u64 id)
141 		TEST_ASSERT(idx < 31, "%s: Unexpected regs.regs index: %lld", prefix, idx);
156 		TEST_ASSERT(idx < KVM_NR_SPSR, "%s: Unexpected spsr index: %lld", prefix, idx);
161 		TEST_ASSERT(idx < 32, "%s: Unexpected fp_regs.vregs index: %lld", prefix, idx);
169 	TEST_FAIL("%s: Unknown core reg id: 0x%llx", prefix, id);
173 static const char *sve_id_to_str(const char *prefix, __u64 id)
183 	TEST_ASSERT(i == 0, "%s: Currently we don't expect slice > 0, reg id 0x%llx", prefix, id);
190 			    "%s: Unexpected bits set in SVE ZREG id: 0x%llx", prefix, id);
196 			    "%s: Unexpected bits set in SVE PREG id: 0x%llx", prefix, id);
200 			    "%s: Unexpected bits set in SVE FFR id: 0x%llx", prefix, id);
207 void print_reg(const char *prefix, __u64 id)
213 		    "%s: KVM_REG_ARM64 missing in reg id: 0x%llx", prefix, id);
245 			  prefix, (id & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT, id);
250 		printf("\tKVM_REG_ARM64 | %s | KVM_REG_ARM_CORE | %s,\n", reg_size, core_id_to_str(prefix, id));
254 			    "%s: Unexpected bits set in DEMUX reg id: 0x%llx", prefix, id);
265 			    "%s: Unexpected bits set in SYSREG reg id: 0x%llx", prefix, id);
270 			    "%s: Unexpected bits set in FW reg id: 0x%llx", prefix, id);
275 			    "%s: Unexpected bits set in the bitmap feature FW reg id: 0x%llx", prefix, id);
279 		printf("\t%s,\n", sve_id_to_str(prefix, id));
283 			  prefix, (id & KVM_REG_ARM_COPROC_MASK) >> KVM_REG_ARM_COPROC_SHIFT, id);