#
18ec25dd |
| 28-Jul-2025 |
Oliver Upton <oliver.upton@linux.dev> |
KVM: arm64: selftests: Add FEAT_RAS EL2 registers to get-reg-list
VDISR_EL2 and VSESR_EL2 are now visible to userspace for nested VMs. Add them to get-reg-list.
Link: https://lore.kernel.org/r/2025
KVM: arm64: selftests: Add FEAT_RAS EL2 registers to get-reg-list
VDISR_EL2 and VSESR_EL2 are now visible to userspace for nested VMs. Add them to get-reg-list.
Link: https://lore.kernel.org/r/20250728152603.2823699-1-oliver.upton@linux.dev Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
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#
a7f49a9b |
| 28-Jul-2025 |
Oliver Upton <oliver.upton@linux.dev> |
Merge branch 'kvm-arm64/el2-reg-visibility' into kvmarm/next
* kvm-arm64/el2-reg-visibility: : Fixes to EL2 register visibility, courtesy of Marc Zyngier : : - Expose EL2 VGICv3 registers via
Merge branch 'kvm-arm64/el2-reg-visibility' into kvmarm/next
* kvm-arm64/el2-reg-visibility: : Fixes to EL2 register visibility, courtesy of Marc Zyngier : : - Expose EL2 VGICv3 registers via the VGIC attributes accessor, not the : KVM_{GET,SET}_ONE_REG ioctls : : - Condition visibility of FGT registers on the presence of FEAT_FGT in : the VM KVM: arm64: selftest: vgic-v3: Add basic GICv3 sysreg userspace access test KVM: arm64: Enforce the sorting of the GICv3 system register table KVM: arm64: Clarify the check for reset callback in check_sysreg_table() KVM: arm64: vgic-v3: Fix ordering of ICH_HCR_EL2 KVM: arm64: Document registers exposed via KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS KVM: arm64: selftests: get-reg-list: Add base EL2 registers KVM: arm64: selftests: get-reg-list: Simplify feature dependency KVM: arm64: Advertise FGT2 registers to userspace KVM: arm64: Condition FGT registers on feature availability KVM: arm64: Expose GICv3 EL2 registers via KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS KVM: arm64: Let GICv3 save/restore honor visibility attribute KVM: arm64: Define helper for ICH_VTR_EL2 KVM: arm64: Define constant value for ICC_SRE_EL2 KVM: arm64: Don't advertise ICH_*_EL2 registers through GET_ONE_REG KVM: arm64: Make RVBAR_EL2 accesses UNDEF
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
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Revision tags: v6.16, v6.16-rc7 |
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#
3a90b6f2 |
| 14-Jul-2025 |
Marc Zyngier <maz@kernel.org> |
KVM: arm64: selftests: get-reg-list: Add base EL2 registers
Add the EL2 registers and the eventual dependencies, effectively doubling the number of test vectors. Oh well.
Signed-off-by: Marc Zyngie
KVM: arm64: selftests: get-reg-list: Add base EL2 registers
Add the EL2 registers and the eventual dependencies, effectively doubling the number of test vectors. Oh well.
Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250714122634.3334816-11-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
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#
9a407180 |
| 14-Jul-2025 |
Marc Zyngier <maz@kernel.org> |
KVM: arm64: selftests: get-reg-list: Simplify feature dependency
Describing the dependencies between registers and features is on the masochistic side of things, with hard-coded values that would be
KVM: arm64: selftests: get-reg-list: Simplify feature dependency
Describing the dependencies between registers and features is on the masochistic side of things, with hard-coded values that would be better taken from the existing description.
Add a couple of helpers to that effect, and repaint the dependency array. More could be done to improve this test, but my interest is wearing thin...
Signed-off-by: Marc Zyngier <maz@kernel.org> Tested-by: Itaru Kitayama <itaru.kitayama@fujitsu.com> Link: https://lore.kernel.org/r/20250714122634.3334816-10-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
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Revision tags: v6.16-rc6 |
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#
55ea75f5 |
| 08-Jul-2025 |
Oliver Upton <oliver.upton@linux.dev> |
KVM: arm64: selftests: Add SCTLR2_EL1 to get-reg-list
Handle SCTLR2_EL1 specially as it is only visible to userspace when FEAT_SCTLR2 is implemented for the VM.
Reviewed-by: Marc Zyngier <maz@kerne
KVM: arm64: selftests: Add SCTLR2_EL1 to get-reg-list
Handle SCTLR2_EL1 specially as it is only visible to userspace when FEAT_SCTLR2 is implemented for the VM.
Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250708172532.1699409-27-oliver.upton@linux.dev Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
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Revision tags: v6.16-rc5, v6.16-rc4, v6.16-rc3, v6.16-rc2, v6.16-rc1, v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4 |
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#
f6965665 |
| 21-Feb-2025 |
Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> |
KVM: selftests: Add test for KVM_REG_ARM_VENDOR_HYP_BMAP_2
One difference here with other pseudo-firmware bitmap registers is that the default/reset value for the supported hypercall function-ids is
KVM: selftests: Add test for KVM_REG_ARM_VENDOR_HYP_BMAP_2
One difference here with other pseudo-firmware bitmap registers is that the default/reset value for the supported hypercall function-ids is 0 at present. Hence, modify the test accordingly.
Reviewed-by: Sebastian Ott <sebott@redhat.com> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Link: https://lore.kernel.org/r/20250221140229.12588-7-shameerali.kolothum.thodi@huawei.com Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
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Revision tags: v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1 |
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#
67730e6c |
| 28-Nov-2024 |
Sean Christopherson <seanjc@google.com> |
KVM: selftests: Use canonical $(ARCH) paths for KVM selftests directories
Use the kernel's canonical $(ARCH) paths instead of the raw target triple for KVM selftests directories. KVM selftests are
KVM: selftests: Use canonical $(ARCH) paths for KVM selftests directories
Use the kernel's canonical $(ARCH) paths instead of the raw target triple for KVM selftests directories. KVM selftests are quite nearly the only place in the entire kernel that using the target triple for directories, tools/testing/selftests/drivers/s390x being the lone holdout.
Using the kernel's preferred nomenclature eliminates the minor, but annoying, friction of having to translate to KVM's selftests directories, e.g. for pattern matching, opening files, running selftests, etc.
Opportunsitically delete file comments that reference the full path of the file, as they are obviously prone to becoming stale, and serve no known purpose.
Reviewed-by: Muhammad Usama Anjum <usama.anjum@collabora.com> Acked-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Acked-by: Andrew Jones <ajones@ventanamicro.com> Link: https://lore.kernel.org/r/20241128005547.4077116-16-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
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Revision tags: v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1 |
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#
114143a5 |
| 16-Sep-2024 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 updates from Will Deacon: "The highlights are support for Arm's "Permission Overlay Extension" u
Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 updates from Will Deacon: "The highlights are support for Arm's "Permission Overlay Extension" using memory protection keys, support for running as a protected guest on Android as well as perf support for a bunch of new interconnect PMUs.
Summary:
ACPI: - Enable PMCG erratum workaround for HiSilicon HIP10 and 11 platforms. - Ensure arm64-specific IORT header is covered by MAINTAINERS.
CPU Errata: - Enable workaround for hardware access/dirty issue on Ampere-1A cores.
Memory management: - Define PHYSMEM_END to fix a crash in the amdgpu driver. - Avoid tripping over invalid kernel mappings on the kexec() path. - Userspace support for the Permission Overlay Extension (POE) using protection keys.
Perf and PMUs: - Add support for the "fixed instruction counter" extension in the CPU PMU architecture. - Extend and fix the event encodings for Apple's M1 CPU PMU. - Allow LSM hooks to decide on SPE permissions for physical profiling. - Add support for the CMN S3 and NI-700 PMUs.
Confidential Computing: - Add support for booting an arm64 kernel as a protected guest under Android's "Protected KVM" (pKVM) hypervisor.
Selftests: - Fix vector length issues in the SVE/SME sigreturn tests - Fix build warning in the ptrace tests.
Timers: - Add support for PR_{G,S}ET_TSC so that 'rr' can deal with non-determinism arising from the architected counter.
Miscellaneous: - Rework our IPI-based CPU stopping code to try NMIs if regular IPIs don't succeed. - Minor fixes and cleanups"
* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (94 commits) perf: arm-ni: Fix an NULL vs IS_ERR() bug arm64: hibernate: Fix warning for cast from restricted gfp_t arm64: esr: Define ESR_ELx_EC_* constants as UL arm64: pkeys: remove redundant WARN perf: arm_pmuv3: Use BR_RETIRED for HW branch event if enabled MAINTAINERS: List Arm interconnect PMUs as supported perf: Add driver for Arm NI-700 interconnect PMU dt-bindings/perf: Add Arm NI-700 PMU perf/arm-cmn: Improve format attr printing perf/arm-cmn: Clean up unnecessary NUMA_NO_NODE check arm64/mm: use lm_alias() with addresses passed to memblock_free() mm: arm64: document why pte is not advanced in contpte_ptep_set_access_flags() arm64: Expose the end of the linear map in PHYSMEM_END arm64: trans_pgd: mark PTEs entries as valid to avoid dead kexec() arm64/mm: Delete __init region from memblock.reserved perf/arm-cmn: Support CMN S3 dt-bindings: perf: arm-cmn: Add CMN S3 perf/arm-cmn: Refactor DTC PMU register access perf/arm-cmn: Make cycle counts less surprising perf/arm-cmn: Improve build-time assertion ...
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Revision tags: v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5 |
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#
487355f1 |
| 22-Aug-2024 |
Joey Gouly <joey.gouly@arm.com> |
KVM: selftests: get-reg-list: add Permission Overlay registers
Add new system registers: - POR_EL1 - POR_EL0
Signed-off-by: Joey Gouly <joey.gouly@arm.com> Cc: Catalin Marinas <catalin.marinas@
KVM: selftests: get-reg-list: add Permission Overlay registers
Add new system registers: - POR_EL1 - POR_EL0
Signed-off-by: Joey Gouly <joey.gouly@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Marc Zyngier <maz@kernel.org> Cc: Oliver Upton <oliver.upton@linux.dev> Cc: Shuah Khan <shuah@kernel.org> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20240822151113.1479789-31-joey.gouly@arm.com Signed-off-by: Will Deacon <will@kernel.org>
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Revision tags: v6.11-rc4, v6.11-rc3, v6.11-rc2 |
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#
ad518452 |
| 31-Jul-2024 |
Mark Brown <broonie@kernel.org> |
KVM: selftests: arm64: Correct feature test for S1PIE in get-reg-list
The ID register for S1PIE is ID_AA64MMFR3_EL1.S1PIE which is bits 11:8 but get-reg-list uses a shift of 4, checking SCTLRX inste
KVM: selftests: arm64: Correct feature test for S1PIE in get-reg-list
The ID register for S1PIE is ID_AA64MMFR3_EL1.S1PIE which is bits 11:8 but get-reg-list uses a shift of 4, checking SCTLRX instead. Use a shift of 8 instead.
Fixes: 5f0419a0083b ("KVM: selftests: get-reg-list: add Permission Indirection registers") Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Joey Gouly <joey.gouly@arm.com> Link: https://lore.kernel.org/r/20240731-kvm-arm64-fix-s1pie-test-v1-1-a9253f3b7db4@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
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Revision tags: v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4 |
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#
e8566033 |
| 25-Jul-2023 |
Haibo Xu <haibo1.xu@intel.com> |
KVM: arm64: selftests: Move finalize_vcpu back to run_test
No functional changes. Just move the finalize_vcpu call back to run_test and do weak function trick to prepare for the opration in riscv.
KVM: arm64: selftests: Move finalize_vcpu back to run_test
No functional changes. Just move the finalize_vcpu call back to run_test and do weak function trick to prepare for the opration in riscv.
Suggested-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Haibo Xu <haibo1.xu@intel.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org>
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#
90a6bcbc |
| 25-Jul-2023 |
Haibo Xu <haibo1.xu@intel.com> |
KVM: arm64: selftests: Move reject_set check logic to a function
No functional changes. Just move the reject_set check logic to a function so we can check for a specific errno. This is a preparation
KVM: arm64: selftests: Move reject_set check logic to a function
No functional changes. Just move the reject_set check logic to a function so we can check for a specific errno. This is a preparation for support reject_set in riscv.
Suggested-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Haibo Xu <haibo1.xu@intel.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org>
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#
17da79e0 |
| 25-Jul-2023 |
Andrew Jones <ajones@ventanamicro.com> |
KVM: arm64: selftests: Split get-reg-list test code
Split the arch-neutral test code out of aarch64/get-reg-list.c into get-reg-list.c. To do this we invent a new make variable $(SPLIT_TESTS) which
KVM: arm64: selftests: Split get-reg-list test code
Split the arch-neutral test code out of aarch64/get-reg-list.c into get-reg-list.c. To do this we invent a new make variable $(SPLIT_TESTS) which expects common parts to be in the KVM selftests root and the counterparts to have the same name, but be in $(ARCH_DIR).
There's still some work to be done to de-aarch64 the common get-reg-list.c, but we leave that to the next patch to avoid modifying too much code while moving it.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Haibo Xu <haibo1.xu@intel.com> Signed-off-by: Anup Patel <anup@brainfault.org>
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#
0ace6bda |
| 25-Jul-2023 |
Andrew Jones <ajones@ventanamicro.com> |
KVM: arm64: selftests: Delete core_reg_fixup
core_reg_fixup() complicates sharing the get-reg-list test with other architectures. Rather than work at keeping it, with plenty of #ifdeffery, just dele
KVM: arm64: selftests: Delete core_reg_fixup
core_reg_fixup() complicates sharing the get-reg-list test with other architectures. Rather than work at keeping it, with plenty of #ifdeffery, just delete it, as it's unlikely to test a kernel based on anything older than v5.2 with the get-reg-list test, which is a test meant to check for regressions in new kernels. (And, an older version of the test can still be used for older kernels if necessary.)
Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Haibo Xu <haibo1.xu@intel.com> Signed-off-by: Anup Patel <anup@brainfault.org>
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#
9177b715 |
| 25-Jul-2023 |
Andrew Jones <ajones@ventanamicro.com> |
KVM: arm64: selftests: Rename vcpu_config and add to kvm_util.h
Rename vcpu_config to vcpu_reg_list to be more specific and add it to kvm_util.h. While it may not get used outside get-reg-list tests
KVM: arm64: selftests: Rename vcpu_config and add to kvm_util.h
Rename vcpu_config to vcpu_reg_list to be more specific and add it to kvm_util.h. While it may not get used outside get-reg-list tests, exporting it doesn't hurt, as long as it has a unique enough name. This is a step in the direction of sharing most of the get- reg-list test code between architectures.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Haibo Xu <haibo1.xu@intel.com> Signed-off-by: Anup Patel <anup@brainfault.org>
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#
c2b5aa7a |
| 25-Jul-2023 |
Andrew Jones <ajones@ventanamicro.com> |
KVM: arm64: selftests: Remove print_reg's dependency on vcpu_config
print_reg() and its helpers only use the vcpu_config pointer for config_name(). So just pass the config name in instead, which is
KVM: arm64: selftests: Remove print_reg's dependency on vcpu_config
print_reg() and its helpers only use the vcpu_config pointer for config_name(). So just pass the config name in instead, which is used as a prefix in asserts. print_reg() can now be compiled independently of config_name().
Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Haibo Xu <haibo1.xu@intel.com> Signed-off-by: Anup Patel <anup@brainfault.org>
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#
26538608 |
| 25-Jul-2023 |
Andrew Jones <ajones@ventanamicro.com> |
KVM: arm64: selftests: Drop SVE cap check in print_reg
The check doesn't prove much anyway, as the reg lists could be messed up too. Just drop the check to simplify making print_reg more independent
KVM: arm64: selftests: Drop SVE cap check in print_reg
The check doesn't prove much anyway, as the reg lists could be messed up too. Just drop the check to simplify making print_reg more independent.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Haibo Xu <haibo1.xu@intel.com> Signed-off-by: Anup Patel <anup@brainfault.org>
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#
dfaf20af |
| 25-Jul-2023 |
Andrew Jones <ajones@ventanamicro.com> |
KVM: arm64: selftests: Replace str_with_index with strdup_printf
The original author of aarch64/get-reg-list.c (me) was wearing tunnel vision goggles when implementing str_with_index(). There's no r
KVM: arm64: selftests: Replace str_with_index with strdup_printf
The original author of aarch64/get-reg-list.c (me) was wearing tunnel vision goggles when implementing str_with_index(). There's no reason to have such a special case string function. Instead, take inspiration from glib and implement strdup_printf. The implementation builds on vasprintf() which requires _GNU_SOURCE, but we require _GNU_SOURCE in most files already.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Haibo Xu <haibo1.xu@intel.com> Signed-off-by: Anup Patel <anup@brainfault.org>
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Revision tags: v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6 |
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#
5f0419a0 |
| 06-Jun-2023 |
Joey Gouly <joey.gouly@arm.com> |
KVM: selftests: get-reg-list: add Permission Indirection registers
Add new system registers: - ID_AA64MMFR3_EL1 - TCR2_EL1 - PIRE0_EL1 - PIR_EL1
Signed-off-by: Joey Gouly <joey.gouly@arm.co
KVM: selftests: get-reg-list: add Permission Indirection registers
Add new system registers: - ID_AA64MMFR3_EL1 - TCR2_EL1 - PIRE0_EL1 - PIR_EL1
Signed-off-by: Joey Gouly <joey.gouly@arm.com> Cc: Marc Zyngier <maz@kernel.org> Cc: Oliver Upton <oliver.upton@linux.dev> Cc: Mark Brown <broonie@kernel.org> Cc: Shuah Khan <shuah@kernel.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20230606145859.697944-21-joey.gouly@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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#
ee053e03 |
| 06-Jun-2023 |
Joey Gouly <joey.gouly@arm.com> |
KVM: selftests: get-reg-list: support ID register features
This stops the test complaining about missing registers, when running on an older kernel that does not support newer features.
Signed-off-
KVM: selftests: get-reg-list: support ID register features
This stops the test complaining about missing registers, when running on an older kernel that does not support newer features.
Signed-off-by: Joey Gouly <joey.gouly@arm.com> Cc: Marc Zyngier <maz@kernel.org> Cc: Oliver Upton <oliver.upton@linux.dev> Cc: Mark Brown <broonie@kernel.org> Cc: Shuah Khan <shuah@kernel.org> Link: https://lore.kernel.org/r/20230606145859.697944-20-joey.gouly@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Revision tags: v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3 |
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#
367eb095 |
| 21-Apr-2023 |
Marc Zyngier <maz@kernel.org> |
Merge branch kvm-arm64/selftest/misc-6.4 into kvmarm-master/next
* kvm-arm64/selftest/misc-6.4: : . : Misc selftest updates for 6.4 : : - Add comments for recently added ID registers : .
Merge branch kvm-arm64/selftest/misc-6.4 into kvmarm-master/next
* kvm-arm64/selftest/misc-6.4: : . : Misc selftest updates for 6.4 : : - Add comments for recently added ID registers : . KVM: selftests: Comment newly defined aarch64 ID registers
Signed-off-by: Marc Zyngier <maz@kernel.org>
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Revision tags: v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2 |
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#
767cc050 |
| 06-Mar-2023 |
Mark Brown <broonie@kernel.org> |
KVM: selftests: Comment newly defined aarch64 ID registers
All otherwise unspecified aarch64 ID registers should be read as zero so we cover the whole ID register space in the get-reg-list test but
KVM: selftests: Comment newly defined aarch64 ID registers
All otherwise unspecified aarch64 ID registers should be read as zero so we cover the whole ID register space in the get-reg-list test but we've added comments for those that have been named. Add comments for ID_AA64PFR2_EL1, ID_AA64SMFR0_EL1, ID_AA64ISAR2_EL1, ID_AA64MMFR3_EL1 and ID_AA64MMFR4_EL1 which have been defined since the comments were added so someone looking for them will see that they are covered.
Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230210-kvm-arm64-getreg-comments-v1-1-a16c73be5ab4@kernel.org
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#
0630fb8e |
| 30-Mar-2023 |
Marc Zyngier <maz@kernel.org> |
KVM: arm64: selftests: Add physical timer registers to the sysreg list
Now that KVM exposes CNTPCT_EL0, CNTP_CTL_EL0 and CNT_CVAL_EL0 to userspace, add them to the get-reg-list selftest.
Reviewed-b
KVM: arm64: selftests: Add physical timer registers to the sysreg list
Now that KVM exposes CNTPCT_EL0, CNTP_CTL_EL0 and CNT_CVAL_EL0 to userspace, add them to the get-reg-list selftest.
Reviewed-by: Colton Lewis <coltonlewis@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230330174800.2677007-19-maz@kernel.org
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Revision tags: v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1 |
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7ed397d1 |
| 27-May-2022 |
Sean Christopherson <seanjc@google.com> |
KVM: selftests: Add TEST_REQUIRE macros to reduce skipping copy+paste
Add TEST_REQUIRE() and __TEST_REQUIRE() to replace the myriad open coded instances of selftests exiting with KSFT_SKIP after pri
KVM: selftests: Add TEST_REQUIRE macros to reduce skipping copy+paste
Add TEST_REQUIRE() and __TEST_REQUIRE() to replace the myriad open coded instances of selftests exiting with KSFT_SKIP after printing an informational message. In addition to reducing the amount of boilerplate code in selftests, the UPPERCASE macro names make it easier to visually identify a test's requirements.
Convert usage that erroneously uses something other than print_skip() and/or "exits" with '0' or some other non-KSFT_SKIP value.
Intentionally drop a kvm_vm_free() in aarch64/debug-exceptions.c as part of the conversion. All memory and file descriptors are freed on process exit, so the explicit free is superfluous.
Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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3ea9b809 |
| 27-May-2022 |
Sean Christopherson <seanjc@google.com> |
KVM: selftests: Add kvm_has_cap() to provide syntactic sugar
Add kvm_has_cap() to wrap kvm_check_cap() and return a bool for the use cases where the caller only wants check if a capability is suppor
KVM: selftests: Add kvm_has_cap() to provide syntactic sugar
Add kvm_has_cap() to wrap kvm_check_cap() and return a bool for the use cases where the caller only wants check if a capability is supported, i.e. doesn't care about the value beyond whether or not it's non-zero. The "check" terminology is somewhat ambiguous as the non-boolean return suggests that '0' might mean "success", i.e. suggests that the ioctl uses the 0/-errno pattern. Provide a wrapper instead of trying to find a new name for the raw helper; the "check" terminology is derived from the name of the ioctl, so using e.g. "get" isn't a clear win.
Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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