Lines Matching refs:ext_csd
128 if (card->ext_csd.erase_group_def & 1)
129 card->erase_size = card->ext_csd.hc_erase_size;
139 if (card->ext_csd.erase_group_def & 1)
140 card->wp_grp_size = card->ext_csd.hc_erase_size *
141 card->ext_csd.raw_hc_erase_gap_size;
206 u8 card_type = card->ext_csd.raw_card_type;
260 card->ext_csd.strobe_support &&
264 card->ext_csd.hs_max_dtr = hs_max_dtr;
265 card->ext_csd.hs200_max_dtr = hs200_max_dtr;
269 static void mmc_manage_enhanced_area(struct mmc_card *card, u8 *ext_csd)
276 card->ext_csd.enhanced_area_offset = -EINVAL;
277 card->ext_csd.enhanced_area_size = -EINVAL;
284 if ((ext_csd[EXT_CSD_PARTITION_SUPPORT] & 0x2) &&
285 (ext_csd[EXT_CSD_PARTITION_ATTRIBUTE] & 0x1)) {
286 if (card->ext_csd.partition_setting_completed) {
288 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
290 ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
295 card->ext_csd.enhanced_area_offset =
296 (((unsigned long long)ext_csd[139]) << 24) +
297 (((unsigned long long)ext_csd[138]) << 16) +
298 (((unsigned long long)ext_csd[137]) << 8) +
299 (((unsigned long long)ext_csd[136]));
301 card->ext_csd.enhanced_area_offset <<= 9;
305 card->ext_csd.enhanced_area_size =
306 (ext_csd[142] << 16) + (ext_csd[141] << 8) +
307 ext_csd[140];
308 card->ext_csd.enhanced_area_size *=
310 card->ext_csd.enhanced_area_size <<= 9;
330 static void mmc_manage_gp_partitions(struct mmc_card *card, u8 *ext_csd)
338 * If ext_csd has the size of general purpose partitions,
341 if (ext_csd[EXT_CSD_PARTITION_SUPPORT] &
344 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
346 ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
349 if (!ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3] &&
350 !ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3 + 1] &&
351 !ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3 + 2])
353 if (card->ext_csd.partition_setting_completed == 0) {
359 (ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3 + 2]
361 (ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3 + 1]
363 ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3];
379 static int mmc_decode_ext_csd(struct mmc_card *card, u8 *ext_csd)
387 card->ext_csd.raw_ext_csd_structure = ext_csd[EXT_CSD_STRUCTURE];
389 if (card->ext_csd.raw_ext_csd_structure > 2) {
392 card->ext_csd.raw_ext_csd_structure);
408 card->ext_csd.rev = ext_csd[EXT_CSD_REV];
410 /* fixup device after ext_csd revision field is updated */
413 card->ext_csd.raw_sectors[0] = ext_csd[EXT_CSD_SEC_CNT + 0];
414 card->ext_csd.raw_sectors[1] = ext_csd[EXT_CSD_SEC_CNT + 1];
415 card->ext_csd.raw_sectors[2] = ext_csd[EXT_CSD_SEC_CNT + 2];
416 card->ext_csd.raw_sectors[3] = ext_csd[EXT_CSD_SEC_CNT + 3];
417 if (card->ext_csd.rev >= 2) {
418 card->ext_csd.sectors =
419 ext_csd[EXT_CSD_SEC_CNT + 0] << 0 |
420 ext_csd[EXT_CSD_SEC_CNT + 1] << 8 |
421 ext_csd[EXT_CSD_SEC_CNT + 2] << 16 |
422 ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
425 if (card->ext_csd.sectors > (2u * 1024 * 1024 * 1024) / 512)
429 card->ext_csd.strobe_support = ext_csd[EXT_CSD_STROBE_SUPPORT];
430 card->ext_csd.raw_card_type = ext_csd[EXT_CSD_CARD_TYPE];
432 card->ext_csd.raw_s_a_timeout = ext_csd[EXT_CSD_S_A_TIMEOUT];
433 card->ext_csd.raw_erase_timeout_mult =
434 ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT];
435 card->ext_csd.raw_hc_erase_grp_size =
436 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
437 card->ext_csd.raw_boot_mult =
438 ext_csd[EXT_CSD_BOOT_MULT];
439 if (card->ext_csd.rev >= 3) {
440 u8 sa_shift = ext_csd[EXT_CSD_S_A_TIMEOUT];
441 card->ext_csd.part_config = ext_csd[EXT_CSD_PART_CONFIG];
444 card->ext_csd.part_time = 10 * ext_csd[EXT_CSD_PART_SWITCH_TIME];
448 card->ext_csd.sa_timeout =
449 1 << ext_csd[EXT_CSD_S_A_TIMEOUT];
450 card->ext_csd.erase_group_def =
451 ext_csd[EXT_CSD_ERASE_GROUP_DEF];
452 card->ext_csd.hc_erase_timeout = 300 *
453 ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT];
454 card->ext_csd.hc_erase_size =
455 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] << 10;
457 card->ext_csd.rel_sectors = ext_csd[EXT_CSD_REL_WR_SEC_C];
463 if (ext_csd[EXT_CSD_BOOT_MULT] && mmc_host_can_access_boot(card->host)) {
465 part_size = ext_csd[EXT_CSD_BOOT_MULT] << 17;
474 card->ext_csd.raw_hc_erase_gap_size =
475 ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
476 card->ext_csd.raw_sec_trim_mult =
477 ext_csd[EXT_CSD_SEC_TRIM_MULT];
478 card->ext_csd.raw_sec_erase_mult =
479 ext_csd[EXT_CSD_SEC_ERASE_MULT];
480 card->ext_csd.raw_sec_feature_support =
481 ext_csd[EXT_CSD_SEC_FEATURE_SUPPORT];
482 card->ext_csd.raw_trim_mult =
483 ext_csd[EXT_CSD_TRIM_MULT];
484 card->ext_csd.raw_partition_support = ext_csd[EXT_CSD_PARTITION_SUPPORT];
485 card->ext_csd.raw_driver_strength = ext_csd[EXT_CSD_DRIVER_STRENGTH];
486 if (card->ext_csd.rev >= 4) {
487 if (ext_csd[EXT_CSD_PARTITION_SETTING_COMPLETED] &
489 card->ext_csd.partition_setting_completed = 1;
491 card->ext_csd.partition_setting_completed = 0;
493 mmc_manage_enhanced_area(card, ext_csd);
495 mmc_manage_gp_partitions(card, ext_csd);
497 card->ext_csd.sec_trim_mult =
498 ext_csd[EXT_CSD_SEC_TRIM_MULT];
499 card->ext_csd.sec_erase_mult =
500 ext_csd[EXT_CSD_SEC_ERASE_MULT];
501 card->ext_csd.sec_feature_support =
502 ext_csd[EXT_CSD_SEC_FEATURE_SUPPORT];
503 card->ext_csd.trim_timeout = 300 *
504 ext_csd[EXT_CSD_TRIM_MULT];
511 card->ext_csd.boot_ro_lock = ext_csd[EXT_CSD_BOOT_WP];
512 card->ext_csd.boot_ro_lockable = true;
515 card->ext_csd.raw_pwr_cl_52_195 =
516 ext_csd[EXT_CSD_PWR_CL_52_195];
517 card->ext_csd.raw_pwr_cl_26_195 =
518 ext_csd[EXT_CSD_PWR_CL_26_195];
519 card->ext_csd.raw_pwr_cl_52_360 =
520 ext_csd[EXT_CSD_PWR_CL_52_360];
521 card->ext_csd.raw_pwr_cl_26_360 =
522 ext_csd[EXT_CSD_PWR_CL_26_360];
523 card->ext_csd.raw_pwr_cl_200_195 =
524 ext_csd[EXT_CSD_PWR_CL_200_195];
525 card->ext_csd.raw_pwr_cl_200_360 =
526 ext_csd[EXT_CSD_PWR_CL_200_360];
527 card->ext_csd.raw_pwr_cl_ddr_52_195 =
528 ext_csd[EXT_CSD_PWR_CL_DDR_52_195];
529 card->ext_csd.raw_pwr_cl_ddr_52_360 =
530 ext_csd[EXT_CSD_PWR_CL_DDR_52_360];
531 card->ext_csd.raw_pwr_cl_ddr_200_360 =
532 ext_csd[EXT_CSD_PWR_CL_DDR_200_360];
535 if (card->ext_csd.rev >= 5) {
541 if (ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1) {
542 card->ext_csd.bkops = 1;
543 card->ext_csd.man_bkops_en =
544 (ext_csd[EXT_CSD_BKOPS_EN] &
546 card->ext_csd.raw_bkops_status =
547 ext_csd[EXT_CSD_BKOPS_STATUS];
548 if (card->ext_csd.man_bkops_en)
551 card->ext_csd.auto_bkops_en =
552 (ext_csd[EXT_CSD_BKOPS_EN] &
554 if (card->ext_csd.auto_bkops_en)
561 !broken_hpi && (ext_csd[EXT_CSD_HPI_FEATURES] & 0x1)) {
562 card->ext_csd.hpi = 1;
563 if (ext_csd[EXT_CSD_HPI_FEATURES] & 0x2)
564 card->ext_csd.hpi_cmd = MMC_STOP_TRANSMISSION;
566 card->ext_csd.hpi_cmd = MMC_SEND_STATUS;
571 card->ext_csd.out_of_int_time =
572 ext_csd[EXT_CSD_OUT_OF_INTERRUPT_TIME] * 10;
575 card->ext_csd.rel_param = ext_csd[EXT_CSD_WR_REL_PARAM];
576 card->ext_csd.rst_n_function = ext_csd[EXT_CSD_RST_N_FUNCTION];
581 card->ext_csd.raw_rpmb_size_mult = ext_csd[EXT_CSD_RPMB_MULT];
582 if (ext_csd[EXT_CSD_RPMB_MULT] && mmc_host_can_cmd23(card->host)) {
583 mmc_part_add(card, ext_csd[EXT_CSD_RPMB_MULT] << 17,
590 card->ext_csd.raw_erased_mem_count = ext_csd[EXT_CSD_ERASED_MEM_CONT];
591 if (ext_csd[EXT_CSD_ERASED_MEM_CONT])
597 card->ext_csd.generic_cmd6_time = DEFAULT_CMD6_TIMEOUT_MS;
598 if (card->ext_csd.rev >= 6) {
599 card->ext_csd.feature_support |= MMC_DISCARD_FEATURE;
601 card->ext_csd.generic_cmd6_time = 10 *
602 ext_csd[EXT_CSD_GENERIC_CMD6_TIME];
603 card->ext_csd.power_off_longtime = 10 *
604 ext_csd[EXT_CSD_POWER_OFF_LONG_TIME];
606 card->ext_csd.cache_size =
607 ext_csd[EXT_CSD_CACHE_SIZE + 0] << 0 |
608 ext_csd[EXT_CSD_CACHE_SIZE + 1] << 8 |
609 ext_csd[EXT_CSD_CACHE_SIZE + 2] << 16 |
610 ext_csd[EXT_CSD_CACHE_SIZE + 3] << 24;
612 if (ext_csd[EXT_CSD_DATA_SECTOR_SIZE] == 1)
613 card->ext_csd.data_sector_size = 4096;
615 card->ext_csd.data_sector_size = 512;
617 if ((ext_csd[EXT_CSD_DATA_TAG_SUPPORT] & 1) &&
618 (ext_csd[EXT_CSD_TAG_UNIT_SIZE] <= 8)) {
619 card->ext_csd.data_tag_unit_size =
620 ((unsigned int) 1 << ext_csd[EXT_CSD_TAG_UNIT_SIZE]) *
621 (card->ext_csd.data_sector_size);
623 card->ext_csd.data_tag_unit_size = 0;
626 card->ext_csd.data_sector_size = 512;
634 if (!card->ext_csd.part_time)
635 card->ext_csd.part_time = card->ext_csd.generic_cmd6_time;
637 if (card->ext_csd.part_time < MMC_MIN_PART_SWITCH_TIME)
638 card->ext_csd.part_time = MMC_MIN_PART_SWITCH_TIME;
641 if (card->ext_csd.rev >= 7) {
642 memcpy(card->ext_csd.fwrev, &ext_csd[EXT_CSD_FIRMWARE_VERSION],
644 card->ext_csd.ffu_capable =
645 (ext_csd[EXT_CSD_SUPPORTED_MODE] & 0x1) &&
646 !(ext_csd[EXT_CSD_FW_CONFIG] & 0x1);
648 card->ext_csd.pre_eol_info = ext_csd[EXT_CSD_PRE_EOL_INFO];
649 card->ext_csd.device_life_time_est_typ_a =
650 ext_csd[EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_A];
651 card->ext_csd.device_life_time_est_typ_b =
652 ext_csd[EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_B];
656 if (card->ext_csd.rev >= 8) {
657 card->ext_csd.cmdq_support = ext_csd[EXT_CSD_CMDQ_SUPPORT] &
659 card->ext_csd.cmdq_depth = (ext_csd[EXT_CSD_CMDQ_DEPTH] &
662 if (card->ext_csd.cmdq_depth <= 2) {
663 card->ext_csd.cmdq_support = false;
664 card->ext_csd.cmdq_depth = 0;
666 if (card->ext_csd.cmdq_support) {
669 card->ext_csd.cmdq_depth);
671 card->ext_csd.enhanced_rpmb_supported =
672 (card->ext_csd.rel_param &
675 if (card->ext_csd.rev >= 9) {
693 u8 *ext_csd;
699 err = mmc_get_ext_csd(card, &ext_csd);
724 err = mmc_decode_ext_csd(card, ext_csd);
725 kfree(ext_csd);
742 err = !((card->ext_csd.raw_partition_support ==
744 (card->ext_csd.raw_erased_mem_count ==
746 (card->ext_csd.rev ==
748 (card->ext_csd.raw_ext_csd_structure ==
750 (card->ext_csd.raw_card_type ==
752 (card->ext_csd.raw_s_a_timeout ==
754 (card->ext_csd.raw_hc_erase_gap_size ==
756 (card->ext_csd.raw_erase_timeout_mult ==
758 (card->ext_csd.raw_hc_erase_grp_size ==
760 (card->ext_csd.raw_sec_trim_mult ==
762 (card->ext_csd.raw_sec_erase_mult ==
764 (card->ext_csd.raw_sec_feature_support ==
766 (card->ext_csd.raw_trim_mult ==
768 (card->ext_csd.raw_sectors[0] ==
770 (card->ext_csd.raw_sectors[1] ==
772 (card->ext_csd.raw_sectors[2] ==
774 (card->ext_csd.raw_sectors[3] ==
776 (card->ext_csd.raw_pwr_cl_52_195 ==
778 (card->ext_csd.raw_pwr_cl_26_195 ==
780 (card->ext_csd.raw_pwr_cl_52_360 ==
782 (card->ext_csd.raw_pwr_cl_26_360 ==
784 (card->ext_csd.raw_pwr_cl_200_195 ==
786 (card->ext_csd.raw_pwr_cl_200_360 ==
788 (card->ext_csd.raw_pwr_cl_ddr_52_195 ==
790 (card->ext_csd.raw_pwr_cl_ddr_52_360 ==
792 (card->ext_csd.raw_pwr_cl_ddr_200_360 ==
810 MMC_DEV_ATTR(ffu_capable, "%d\n", card->ext_csd.ffu_capable);
816 MMC_DEV_ATTR(rev, "0x%x\n", card->ext_csd.rev);
817 MMC_DEV_ATTR(pre_eol_info, "0x%02x\n", card->ext_csd.pre_eol_info);
819 card->ext_csd.device_life_time_est_typ_a,
820 card->ext_csd.device_life_time_est_typ_b);
823 card->ext_csd.enhanced_area_offset);
824 MMC_DEV_ATTR(enhanced_area_size, "%u\n", card->ext_csd.enhanced_area_size);
825 MMC_DEV_ATTR(raw_rpmb_size_mult, "%#x\n", card->ext_csd.raw_rpmb_size_mult);
827 card->ext_csd.enhanced_rpmb_supported);
828 MMC_DEV_ATTR(rel_sectors, "%#x\n", card->ext_csd.rel_sectors);
831 MMC_DEV_ATTR(cmdq_en, "%d\n", card->ext_csd.cmdq_en);
839 if (card->ext_csd.rev < 7)
843 card->ext_csd.fwrev);
909 struct mmc_ext_csd *ext_csd = &card->ext_csd;
916 pwrclass_val = ext_csd->raw_pwr_cl_26_195;
919 ext_csd->raw_pwr_cl_52_195 :
920 ext_csd->raw_pwr_cl_ddr_52_195;
922 pwrclass_val = ext_csd->raw_pwr_cl_200_195;
934 pwrclass_val = ext_csd->raw_pwr_cl_26_360;
937 ext_csd->raw_pwr_cl_52_360 :
938 ext_csd->raw_pwr_cl_ddr_52_360;
941 ext_csd->raw_pwr_cl_ddr_200_360 :
942 ext_csd->raw_pwr_cl_200_360;
962 card->ext_csd.generic_cmd6_time);
1007 max_dtr > card->ext_csd.hs200_max_dtr)
1008 max_dtr = card->ext_csd.hs200_max_dtr;
1009 else if (mmc_card_hs(card) && max_dtr > card->ext_csd.hs_max_dtr)
1010 max_dtr = card->ext_csd.hs_max_dtr;
1061 card->ext_csd.generic_cmd6_time);
1070 * compare ext_csd previously read in 1 bit mode
1071 * against ext_csd at new bus width
1099 card->ext_csd.generic_cmd6_time, MMC_TIMING_MMC_HS,
1130 card->ext_csd.generic_cmd6_time,
1199 card->ext_csd.generic_cmd6_time, 0,
1215 max_dtr = card->ext_csd.hs_max_dtr;
1229 card->ext_csd.generic_cmd6_time);
1241 card->ext_csd.generic_cmd6_time, 0,
1289 max_dtr = card->ext_csd.hs_max_dtr;
1295 val, card->ext_csd.generic_cmd6_time, 0,
1311 EXT_CSD_BUS_WIDTH_8, card->ext_csd.generic_cmd6_time,
1326 val, card->ext_csd.generic_cmd6_time, 0,
1361 card_drv_type = card->ext_csd.raw_driver_strength |
1369 card->ext_csd.hs200_max_dtr,
1405 card->ext_csd.generic_cmd6_time, 0,
1429 card->ext_csd.generic_cmd6_time);
1443 card->ext_csd.generic_cmd6_time, 0,
1508 card->ext_csd.generic_cmd6_time, 0,
1522 mmc_set_clock(card->host, card->ext_csd.hs_max_dtr);
1761 if (card->ext_csd.rev >= 3) {
1764 card->ext_csd.generic_cmd6_time);
1775 card->ext_csd.enhanced_area_offset = -EINVAL;
1776 card->ext_csd.enhanced_area_size = -EINVAL;
1778 card->ext_csd.erase_group_def = 1;
1791 if (card->ext_csd.part_config & EXT_CSD_PART_CONFIG_ACC_MASK) {
1792 card->ext_csd.part_config &= ~EXT_CSD_PART_CONFIG_ACC_MASK;
1794 card->ext_csd.part_config,
1795 card->ext_csd.part_time);
1801 * Enable power_off_notification byte in the ext_csd register
1803 if (card->ext_csd.rev >= 6) {
1807 card->ext_csd.generic_cmd6_time);
1816 card->ext_csd.power_off_notification = EXT_CSD_POWER_ON;
1869 if (card->ext_csd.hpi) {
1872 card->ext_csd.generic_cmd6_time);
1878 card->ext_csd.hpi_en = 0;
1880 card->ext_csd.hpi_en = 1;
1891 if (card->ext_csd.cache_size > 0) {
1894 timeout_ms = max(card->ext_csd.generic_cmd6_time, timeout_ms);
1906 card->ext_csd.cache_ctrl = 0;
1908 card->ext_csd.cache_ctrl = 1;
1916 card->ext_csd.cmdq_en = false;
1917 if (card->ext_csd.cmdq_support && host->caps2 & MMC_CAP2_CQE) {
1924 card->ext_csd.cmdq_support = false;
1925 card->ext_csd.cmdq_depth = 0;
1933 card->reenable_cmdq = card->ext_csd.cmdq_en;
1940 if (card->ext_csd.cmdq_en) {
1973 return card->ext_csd.rev >= 3;
1988 unsigned int timeout_ms = DIV_ROUND_UP(card->ext_csd.sa_timeout, 10000);
2033 (card->ext_csd.power_off_notification == EXT_CSD_POWER_ON);
2051 unsigned int timeout = card->ext_csd.generic_cmd6_time;
2056 timeout = card->ext_csd.power_off_longtime;
2066 card->ext_csd.power_off_notification = EXT_CSD_NO_POWER_NOTIFICATION;
2108 return host->card->ext_csd.cache_size > 0 &&
2109 host->card->ext_csd.cache_ctrl & 1;
2302 rst_n_function = card->ext_csd.rst_n_function;