Lines Matching refs:esr
15 #include <asm/esr.h>
32 static void kvm_handle_guest_serror(struct kvm_vcpu *vcpu, u64 esr)
34 if (!arm64_is_ras_serror(esr) || arm64_is_fatal_ras_serror(NULL, esr))
132 u64 esr = kvm_vcpu_get_esr(vcpu);
133 bool is_wfe = !!(esr & ESR_ELx_WFx_ISS_WFE);
146 if (esr & ESR_ELx_WFx_ISS_WFxT) {
147 if (esr & ESR_ELx_WFx_ISS_RV) {
157 esr &= ~ESR_ELx_WFx_ISS_WFxT;
161 if (esr & ESR_ELx_WFx_ISS_WFE) {
164 if (esr & ESR_ELx_WFx_ISS_WFxT)
189 u64 esr = kvm_vcpu_get_esr(vcpu);
195 run->debug.arch.hsr = lower_32_bits(esr);
196 run->debug.arch.hsr_high = upper_32_bits(esr);
199 switch (ESR_ELx_EC(esr)) {
213 u64 esr = kvm_vcpu_get_esr(vcpu);
215 kvm_pr_unimpl("Unknown exception class: esr: %#016llx -- %s\n",
216 esr, esr_get_class_string(esr));
316 u64 esr = kvm_vcpu_get_esr(vcpu);
317 u64 iss = ESR_ELx_ISS(esr);
364 kvm_inject_nested_sync(vcpu, esr);
404 u64 esr = kvm_vcpu_get_esr(vcpu);
405 u8 esr_ec = ESR_ELx_EC(esr);
519 void __noreturn __cold nvhe_hyp_panic_handler(u64 esr, u64 spsr,
530 } else if (ESR_ELx_EC(esr) == ESR_ELx_EC_BRK64 &&
531 esr_brk_comment(esr) == BUG_BRK_IMM) {
548 } else if (IS_ENABLED(CONFIG_CFI_CLANG) && esr_is_cfi_brk(esr)) {
551 ESR_ELx_EC(esr) == ESR_ELx_EC_BRK64 &&
552 esr_is_ubsan_brk(esr)) {
553 print_nvhe_hyp_panic(report_ubsan_failure(esr & UBSAN_BRK_MASK),
571 spsr, elr_virt, esr, far, hpfar, par, vcpu);