1508  * @cgu: if cgu is present and controlled by this NIC
1515  * If cgu is owned unregister pins from given dplls.
1519 ice_dpll_deinit_direct_pins(bool cgu, struct ice_dpll_pin *pins, int count,  in ice_dpll_deinit_direct_pins()  argument
1524 	if (cgu) {  in ice_dpll_deinit_direct_pins()
1534  * @cgu: if cgu is present and controlled by this NIC
1543  * If cgu is owned register allocated pins with given dplls.
1550 ice_dpll_init_direct_pins(struct ice_pf *pf, bool cgu,  in ice_dpll_init_direct_pins()  argument
1560 	if (cgu) {  in ice_dpll_init_direct_pins()
1661  * @cgu: if cgu is controlled by this pf
1663  * If cgu is owned unregister directly connected pins from the dplls.
1666 static void ice_dpll_deinit_pins(struct ice_pf *pf, bool cgu)  in ice_dpll_deinit_pins()  argument
1677 	if (cgu) {  in ice_dpll_deinit_pins()
1684 	if (cgu) {  in ice_dpll_deinit_pins()
1696  * @cgu: if cgu is present and controlled by this NIC
1705 static int ice_dpll_init_pins(struct ice_pf *pf, bool cgu)  in ice_dpll_init_pins()  argument
1710 	ret = ice_dpll_init_direct_pins(pf, cgu, pf->dplls.inputs, 0,  in ice_dpll_init_pins()
1716 	if (cgu) {  in ice_dpll_init_pins()
1717 		ret = ice_dpll_init_direct_pins(pf, cgu, pf->dplls.outputs,  in ice_dpll_init_pins()
1734 	ice_dpll_deinit_direct_pins(cgu, pf->dplls.outputs,  in ice_dpll_init_pins()
1739 	ice_dpll_deinit_direct_pins(cgu, pf->dplls.inputs, pf->dplls.num_inputs,  in ice_dpll_init_pins()
1749  * @cgu: if cgu is present and controlled by this NIC
1751  * If cgu is owned unregister the dpll from dpll subsystem.
1755 ice_dpll_deinit_dpll(struct ice_pf *pf, struct ice_dpll *d, bool cgu)  in ice_dpll_deinit_dpll()  argument
1757 	if (cgu)  in ice_dpll_deinit_dpll()
1766  * @cgu: if cgu is present and controlled by this NIC
1769  * Allocate dpll instance for this board in dpll subsystem, if cgu is controlled
1777 ice_dpll_init_dpll(struct ice_pf *pf, struct ice_dpll *d, bool cgu,  in ice_dpll_init_dpll()  argument
1791 	if (cgu) {  in ice_dpll_init_dpll()
1990  * @cgu: if cgu is present and controlled by this NIC
1998 static int ice_dpll_init_info(struct ice_pf *pf, bool cgu)  in ice_dpll_init_info()  argument
2011 			"err:%d %s failed to read cgu abilities\n",  in ice_dpll_init_info()
2041 	if (cgu) {  in ice_dpll_init_info()
2094 	bool cgu = ice_is_feature_supported(pf, ICE_F_CGU);  in ice_dpll_deinit()  local
2097 	if (cgu)  in ice_dpll_deinit()
2100 	ice_dpll_deinit_pins(pf, cgu);  in ice_dpll_deinit()
2101 	ice_dpll_deinit_dpll(pf, &pf->dplls.pps, cgu);  in ice_dpll_deinit()
2102 	ice_dpll_deinit_dpll(pf, &pf->dplls.eec, cgu);  in ice_dpll_deinit()
2119 	bool cgu = ice_is_feature_supported(pf, ICE_F_CGU);  in ice_dpll_init()  local
2124 	err = ice_dpll_init_info(pf, cgu);  in ice_dpll_init()
2127 	err = ice_dpll_init_dpll(pf, &pf->dplls.eec, cgu, DPLL_TYPE_EEC);  in ice_dpll_init()
2130 	err = ice_dpll_init_dpll(pf, &pf->dplls.pps, cgu, DPLL_TYPE_PPS);  in ice_dpll_init()
2133 	err = ice_dpll_init_pins(pf, cgu);  in ice_dpll_init()
2136 	if (cgu) {  in ice_dpll_init()
2146 	ice_dpll_deinit_pins(pf, cgu);  in ice_dpll_init()
2148 	ice_dpll_deinit_dpll(pf, &pf->dplls.pps, cgu);  in ice_dpll_init()
2150 	ice_dpll_deinit_dpll(pf, &pf->dplls.eec, cgu);  in ice_dpll_init()