Lines Matching +full:rtl +full:- +full:intc
1 // SPDX-License-Identifier: GPL-2.0
9 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
47 /* Switch per-port learning disablement register */
160 * VID such as untagged or priority-tagged frames for respective
163 * a C-tag with VID != 0 for respective port.
350 * struct rtl8366rb - RTL8366RB-specific data
351 * @max_mtu: per-port max MTU setting
406 mib->offset; in rtl8366rb_get_mib_counter()
411 ret = regmap_write(priv->map, addr, 0); /* Write whatever */ in rtl8366rb_get_mib_counter()
416 ret = regmap_read(priv->map, RTL8366RB_MIB_CTRL_REG, &val); in rtl8366rb_get_mib_counter()
418 return -EIO; in rtl8366rb_get_mib_counter()
421 return -EBUSY; in rtl8366rb_get_mib_counter()
424 return -EIO; in rtl8366rb_get_mib_counter()
428 for (i = mib->length; i > 0; i--) { in rtl8366rb_get_mib_counter()
429 ret = regmap_read(priv->map, addr + (i - 1), &val); in rtl8366rb_get_mib_counter()
457 ret = regmap_update_bits(priv->map, RTL8366RB_INTERRUPT_MASK_REG, in rtl8366rb_mask_irq()
460 dev_err(priv->dev, "could not mask IRQ\n"); in rtl8366rb_mask_irq()
468 ret = regmap_update_bits(priv->map, RTL8366RB_INTERRUPT_MASK_REG, in rtl8366rb_unmask_irq()
472 dev_err(priv->dev, "could not unmask IRQ\n"); in rtl8366rb_unmask_irq()
482 ret = regmap_read(priv->map, RTL8366RB_INTERRUPT_STATUS_REG, in rtl8366rb_irq()
485 dev_err(priv->dev, "can't read interrupt status\n"); in rtl8366rb_irq()
500 line -= 5; in rtl8366rb_irq()
501 child_irq = irq_find_mapping(priv->irqdomain, line); in rtl8366rb_irq()
516 irq_set_chip_data(irq, domain->host_data); in rtl8366rb_irq_map()
539 struct device_node *intc; in rtl8366rb_setup_cascaded_irq() local
546 intc = of_get_child_by_name(priv->dev->of_node, "interrupt-controller"); in rtl8366rb_setup_cascaded_irq()
547 if (!intc) { in rtl8366rb_setup_cascaded_irq()
548 dev_err(priv->dev, "missing child interrupt-controller node\n"); in rtl8366rb_setup_cascaded_irq()
549 return -EINVAL; in rtl8366rb_setup_cascaded_irq()
552 irq = of_irq_get(intc, 0); in rtl8366rb_setup_cascaded_irq()
554 dev_err(priv->dev, "failed to get parent IRQ\n"); in rtl8366rb_setup_cascaded_irq()
555 ret = irq ? irq : -EINVAL; in rtl8366rb_setup_cascaded_irq()
560 ret = regmap_read(priv->map, RTL8366RB_INTERRUPT_STATUS_REG, in rtl8366rb_setup_cascaded_irq()
563 dev_err(priv->dev, "can't read interrupt status\n"); in rtl8366rb_setup_cascaded_irq()
572 dev_info(priv->dev, "active high/rising IRQ\n"); in rtl8366rb_setup_cascaded_irq()
577 dev_info(priv->dev, "active low/falling IRQ\n"); in rtl8366rb_setup_cascaded_irq()
581 ret = regmap_update_bits(priv->map, RTL8366RB_INTERRUPT_CONTROL_REG, in rtl8366rb_setup_cascaded_irq()
585 dev_err(priv->dev, "could not configure IRQ polarity\n"); in rtl8366rb_setup_cascaded_irq()
589 ret = devm_request_threaded_irq(priv->dev, irq, NULL, in rtl8366rb_setup_cascaded_irq()
593 dev_err(priv->dev, "unable to request irq: %d\n", ret); in rtl8366rb_setup_cascaded_irq()
596 priv->irqdomain = irq_domain_add_linear(intc, in rtl8366rb_setup_cascaded_irq()
600 if (!priv->irqdomain) { in rtl8366rb_setup_cascaded_irq()
601 dev_err(priv->dev, "failed to create IRQ domain\n"); in rtl8366rb_setup_cascaded_irq()
602 ret = -EINVAL; in rtl8366rb_setup_cascaded_irq()
605 for (i = 0; i < priv->num_ports; i++) in rtl8366rb_setup_cascaded_irq()
606 irq_set_parent(irq_create_mapping(priv->irqdomain, i), irq); in rtl8366rb_setup_cascaded_irq()
609 of_node_put(intc); in rtl8366rb_setup_cascaded_irq()
621 dev_info(priv->dev, "set MAC: %02X:%02X:%02X:%02X:%02X:%02X\n", in rtl8366rb_set_addr()
624 ret = regmap_write(priv->map, RTL8366RB_SMAR0, val); in rtl8366rb_set_addr()
628 ret = regmap_write(priv->map, RTL8366RB_SMAR1, val); in rtl8366rb_set_addr()
632 ret = regmap_write(priv->map, RTL8366RB_SMAR2, val); in rtl8366rb_set_addr()
680 /* This v1 init sequence is from Belkin F5D8235 U-Boot release */
695 /* This v2 init sequence is from Belkin F5D8235 U-Boot release */
731 /* Belkin F5D8235 v1, "belkin,f5d8235-v1" */
773 ret = regmap_read(priv->map, in rtl8366rb_jam_table()
779 ret = regmap_write(priv->map, in rtl8366rb_jam_table()
787 dev_dbg(priv->dev, "jam %04x into register %04x\n", in rtl8366rb_jam_table()
790 ret = regmap_write(priv->map, in rtl8366rb_jam_table()
801 struct realtek_priv *priv = ds->priv; in rtl8366rb_setup()
811 rb = priv->chip_data; in rtl8366rb_setup()
813 ret = regmap_read(priv->map, RTL8366RB_CHIP_ID_REG, &chip_id); in rtl8366rb_setup()
815 dev_err(priv->dev, "unable to read chip id\n"); in rtl8366rb_setup()
823 dev_err(priv->dev, "unknown chip id (%04x)\n", chip_id); in rtl8366rb_setup()
824 return -ENODEV; in rtl8366rb_setup()
827 ret = regmap_read(priv->map, RTL8366RB_CHIP_VERSION_CTRL_REG, in rtl8366rb_setup()
830 dev_err(priv->dev, "unable to read chip version\n"); in rtl8366rb_setup()
834 dev_info(priv->dev, "RTL%04x ver %u chip found\n", in rtl8366rb_setup()
859 * without them, using just the off-the-shelf tables. in rtl8366rb_setup()
861 if (of_machine_is_compatible("belkin,f5d8235-v1")) { in rtl8366rb_setup()
877 ret = regmap_write(priv->map, RTL8366RB_PORT_ISO(i), in rtl8366rb_setup()
884 ret = regmap_write(priv->map, RTL8366RB_PORT_ISO(RTL8366RB_PORT_NUM_CPU), in rtl8366rb_setup()
896 ret = regmap_write(priv->map, in rtl8366rb_setup()
903 ret = regmap_write(priv->map, 0x0c, 0x240); in rtl8366rb_setup()
906 ret = regmap_write(priv->map, 0x0d, 0x240); in rtl8366rb_setup()
920 ret = regmap_update_bits(priv->map, RTL8366RB_CPU_CTRL_REG, in rtl8366rb_setup()
922 BIT(priv->cpu_port)); in rtl8366rb_setup()
926 /* Make sure we default-enable the fixed CPU port */ in rtl8366rb_setup()
927 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, in rtl8366rb_setup()
928 BIT(priv->cpu_port), in rtl8366rb_setup()
934 ret = regmap_update_bits(priv->map, RTL8366RB_SGCR, in rtl8366rb_setup()
940 if (i == priv->cpu_port) in rtl8366rb_setup()
942 rb->max_mtu[i] = ETH_DATA_LEN + RTL8366RB_CPU_TAG_SIZE; in rtl8366rb_setup()
944 rb->max_mtu[i] = ETH_DATA_LEN; in rtl8366rb_setup()
948 ret = regmap_write(priv->map, RTL8366RB_PORT_LEARNDIS_CTRL, in rtl8366rb_setup()
954 ret = regmap_write(priv->map, RTL8366RB_SECURITY_CTRL, 0); in rtl8366rb_setup()
965 ret = regmap_update_bits(priv->map, RTL8366RB_PMC0, in rtl8366rb_setup()
971 /* Accept all packets by default, we enable filtering on-demand */ in rtl8366rb_setup()
972 ret = regmap_write(priv->map, RTL8366RB_VLAN_INGRESS_CTRL1_REG, in rtl8366rb_setup()
976 ret = regmap_write(priv->map, RTL8366RB_VLAN_INGRESS_CTRL2_REG, in rtl8366rb_setup()
982 ret = regmap_update_bits(priv->map, RTL8366RB_SSCR2, in rtl8366rb_setup()
988 ret = regmap_update_bits(priv->map, RTL8366RB_LED_BLINKRATE_REG, in rtl8366rb_setup()
999 if (priv->leds_disabled) { in rtl8366rb_setup()
1001 regmap_update_bits(priv->map, in rtl8366rb_setup()
1004 regmap_update_bits(priv->map, in rtl8366rb_setup()
1007 regmap_update_bits(priv->map, in rtl8366rb_setup()
1017 ret = regmap_update_bits(priv->map, in rtl8366rb_setup()
1031 dev_info(priv->dev, "no interrupt support\n"); in rtl8366rb_setup()
1033 if (priv->setup_interface) { in rtl8366rb_setup()
1034 ret = priv->setup_interface(ds); in rtl8366rb_setup()
1036 dev_err(priv->dev, "could not set up MDIO bus\n"); in rtl8366rb_setup()
1037 return -ENODEV; in rtl8366rb_setup()
1055 unsigned long *interfaces = config->supported_interfaces; in rtl8366rb_phylink_get_caps()
1056 struct realtek_priv *priv = ds->priv; in rtl8366rb_phylink_get_caps()
1058 if (port == priv->cpu_port) { in rtl8366rb_phylink_get_caps()
1066 config->mac_capabilities = MAC_1000 | MAC_100 | in rtl8366rb_phylink_get_caps()
1073 config->mac_capabilities = MAC_1000 | MAC_100 | MAC_10 | in rtl8366rb_phylink_get_caps()
1083 struct realtek_priv *priv = ds->priv; in rtl8366rb_mac_link_up()
1088 * We assume autonegotiation works on the PHY-facing ports. in rtl8366rb_mac_link_up()
1090 if (port != priv->cpu_port) in rtl8366rb_mac_link_up()
1093 dev_dbg(priv->dev, "MAC link up on CPU port (%d)\n", port); in rtl8366rb_mac_link_up()
1095 ret = regmap_update_bits(priv->map, RTL8366RB_MAC_FORCE_CTRL_REG, in rtl8366rb_mac_link_up()
1098 dev_err(priv->dev, "failed to force CPU port\n"); in rtl8366rb_mac_link_up()
1129 ret = regmap_update_bits(priv->map, RTL8366RB_PAACR2, in rtl8366rb_mac_link_up()
1133 dev_err(priv->dev, "failed to set PAACR on CPU port\n"); in rtl8366rb_mac_link_up()
1137 dev_dbg(priv->dev, "set PAACR to %04x\n", val); in rtl8366rb_mac_link_up()
1140 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port), in rtl8366rb_mac_link_up()
1143 dev_err(priv->dev, "failed to enable the CPU port\n"); in rtl8366rb_mac_link_up()
1152 struct realtek_priv *priv = ds->priv; in rtl8366rb_mac_link_down()
1155 if (port != priv->cpu_port) in rtl8366rb_mac_link_down()
1158 dev_dbg(priv->dev, "MAC link down on CPU port (%d)\n", port); in rtl8366rb_mac_link_down()
1161 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port), in rtl8366rb_mac_link_down()
1164 dev_err(priv->dev, "failed to disable the CPU port\n"); in rtl8366rb_mac_link_down()
1175 if (priv->leds_disabled) in rb8366rb_set_port_led()
1180 ret = regmap_update_bits(priv->map, in rb8366rb_set_port_led()
1185 ret = regmap_update_bits(priv->map, in rb8366rb_set_port_led()
1191 ret = regmap_update_bits(priv->map, in rb8366rb_set_port_led()
1196 ret = regmap_update_bits(priv->map, in rb8366rb_set_port_led()
1202 ret = regmap_update_bits(priv->map, in rb8366rb_set_port_led()
1208 dev_err(priv->dev, "no LED for port %d\n", port); in rb8366rb_set_port_led()
1212 dev_err(priv->dev, "error updating LED on port %d\n", port); in rb8366rb_set_port_led()
1219 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_enable()
1222 dev_dbg(priv->dev, "enable port %d\n", port); in rtl8366rb_port_enable()
1223 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port), in rtl8366rb_port_enable()
1235 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_disable()
1238 dev_dbg(priv->dev, "disable port %d\n", port); in rtl8366rb_port_disable()
1239 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port), in rtl8366rb_port_disable()
1253 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_bridge_join()
1266 ret = regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(i), in rtl8366rb_port_bridge_join()
1270 dev_err(priv->dev, "failed to join port %d\n", port); in rtl8366rb_port_bridge_join()
1276 return regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(port), in rtl8366rb_port_bridge_join()
1285 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_bridge_leave()
1298 ret = regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(i), in rtl8366rb_port_bridge_leave()
1301 dev_err(priv->dev, "failed to leave port %d\n", port); in rtl8366rb_port_bridge_leave()
1307 regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(port), in rtl8366rb_port_bridge_leave()
1312 * rtl8366rb_drop_untagged() - make the switch drop untagged and C-tagged frames
1314 * @port: the port to drop untagged and C-tagged frames on
1315 * @drop: whether to drop or pass untagged and C-tagged frames
1321 return regmap_update_bits(priv->map, RTL8366RB_VLAN_INGRESS_CTRL1_REG, in rtl8366rb_drop_untagged()
1330 struct realtek_priv *priv = ds->priv; in rtl8366rb_vlan_filtering()
1334 rb = priv->chip_data; in rtl8366rb_vlan_filtering()
1336 dev_dbg(priv->dev, "port %d: %s VLAN filtering\n", port, in rtl8366rb_vlan_filtering()
1340 ret = regmap_update_bits(priv->map, RTL8366RB_VLAN_INGRESS_CTRL2_REG, in rtl8366rb_vlan_filtering()
1346 * not drop any untagged or C-tagged frames. If we turn off VLAN in rtl8366rb_vlan_filtering()
1350 ret = rtl8366rb_drop_untagged(priv, port, !rb->pvid_enabled[port]); in rtl8366rb_vlan_filtering()
1364 return -EINVAL; in rtl8366rb_port_pre_bridge_flags()
1374 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_bridge_flags()
1378 ret = regmap_update_bits(priv->map, RTL8366RB_PORT_LEARNDIS_CTRL, in rtl8366rb_port_bridge_flags()
1391 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_stp_state_set()
1410 dev_err(priv->dev, "unknown bridge state requested\n"); in rtl8366rb_port_stp_state_set()
1416 regmap_update_bits(priv->map, RTL8366RB_STP_STATE_BASE + i, in rtl8366rb_port_stp_state_set()
1425 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_fast_age()
1428 regmap_update_bits(priv->map, RTL8366RB_SECURITY_CTRL, in rtl8366rb_port_fast_age()
1431 regmap_update_bits(priv->map, RTL8366RB_SECURITY_CTRL, in rtl8366rb_port_fast_age()
1437 struct realtek_priv *priv = ds->priv; in rtl8366rb_change_mtu()
1443 /* Cache the per-port MTU setting */ in rtl8366rb_change_mtu()
1444 rb = priv->chip_data; in rtl8366rb_change_mtu()
1445 rb->max_mtu[port] = new_mtu; in rtl8366rb_change_mtu()
1453 if (rb->max_mtu[i] > max_mtu) in rtl8366rb_change_mtu()
1454 max_mtu = rb->max_mtu[i]; in rtl8366rb_change_mtu()
1477 return regmap_update_bits(priv->map, RTL8366RB_SGCR, in rtl8366rb_change_mtu()
1486 * 16000 - 18 - 4 = 15978. This does not include the CPU tag in rtl8366rb_max_mtu()
1489 return 16000 - VLAN_ETH_HLEN - ETH_FCS_LEN; in rtl8366rb_max_mtu()
1502 return -EINVAL; in rtl8366rb_get_vlan_4k()
1505 ret = regmap_write(priv->map, RTL8366RB_VLAN_TABLE_WRITE_BASE, in rtl8366rb_get_vlan_4k()
1511 ret = regmap_write(priv->map, RTL8366RB_TABLE_ACCESS_CTRL_REG, in rtl8366rb_get_vlan_4k()
1517 ret = regmap_read(priv->map, in rtl8366rb_get_vlan_4k()
1524 vlan4k->vid = vid; in rtl8366rb_get_vlan_4k()
1525 vlan4k->untag = (data[1] >> RTL8366RB_VLAN_UNTAG_SHIFT) & in rtl8366rb_get_vlan_4k()
1527 vlan4k->member = data[1] & RTL8366RB_VLAN_MEMBER_MASK; in rtl8366rb_get_vlan_4k()
1528 vlan4k->fid = data[2] & RTL8366RB_VLAN_FID_MASK; in rtl8366rb_get_vlan_4k()
1540 if (vlan4k->vid >= RTL8366RB_NUM_VIDS || in rtl8366rb_set_vlan_4k()
1541 vlan4k->member > RTL8366RB_VLAN_MEMBER_MASK || in rtl8366rb_set_vlan_4k()
1542 vlan4k->untag > RTL8366RB_VLAN_UNTAG_MASK || in rtl8366rb_set_vlan_4k()
1543 vlan4k->fid > RTL8366RB_FIDMAX) in rtl8366rb_set_vlan_4k()
1544 return -EINVAL; in rtl8366rb_set_vlan_4k()
1546 data[0] = vlan4k->vid & RTL8366RB_VLAN_VID_MASK; in rtl8366rb_set_vlan_4k()
1547 data[1] = (vlan4k->member & RTL8366RB_VLAN_MEMBER_MASK) | in rtl8366rb_set_vlan_4k()
1548 ((vlan4k->untag & RTL8366RB_VLAN_UNTAG_MASK) << in rtl8366rb_set_vlan_4k()
1550 data[2] = vlan4k->fid & RTL8366RB_VLAN_FID_MASK; in rtl8366rb_set_vlan_4k()
1553 ret = regmap_write(priv->map, in rtl8366rb_set_vlan_4k()
1561 ret = regmap_write(priv->map, RTL8366RB_TABLE_ACCESS_CTRL_REG, in rtl8366rb_set_vlan_4k()
1577 return -EINVAL; in rtl8366rb_get_vlan_mc()
1580 ret = regmap_read(priv->map, in rtl8366rb_get_vlan_mc()
1587 vlanmc->vid = data[0] & RTL8366RB_VLAN_VID_MASK; in rtl8366rb_get_vlan_mc()
1588 vlanmc->priority = (data[0] >> RTL8366RB_VLAN_PRIORITY_SHIFT) & in rtl8366rb_get_vlan_mc()
1590 vlanmc->untag = (data[1] >> RTL8366RB_VLAN_UNTAG_SHIFT) & in rtl8366rb_get_vlan_mc()
1592 vlanmc->member = data[1] & RTL8366RB_VLAN_MEMBER_MASK; in rtl8366rb_get_vlan_mc()
1593 vlanmc->fid = data[2] & RTL8366RB_VLAN_FID_MASK; in rtl8366rb_get_vlan_mc()
1606 vlanmc->vid >= RTL8366RB_NUM_VIDS || in rtl8366rb_set_vlan_mc()
1607 vlanmc->priority > RTL8366RB_PRIORITYMAX || in rtl8366rb_set_vlan_mc()
1608 vlanmc->member > RTL8366RB_VLAN_MEMBER_MASK || in rtl8366rb_set_vlan_mc()
1609 vlanmc->untag > RTL8366RB_VLAN_UNTAG_MASK || in rtl8366rb_set_vlan_mc()
1610 vlanmc->fid > RTL8366RB_FIDMAX) in rtl8366rb_set_vlan_mc()
1611 return -EINVAL; in rtl8366rb_set_vlan_mc()
1613 data[0] = (vlanmc->vid & RTL8366RB_VLAN_VID_MASK) | in rtl8366rb_set_vlan_mc()
1614 ((vlanmc->priority & RTL8366RB_VLAN_PRIORITY_MASK) << in rtl8366rb_set_vlan_mc()
1616 data[1] = (vlanmc->member & RTL8366RB_VLAN_MEMBER_MASK) | in rtl8366rb_set_vlan_mc()
1617 ((vlanmc->untag & RTL8366RB_VLAN_UNTAG_MASK) << in rtl8366rb_set_vlan_mc()
1619 data[2] = vlanmc->fid & RTL8366RB_VLAN_FID_MASK; in rtl8366rb_set_vlan_mc()
1622 ret = regmap_write(priv->map, in rtl8366rb_set_vlan_mc()
1637 if (port >= priv->num_ports) in rtl8366rb_get_mc_index()
1638 return -EINVAL; in rtl8366rb_get_mc_index()
1640 ret = regmap_read(priv->map, RTL8366RB_PORT_VLAN_CTRL_REG(port), in rtl8366rb_get_mc_index()
1657 rb = priv->chip_data; in rtl8366rb_set_mc_index()
1660 if (port >= priv->num_ports || index >= RTL8366RB_NUM_VLANS) in rtl8366rb_set_mc_index()
1661 return -EINVAL; in rtl8366rb_set_mc_index()
1663 ret = regmap_update_bits(priv->map, RTL8366RB_PORT_VLAN_CTRL_REG(port), in rtl8366rb_set_mc_index()
1671 rb->pvid_enabled[port] = pvid_enabled; in rtl8366rb_set_mc_index()
1674 * not drop any untagged or C-tagged frames. Make sure to update the in rtl8366rb_set_mc_index()
1677 if (dsa_port_is_vlan_filtering(dsa_to_port(priv->ds, port))) in rtl8366rb_set_mc_index()
1685 unsigned int max = RTL8366RB_NUM_VLANS - 1; in rtl8366rb_is_vlan_valid()
1687 if (priv->vlan4k_enabled) in rtl8366rb_is_vlan_valid()
1688 max = RTL8366RB_NUM_VIDS - 1; in rtl8366rb_is_vlan_valid()
1698 dev_dbg(priv->dev, "%s VLAN\n", enable ? "enable" : "disable"); in rtl8366rb_enable_vlan()
1699 return regmap_update_bits(priv->map, in rtl8366rb_enable_vlan()
1706 dev_dbg(priv->dev, "%s VLAN 4k\n", enable ? "enable" : "disable"); in rtl8366rb_enable_vlan4k()
1707 return regmap_update_bits(priv->map, RTL8366RB_SGCR, in rtl8366rb_enable_vlan4k()
1719 return -EINVAL; in rtl8366rb_phy_read()
1721 mutex_lock(&priv->map_lock); in rtl8366rb_phy_read()
1723 ret = regmap_write(priv->map_nolock, RTL8366RB_PHY_ACCESS_CTRL_REG, in rtl8366rb_phy_read()
1730 ret = regmap_write(priv->map_nolock, reg, 0); in rtl8366rb_phy_read()
1732 dev_err(priv->dev, in rtl8366rb_phy_read()
1738 ret = regmap_read(priv->map_nolock, RTL8366RB_PHY_ACCESS_DATA_REG, in rtl8366rb_phy_read()
1745 dev_dbg(priv->dev, "read PHY%d register 0x%04x @ %08x, val <- %04x\n", in rtl8366rb_phy_read()
1749 mutex_unlock(&priv->map_lock); in rtl8366rb_phy_read()
1761 return -EINVAL; in rtl8366rb_phy_write()
1763 mutex_lock(&priv->map_lock); in rtl8366rb_phy_write()
1765 ret = regmap_write(priv->map_nolock, RTL8366RB_PHY_ACCESS_CTRL_REG, in rtl8366rb_phy_write()
1772 dev_dbg(priv->dev, "write PHY%d register 0x%04x @ %04x, val -> %04x\n", in rtl8366rb_phy_write()
1775 ret = regmap_write(priv->map_nolock, reg, val); in rtl8366rb_phy_write()
1780 mutex_unlock(&priv->map_lock); in rtl8366rb_phy_write()
1787 return rtl8366rb_phy_read(ds->priv, phy, regnum); in rtl8366rb_dsa_phy_read()
1793 return rtl8366rb_phy_write(ds->priv, phy, regnum, val); in rtl8366rb_dsa_phy_write()
1802 priv->write_reg_noack(priv, RTL8366RB_RESET_CTRL_REG, in rtl8366rb_reset_chip()
1806 ret = regmap_read(priv->map, RTL8366RB_RESET_CTRL_REG, &val); in rtl8366rb_reset_chip()
1812 } while (--timeout); in rtl8366rb_reset_chip()
1815 dev_err(priv->dev, "timeout waiting for the switch to reset\n"); in rtl8366rb_reset_chip()
1816 return -EIO; in rtl8366rb_reset_chip()
1824 struct device *dev = priv->dev; in rtl8366rb_detect()
1829 ret = regmap_read(priv->map, 0x5c, &val); in rtl8366rb_detect()
1839 return -ENODEV; in rtl8366rb_detect()
1842 priv->cpu_port = RTL8366RB_PORT_NUM_CPU; in rtl8366rb_detect()
1843 priv->num_ports = RTL8366RB_NUM_PORTS; in rtl8366rb_detect()
1844 priv->num_vlan_mc = RTL8366RB_NUM_VLANS; in rtl8366rb_detect()
1845 priv->mib_counters = rtl8366rb_mib_counters; in rtl8366rb_detect()
1846 priv->num_mib_counters = ARRAY_SIZE(rtl8366rb_mib_counters); in rtl8366rb_detect()