Lines Matching full:extra
450 u32 extra, reg; in dwcmshc_rk3568_set_clock() local
473 extra = sdhci_readl(host, reg); in dwcmshc_rk3568_set_clock()
474 extra &= ~BIT(0); in dwcmshc_rk3568_set_clock()
475 sdhci_writel(host, extra, reg); in dwcmshc_rk3568_set_clock()
491 extra = DWCMSHC_EMMC_DLL_DLYENA | in dwcmshc_rk3568_set_clock()
494 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN); in dwcmshc_rk3568_set_clock()
507 extra = DWCMSHC_EMMC_DLL_DLYENA; in dwcmshc_rk3568_set_clock()
509 extra |= DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL; in dwcmshc_rk3568_set_clock()
510 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK); in dwcmshc_rk3568_set_clock()
513 extra = 0x5 << DWCMSHC_EMMC_DLL_START_POINT | in dwcmshc_rk3568_set_clock()
516 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_CTRL); in dwcmshc_rk3568_set_clock()
518 extra, DLL_LOCK_WO_TMOUT(extra), 1, in dwcmshc_rk3568_set_clock()
525 extra = 0x1 << 16 | /* tune clock stop en */ in dwcmshc_rk3568_set_clock()
528 sdhci_writel(host, extra, dwc_priv->vendor_specific_area1 + DWCMSHC_EMMC_ATCTRL); in dwcmshc_rk3568_set_clock()
537 extra = DLL_CMDOUT_SRC_CLK_NEG | in dwcmshc_rk3568_set_clock()
542 sdhci_writel(host, extra, DECMSHC_EMMC_DLL_CMDOUT); in dwcmshc_rk3568_set_clock()
545 extra = DWCMSHC_EMMC_DLL_DLYENA | in dwcmshc_rk3568_set_clock()
549 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK); in dwcmshc_rk3568_set_clock()
551 extra = DWCMSHC_EMMC_DLL_DLYENA | in dwcmshc_rk3568_set_clock()
554 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN); in dwcmshc_rk3568_set_clock()
799 u32 extra; in dwcmshc_probe() local
813 * extra adma table cnt for cross 128M boundary handling. in dwcmshc_probe()
815 extra = DIV_ROUND_UP_ULL(dma_get_required_mask(dev), SZ_128M); in dwcmshc_probe()
816 if (extra > SDHCI_MAX_SEGS) in dwcmshc_probe()
817 extra = SDHCI_MAX_SEGS; in dwcmshc_probe()
818 host->adma_table_cnt += extra; in dwcmshc_probe()