Lines Matching +full:0487 +full:a
98 * @name: the name of a register
100 * regs_query_register_offset() returns the offset of a register in struct
168 * Handle hitting a HW-breakpoint.
626 * Ensure target->thread.uw.fpsimd_state is up to date, so that a in __fpr_set()
924 * If setting a different VL from the requested VL and there is in sve_set_common()
943 * FPSIMD regs, so that a short copyin leaves trailing in sve_set_common()
945 * configuring normal SVE, a system with streaming SVE may not in sve_set_common()
1126 * If setting a different VL from the requested VL and there is in za_set()
1525 * ZA is a single register but it's variably sized and
1917 * Convert a virtual register number into an index for a thread_info
1920 * of (address, control), each pair mapping to a unique hw_breakpoint struct.
2158 * signalled from syscall entry or syscall exit by clobbering a general in report_syscall()
2186 * Signal a pseudo-step exception since we are stepping but in report_syscall()
2233 * SPSR_ELx bits which are always architecturally RES0 per ARM DDI 0487D.a.
2235 * not described in ARM DDI 0487D.a.
2267 * Force PSR to a valid 32-bit EL0t, preserving the same bits as in valid_compat_regs()
2292 /* Force PSR to a valid 64-bit EL0t */ in valid_native_regs()