Lines Matching +full:ignore +full:- +full:power +full:- +full:on +full:- +full:sel
1 // SPDX-License-Identifier: GPL-2.0
22 #include <linux/dma-mapping.h>
25 #include "xhci-trace.h"
26 #include "xhci-debugfs.h"
27 #include "xhci-dbgcap.h"
34 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
37 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
47 if (!td || !td->start_seg) in td_on_ring()
50 xhci_for_each_ring_seg(ring->first_seg, seg) { in td_on_ring()
51 if (seg == td->start_seg) in td_on_ring()
59 * xhci_handshake - spin reading hc until handshake completes or fails
65 * Returns negative errno, or zero on success
69 * hardware flakeout), or the register reads as all-ones (hardware removed).
81 return -ENODEV; in xhci_handshake()
87 * xhci_handshake_check_state - same as xhci_handshake but takes an additional
100 xhci->xhc_state & exit_state, in xhci_handshake_check_state()
103 if (result == U32_MAX || xhci->xhc_state & exit_state) in xhci_handshake_check_state()
104 return -ENODEV; in xhci_handshake_check_state()
119 halted = readl(&xhci->op_regs->status) & STS_HALT; in xhci_quiesce()
123 cmd = readl(&xhci->op_regs->command); in xhci_quiesce()
125 writel(cmd, &xhci->op_regs->command); in xhci_quiesce()
143 ret = xhci_handshake(&xhci->op_regs->status, in xhci_halt()
150 xhci->xhc_state |= XHCI_STATE_HALTED; in xhci_halt()
151 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED; in xhci_halt()
164 temp = readl(&xhci->op_regs->command); in xhci_start()
166 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.", in xhci_start()
168 writel(temp, &xhci->op_regs->command); in xhci_start()
174 ret = xhci_handshake(&xhci->op_regs->status, in xhci_start()
176 if (ret == -ETIMEDOUT) in xhci_start()
182 xhci->xhc_state = 0; in xhci_start()
183 xhci->run_graceperiod = jiffies + msecs_to_jiffies(500); in xhci_start()
202 state = readl(&xhci->op_regs->status); in xhci_reset()
206 return -ENODEV; in xhci_reset()
215 command = readl(&xhci->op_regs->command); in xhci_reset()
217 writel(command, &xhci->op_regs->command); in xhci_reset()
226 if (xhci->quirks & XHCI_INTEL_HOST) in xhci_reset()
229 ret = xhci_handshake_check_state(xhci, &xhci->op_regs->command, in xhci_reset()
234 if (xhci->quirks & XHCI_ASMEDIA_MODIFY_FLOWCONTROL) in xhci_reset()
235 usb_asmedia_modifyflowcontrol(to_pci_dev(xhci_to_hcd(xhci)->self.controller)); in xhci_reset()
243 ret = xhci_handshake(&xhci->op_regs->status, STS_CNR, 0, timeout_us); in xhci_reset()
245 xhci->usb2_rhub.bus_state.port_c_suspend = 0; in xhci_reset()
246 xhci->usb2_rhub.bus_state.suspended_ports = 0; in xhci_reset()
247 xhci->usb2_rhub.bus_state.resuming_ports = 0; in xhci_reset()
248 xhci->usb3_rhub.bus_state.port_c_suspend = 0; in xhci_reset()
249 xhci->usb3_rhub.bus_state.suspended_ports = 0; in xhci_reset()
250 xhci->usb3_rhub.bus_state.resuming_ports = 0; in xhci_reset()
257 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_zero_64b_regs()
278 if (!(xhci->quirks & XHCI_ZERO_64B_REGS) || !domain || in xhci_zero_64b_regs()
279 domain->type == IOMMU_DOMAIN_IDENTITY) in xhci_zero_64b_regs()
285 val = readl(&xhci->op_regs->command); in xhci_zero_64b_regs()
287 writel(val, &xhci->op_regs->command); in xhci_zero_64b_regs()
290 val = readl(&xhci->op_regs->status); in xhci_zero_64b_regs()
292 writel(val, &xhci->op_regs->status); in xhci_zero_64b_regs()
295 val = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); in xhci_zero_64b_regs()
297 xhci_write_64(xhci, 0, &xhci->op_regs->dcbaa_ptr); in xhci_zero_64b_regs()
298 val = xhci_read_64(xhci, &xhci->op_regs->cmd_ring); in xhci_zero_64b_regs()
300 xhci_write_64(xhci, 0, &xhci->op_regs->cmd_ring); in xhci_zero_64b_regs()
302 intrs = min_t(u32, HCS_MAX_INTRS(xhci->hcs_params1), in xhci_zero_64b_regs()
303 ARRAY_SIZE(xhci->run_regs->ir_set)); in xhci_zero_64b_regs()
308 ir = &xhci->run_regs->ir_set[i]; in xhci_zero_64b_regs()
309 val = xhci_read_64(xhci, &ir->erst_base); in xhci_zero_64b_regs()
311 xhci_write_64(xhci, 0, &ir->erst_base); in xhci_zero_64b_regs()
312 val= xhci_read_64(xhci, &ir->erst_dequeue); in xhci_zero_64b_regs()
314 xhci_write_64(xhci, 0, &ir->erst_dequeue); in xhci_zero_64b_regs()
317 /* Wait for the fault to appear. It will be cleared on reset */ in xhci_zero_64b_regs()
318 err = xhci_handshake(&xhci->op_regs->status, in xhci_zero_64b_regs()
329 if (!ir || !ir->ir_set) in xhci_enable_interrupter()
330 return -EINVAL; in xhci_enable_interrupter()
332 iman = readl(&ir->ir_set->irq_pending); in xhci_enable_interrupter()
333 writel(ER_IRQ_ENABLE(iman), &ir->ir_set->irq_pending); in xhci_enable_interrupter()
342 if (!ir || !ir->ir_set) in xhci_disable_interrupter()
343 return -EINVAL; in xhci_disable_interrupter()
345 iman = readl(&ir->ir_set->irq_pending); in xhci_disable_interrupter()
346 writel(ER_IRQ_DISABLE(iman), &ir->ir_set->irq_pending); in xhci_disable_interrupter()
357 if (!ir || !ir->ir_set || imod_interval > U16_MAX * 250) in xhci_set_interrupter_moderation()
358 return -EINVAL; in xhci_set_interrupter_moderation()
360 imod = readl(&ir->ir_set->irq_control); in xhci_set_interrupter_moderation()
363 writel(imod, &ir->ir_set->irq_control); in xhci_set_interrupter_moderation()
377 rhub = &xhci->usb3_rhub; in compliance_mode_recovery()
378 hcd = rhub->hcd; in compliance_mode_recovery()
383 for (i = 0; i < rhub->num_ports; i++) { in compliance_mode_recovery()
384 temp = readl(rhub->ports[i]->addr); in compliance_mode_recovery()
391 "Compliance mode detected->port %d", in compliance_mode_recovery()
396 if (hcd->state == HC_STATE_SUSPENDED) in compliance_mode_recovery()
403 if (xhci->port_status_u0 != ((1 << rhub->num_ports) - 1)) in compliance_mode_recovery()
404 mod_timer(&xhci->comp_mode_recovery_timer, in compliance_mode_recovery()
409 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
416 * this quirk is needed on systems that have the failing hardware installed.
420 xhci->port_status_u0 = 0; in compliance_mode_recovery_timer_init()
421 timer_setup(&xhci->comp_mode_recovery_timer, compliance_mode_recovery, in compliance_mode_recovery_timer_init()
423 xhci->comp_mode_recovery_timer.expires = jiffies + in compliance_mode_recovery_timer_init()
426 add_timer(&xhci->comp_mode_recovery_timer); in compliance_mode_recovery_timer_init()
433 * USB3.0 re-driver and that need the Compliance Mode Quirk.
435 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
446 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard"))) in xhci_compliance_mode_recovery_timer_quirk_check()
460 return (xhci->port_status_u0 == ((1 << xhci->usb3_rhub.num_ports) - 1)); in xhci_all_ports_seen_u0()
465 * Initialize memory for HCD and xHC (one-time init).
477 spin_lock_init(&xhci->lock); in xhci_init()
484 xhci->quirks |= XHCI_COMP_MODE_QUIRK; in xhci_init()
491 /*-------------------------------------------------------------------------*/
495 struct xhci_interrupter *ir = xhci->interrupters[0]; in xhci_run_finished()
503 spin_lock_irqsave(&xhci->lock, flags); in xhci_run_finished()
506 temp = readl(&xhci->op_regs->command); in xhci_run_finished()
508 writel(temp, &xhci->op_regs->command); in xhci_run_finished()
515 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_run_finished()
516 return -ENODEV; in xhci_run_finished()
519 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING; in xhci_run_finished()
521 if (xhci->quirks & XHCI_NEC_HOST) in xhci_run_finished()
524 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_run_finished()
539 * Setup MSI-X vectors and enable interrupts.
546 struct xhci_interrupter *ir = xhci->interrupters[0]; in xhci_run()
551 hcd->uses_new_polling = 1; in xhci_run()
552 if (hcd->msi_enabled) in xhci_run()
553 ir->ip_autoclear = true; in xhci_run()
560 temp_64 = xhci_read_64(xhci, &ir->ir_set->erst_dequeue); in xhci_run()
565 xhci_set_interrupter_moderation(ir, xhci->imod_interval); in xhci_run()
567 if (xhci->quirks & XHCI_NEC_HOST) { in xhci_run()
572 return -ENOMEM; in xhci_run()
589 set_bit(HCD_FLAG_DEFER_RH_REGISTER, &hcd->flags); in xhci_run()
608 struct xhci_interrupter *ir = xhci->interrupters[0]; in xhci_stop()
610 mutex_lock(&xhci->mutex); in xhci_stop()
614 mutex_unlock(&xhci->mutex); in xhci_stop()
620 spin_lock_irq(&xhci->lock); in xhci_stop()
621 xhci->xhc_state |= XHCI_STATE_HALTED; in xhci_stop()
622 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED; in xhci_stop()
625 spin_unlock_irq(&xhci->lock); in xhci_stop()
628 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_stop()
630 timer_delete_sync(&xhci->comp_mode_recovery_timer); in xhci_stop()
636 if (xhci->quirks & XHCI_AMD_PLL_FIX) in xhci_stop()
641 temp = readl(&xhci->op_regs->status); in xhci_stop()
642 writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status); in xhci_stop()
649 "xhci_stop completed - status = %x", in xhci_stop()
650 readl(&xhci->op_regs->status)); in xhci_stop()
651 mutex_unlock(&xhci->mutex); in xhci_stop()
656 * Shutdown HC (not bus-specific)
668 if (xhci->quirks & XHCI_SPURIOUS_REBOOT) in xhci_shutdown()
669 usb_disable_xhci_ports(to_pci_dev(hcd->self.sysdev)); in xhci_shutdown()
673 __func__, hcd->self.busnum); in xhci_shutdown()
674 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_shutdown()
675 timer_delete_sync(&hcd->rh_timer); in xhci_shutdown()
677 if (xhci->shared_hcd) { in xhci_shutdown()
678 clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); in xhci_shutdown()
679 timer_delete_sync(&xhci->shared_hcd->rh_timer); in xhci_shutdown()
682 spin_lock_irq(&xhci->lock); in xhci_shutdown()
687 * firmware delay in ADL-P PCH if port are left in U3 at shutdown in xhci_shutdown()
689 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP || in xhci_shutdown()
690 xhci->quirks & XHCI_RESET_TO_DEFAULT) in xhci_shutdown()
693 spin_unlock_irq(&xhci->lock); in xhci_shutdown()
696 "xhci_shutdown completed - status = %x", in xhci_shutdown()
697 readl(&xhci->op_regs->status)); in xhci_shutdown()
707 xhci->s3.command = readl(&xhci->op_regs->command); in xhci_save_registers()
708 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification); in xhci_save_registers()
709 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); in xhci_save_registers()
710 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg); in xhci_save_registers()
714 for (i = 0; i < xhci->max_interrupters; i++) { in xhci_save_registers()
715 ir = xhci->interrupters[i]; in xhci_save_registers()
719 ir->s3_erst_size = readl(&ir->ir_set->erst_size); in xhci_save_registers()
720 ir->s3_erst_base = xhci_read_64(xhci, &ir->ir_set->erst_base); in xhci_save_registers()
721 ir->s3_erst_dequeue = xhci_read_64(xhci, &ir->ir_set->erst_dequeue); in xhci_save_registers()
722 ir->s3_irq_pending = readl(&ir->ir_set->irq_pending); in xhci_save_registers()
723 ir->s3_irq_control = readl(&ir->ir_set->irq_control); in xhci_save_registers()
732 writel(xhci->s3.command, &xhci->op_regs->command); in xhci_restore_registers()
733 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification); in xhci_restore_registers()
734 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr); in xhci_restore_registers()
735 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg); in xhci_restore_registers()
738 for (i = 0; i < xhci->max_interrupters; i++) { in xhci_restore_registers()
739 ir = xhci->interrupters[i]; in xhci_restore_registers()
743 writel(ir->s3_erst_size, &ir->ir_set->erst_size); in xhci_restore_registers()
744 xhci_write_64(xhci, ir->s3_erst_base, &ir->ir_set->erst_base); in xhci_restore_registers()
745 xhci_write_64(xhci, ir->s3_erst_dequeue, &ir->ir_set->erst_dequeue); in xhci_restore_registers()
746 writel(ir->s3_irq_pending, &ir->ir_set->irq_pending); in xhci_restore_registers()
747 writel(ir->s3_irq_control, &ir->ir_set->irq_control); in xhci_restore_registers()
756 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring); in xhci_set_cmd_ring_deq()
758 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg, in xhci_set_cmd_ring_deq()
759 xhci->cmd_ring->dequeue) & in xhci_set_cmd_ring_deq()
761 xhci->cmd_ring->cycle_state; in xhci_set_cmd_ring_deq()
765 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring); in xhci_set_cmd_ring_deq()
772 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
775 * middle of the ring (TRBs are 16-byte aligned).
782 ring = xhci->cmd_ring; in xhci_clear_command_ring()
783 xhci_for_each_ring_seg(ring->first_seg, seg) { in xhci_clear_command_ring()
785 memset(seg->trbs, 0, sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1)); in xhci_clear_command_ring()
787 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &= cpu_to_le32(~TRB_CYCLE); in xhci_clear_command_ring()
793 * Yes, this will need to be re-written after resume, but we're paranoid in xhci_clear_command_ring()
818 spin_lock_irqsave(&xhci->lock, flags); in xhci_disable_hub_port_wake()
820 for (i = 0; i < rhub->num_ports; i++) { in xhci_disable_hub_port_wake()
821 portsc = readl(rhub->ports[i]->addr); in xhci_disable_hub_port_wake()
834 writel(t2, rhub->ports[i]->addr); in xhci_disable_hub_port_wake()
835 xhci_dbg(xhci, "config port %d-%d wake bits, portsc: 0x%x, write: 0x%x\n", in xhci_disable_hub_port_wake()
836 rhub->hcd->self.busnum, i + 1, portsc, t2); in xhci_disable_hub_port_wake()
839 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_hub_port_wake()
849 status = readl(&xhci->op_regs->status); in xhci_pending_portevent()
858 port_index = xhci->usb2_rhub.num_ports; in xhci_pending_portevent()
859 ports = xhci->usb2_rhub.ports; in xhci_pending_portevent()
860 while (port_index--) { in xhci_pending_portevent()
861 portsc = readl(ports[port_index]->addr); in xhci_pending_portevent()
866 port_index = xhci->usb3_rhub.num_ports; in xhci_pending_portevent()
867 ports = xhci->usb3_rhub.ports; in xhci_pending_portevent()
868 while (port_index--) { in xhci_pending_portevent()
869 portsc = readl(ports[port_index]->addr); in xhci_pending_portevent()
878 * Stop HC (not bus-specific)
891 if (!hcd->state) in xhci_suspend()
894 if (hcd->state != HC_STATE_SUSPENDED || in xhci_suspend()
895 (xhci->shared_hcd && xhci->shared_hcd->state != HC_STATE_SUSPENDED)) in xhci_suspend()
896 return -EINVAL; in xhci_suspend()
898 /* Clear root port wake on bits if wakeup not allowed. */ in xhci_suspend()
899 xhci_disable_hub_port_wake(xhci, &xhci->usb3_rhub, do_wakeup); in xhci_suspend()
900 xhci_disable_hub_port_wake(xhci, &xhci->usb2_rhub, do_wakeup); in xhci_suspend()
907 /* Don't poll the roothubs on bus suspend. */ in xhci_suspend()
909 __func__, hcd->self.busnum); in xhci_suspend()
910 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_suspend()
911 timer_delete_sync(&hcd->rh_timer); in xhci_suspend()
912 if (xhci->shared_hcd) { in xhci_suspend()
913 clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); in xhci_suspend()
914 timer_delete_sync(&xhci->shared_hcd->rh_timer); in xhci_suspend()
917 if (xhci->quirks & XHCI_SUSPEND_DELAY) in xhci_suspend()
920 spin_lock_irq(&xhci->lock); in xhci_suspend()
921 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); in xhci_suspend()
922 if (xhci->shared_hcd) in xhci_suspend()
923 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags); in xhci_suspend()
928 command = readl(&xhci->op_regs->command); in xhci_suspend()
930 writel(command, &xhci->op_regs->command); in xhci_suspend()
933 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1; in xhci_suspend()
935 if (xhci_handshake(&xhci->op_regs->status, in xhci_suspend()
938 spin_unlock_irq(&xhci->lock); in xhci_suspend()
939 return -ETIMEDOUT; in xhci_suspend()
947 command = readl(&xhci->op_regs->command); in xhci_suspend()
949 writel(command, &xhci->op_regs->command); in xhci_suspend()
950 xhci->broken_suspend = 0; in xhci_suspend()
951 if (xhci_handshake(&xhci->op_regs->status, in xhci_suspend()
962 res = readl(&xhci->op_regs->status); in xhci_suspend()
963 if ((xhci->quirks & XHCI_SNPS_BROKEN_SUSPEND) && in xhci_suspend()
966 xhci->broken_suspend = 1; in xhci_suspend()
969 spin_unlock_irq(&xhci->lock); in xhci_suspend()
970 return -ETIMEDOUT; in xhci_suspend()
973 spin_unlock_irq(&xhci->lock); in xhci_suspend()
979 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_suspend()
981 timer_delete_sync(&xhci->comp_mode_recovery_timer); in xhci_suspend()
992 * start xHC (not bus-specific)
1006 if (!hcd->state) in xhci_resume()
1013 if (time_before(jiffies, xhci->usb2_rhub.bus_state.next_statechange) || in xhci_resume()
1014 time_before(jiffies, xhci->usb3_rhub.bus_state.next_statechange)) in xhci_resume()
1017 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); in xhci_resume()
1018 if (xhci->shared_hcd) in xhci_resume()
1019 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags); in xhci_resume()
1021 spin_lock_irq(&xhci->lock); in xhci_resume()
1023 if (xhci->quirks & XHCI_RESET_ON_RESUME || xhci->broken_suspend) in xhci_resume()
1028 * Some controllers might lose power during suspend, so wait in xhci_resume()
1031 retval = xhci_handshake(&xhci->op_regs->status, in xhci_resume()
1036 spin_unlock_irq(&xhci->lock); in xhci_resume()
1045 command = readl(&xhci->op_regs->command); in xhci_resume()
1047 writel(command, &xhci->op_regs->command); in xhci_resume()
1053 if (xhci_handshake(&xhci->op_regs->status, in xhci_resume()
1056 spin_unlock_irq(&xhci->lock); in xhci_resume()
1057 return -ETIMEDOUT; in xhci_resume()
1061 temp = readl(&xhci->op_regs->status); in xhci_resume()
1063 /* re-initialize the HC on Restore Error, or Host Controller Error */ in xhci_resume()
1065 !(xhci->xhc_state & XHCI_STATE_REMOVING)) { in xhci_resume()
1072 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_resume()
1074 timer_delete_sync(&xhci->comp_mode_recovery_timer); in xhci_resume()
1079 /* Let the USB core know _both_ roothubs lost power. */ in xhci_resume()
1080 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub); in xhci_resume()
1081 if (xhci->shared_hcd) in xhci_resume()
1082 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub); in xhci_resume()
1088 spin_unlock_irq(&xhci->lock); in xhci_resume()
1093 temp = readl(&xhci->op_regs->status); in xhci_resume()
1094 writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status); in xhci_resume()
1095 xhci_disable_interrupter(xhci->interrupters[0]); in xhci_resume()
1100 xhci_dbg(xhci, "xhci_stop completed - status = %x\n", in xhci_resume()
1101 readl(&xhci->op_regs->status)); in xhci_resume()
1115 if (!retval && xhci->shared_hcd) { in xhci_resume()
1117 retval = xhci_run(xhci->shared_hcd); in xhci_resume()
1125 hcd->state = HC_STATE_SUSPENDED; in xhci_resume()
1127 if (xhci->shared_hcd) { in xhci_resume()
1128 xhci->shared_hcd->state = HC_STATE_SUSPENDED; in xhci_resume()
1129 usb_hcd_resume_root_hub(xhci->shared_hcd); in xhci_resume()
1137 command = readl(&xhci->op_regs->command); in xhci_resume()
1139 writel(command, &xhci->op_regs->command); in xhci_resume()
1140 xhci_handshake(&xhci->op_regs->status, STS_HALT, in xhci_resume()
1152 spin_unlock_irq(&xhci->lock); in xhci_resume()
1163 if (xhci->usb3_rhub.bus_state.suspended_ports || in xhci_resume()
1164 xhci->usb3_rhub.bus_state.bus_suspended) in xhci_resume()
1175 if (xhci->shared_hcd) in xhci_resume()
1176 usb_hcd_resume_root_hub(xhci->shared_hcd); in xhci_resume()
1183 * be re-initialized Always after a system resume. Ports are subject in xhci_resume()
1187 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running) in xhci_resume()
1190 if (xhci->quirks & XHCI_ASMEDIA_MODIFY_FLOWCONTROL) in xhci_resume()
1191 usb_asmedia_modifyflowcontrol(to_pci_dev(hcd->self.controller)); in xhci_resume()
1193 /* Re-enable port polling. */ in xhci_resume()
1195 __func__, hcd->self.busnum); in xhci_resume()
1196 if (xhci->shared_hcd) { in xhci_resume()
1197 set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); in xhci_resume()
1198 usb_hcd_poll_rh_status(xhci->shared_hcd); in xhci_resume()
1200 set_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_resume()
1208 /*-------------------------------------------------------------------------*/
1218 buf_len = urb->transfer_buffer_length; in xhci_map_temp_buffer()
1221 dev_to_node(hcd->self.sysdev)); in xhci_map_temp_buffer()
1223 return -ENOMEM; in xhci_map_temp_buffer()
1226 sg_pcopy_to_buffer(urb->sg, urb->num_sgs, in xhci_map_temp_buffer()
1229 urb->transfer_buffer = temp; in xhci_map_temp_buffer()
1230 urb->transfer_dma = dma_map_single(hcd->self.sysdev, in xhci_map_temp_buffer()
1231 urb->transfer_buffer, in xhci_map_temp_buffer()
1232 urb->transfer_buffer_length, in xhci_map_temp_buffer()
1235 if (dma_mapping_error(hcd->self.sysdev, in xhci_map_temp_buffer()
1236 urb->transfer_dma)) { in xhci_map_temp_buffer()
1237 ret = -EAGAIN; in xhci_map_temp_buffer()
1240 urb->transfer_flags |= URB_DMA_MAP_SINGLE; in xhci_map_temp_buffer()
1257 tail_sg = urb->sg; in xhci_urb_temp_buffer_required()
1258 max_pkt = usb_endpoint_maxp(&urb->ep->desc); in xhci_urb_temp_buffer_required()
1260 if (!urb->num_sgs) in xhci_urb_temp_buffer_required()
1263 if (urb->dev->speed >= USB_SPEED_SUPER) in xhci_urb_temp_buffer_required()
1268 if (urb->transfer_buffer_length != 0 && in xhci_urb_temp_buffer_required()
1269 !(urb->transfer_flags & URB_NO_TRANSFER_DMA_MAP)) { in xhci_urb_temp_buffer_required()
1270 for_each_sg(urb->sg, sg, urb->num_sgs, i) { in xhci_urb_temp_buffer_required()
1271 len = len + sg->length; in xhci_urb_temp_buffer_required()
1272 if (i > trb_size - 2) { in xhci_urb_temp_buffer_required()
1273 len = len - tail_sg->length; in xhci_urb_temp_buffer_required()
1294 buf_len = urb->transfer_buffer_length; in xhci_unmap_temp_buf()
1297 (urb->transfer_flags & URB_DMA_MAP_SINGLE)) in xhci_unmap_temp_buf()
1298 dma_unmap_single(hcd->self.sysdev, in xhci_unmap_temp_buf()
1299 urb->transfer_dma, in xhci_unmap_temp_buf()
1300 urb->transfer_buffer_length, in xhci_unmap_temp_buf()
1304 len = sg_pcopy_from_buffer(urb->sg, urb->num_sgs, in xhci_unmap_temp_buf()
1305 urb->transfer_buffer, in xhci_unmap_temp_buf()
1311 urb->actual_length = len; in xhci_unmap_temp_buf()
1314 urb->transfer_flags &= ~URB_DMA_MAP_SINGLE; in xhci_unmap_temp_buf()
1315 kfree(urb->transfer_buffer); in xhci_unmap_temp_buf()
1316 urb->transfer_buffer = NULL; in xhci_unmap_temp_buf()
1322 * transfers up to 8 bytes on output endpoints of any kind with wMaxPacketSize
1335 if (xhci->quirks & XHCI_SG_TRB_CACHE_SIZE_QUIRK) { in xhci_map_urb_for_dma()
1349 if (urb->num_sgs && (urb->transfer_flags & URB_DMA_MAP_SINGLE)) in xhci_unmap_urb_for_dma()
1352 if ((xhci->quirks & XHCI_SG_TRB_CACHE_SIZE_QUIRK) && unmap_temp_buf) in xhci_unmap_urb_for_dma()
1359 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1363 * Index = (epnum * 2) + direction - 1,
1366 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1375 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1; in xhci_get_endpoint_index()
1407 return fls(added_ctxs) - 1; in xhci_last_valid_endpoint()
1411 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1421 return -EINVAL; in xhci_check_args()
1423 if (!udev->parent) { in xhci_check_args()
1430 if (!udev->slot_id || !xhci->devs[udev->slot_id]) { in xhci_check_args()
1433 return -EINVAL; in xhci_check_args()
1436 virt_dev = xhci->devs[udev->slot_id]; in xhci_check_args()
1437 if (virt_dev->udev != udev) { in xhci_check_args()
1440 return -EINVAL; in xhci_check_args()
1444 if (xhci->xhc_state & XHCI_STATE_HALTED) in xhci_check_args()
1445 return -ENODEV; in xhci_check_args()
1458 * we need to issue an evaluate context command and wait on it.
1469 ep_ctx = xhci_get_ep_ctx(xhci, vdev->out_ctx, 0); in xhci_check_ep0_maxpacket()
1470 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2)); in xhci_check_ep0_maxpacket()
1471 max_packet_size = usb_endpoint_maxp(&vdev->udev->ep0.desc); in xhci_check_ep0_maxpacket()
1491 return -ENOMEM; in xhci_check_ep0_maxpacket()
1493 command->in_ctx = vdev->in_ctx; in xhci_check_ep0_maxpacket()
1494 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_check_ep0_maxpacket()
1498 ret = -ENOMEM; in xhci_check_ep0_maxpacket()
1502 xhci_endpoint_copy(xhci, vdev->in_ctx, vdev->out_ctx, 0); in xhci_check_ep0_maxpacket()
1504 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, 0); in xhci_check_ep0_maxpacket()
1505 ep_ctx->ep_info &= cpu_to_le32(~EP_STATE_MASK);/* must clear */ in xhci_check_ep0_maxpacket()
1506 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK); in xhci_check_ep0_maxpacket()
1507 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size)); in xhci_check_ep0_maxpacket()
1509 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG); in xhci_check_ep0_maxpacket()
1510 ctrl_ctx->drop_flags = 0; in xhci_check_ep0_maxpacket()
1512 ret = xhci_configure_endpoint(xhci, vdev->udev, command, in xhci_check_ep0_maxpacket()
1515 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG); in xhci_check_ep0_maxpacket()
1518 dev_dbg(&vdev->udev->dev, "incorrect max packet size %d for ep0\n", in xhci_check_ep0_maxpacket()
1520 return -EINVAL; in xhci_check_ep0_maxpacket()
1523 kfree(command->completion); in xhci_check_ep0_maxpacket()
1530 * non-error returns are a promise to giveback() the urb later
1543 ep_index = xhci_get_endpoint_index(&urb->ep->desc); in xhci_urb_enqueue()
1545 if (usb_endpoint_xfer_isoc(&urb->ep->desc)) in xhci_urb_enqueue()
1546 num_tds = urb->number_of_packets; in xhci_urb_enqueue()
1547 else if (usb_endpoint_is_bulk_out(&urb->ep->desc) && in xhci_urb_enqueue()
1548 urb->transfer_buffer_length > 0 && in xhci_urb_enqueue()
1549 urb->transfer_flags & URB_ZERO_PACKET && in xhci_urb_enqueue()
1550 !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc))) in xhci_urb_enqueue()
1557 return -ENOMEM; in xhci_urb_enqueue()
1559 urb_priv->num_tds = num_tds; in xhci_urb_enqueue()
1560 urb_priv->num_tds_done = 0; in xhci_urb_enqueue()
1561 urb->hcpriv = urb_priv; in xhci_urb_enqueue()
1565 spin_lock_irqsave(&xhci->lock, flags); in xhci_urb_enqueue()
1567 ret = xhci_check_args(hcd, urb->dev, urb->ep, in xhci_urb_enqueue()
1570 ret = ret ? ret : -EINVAL; in xhci_urb_enqueue()
1574 slot_id = urb->dev->slot_id; in xhci_urb_enqueue()
1577 ret = -ESHUTDOWN; in xhci_urb_enqueue()
1581 if (xhci->devs[slot_id]->flags & VDEV_PORT_ERROR) { in xhci_urb_enqueue()
1583 ret = -ENODEV; in xhci_urb_enqueue()
1587 if (xhci->xhc_state & XHCI_STATE_DYING) { in xhci_urb_enqueue()
1588 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for non-responsive xHCI host.\n", in xhci_urb_enqueue()
1589 urb->ep->desc.bEndpointAddress, urb); in xhci_urb_enqueue()
1590 ret = -ESHUTDOWN; in xhci_urb_enqueue()
1594 ep_state = &xhci->devs[slot_id]->eps[ep_index].ep_state; in xhci_urb_enqueue()
1599 ret = -EINVAL; in xhci_urb_enqueue()
1604 ret = -EINVAL; in xhci_urb_enqueue()
1608 switch (usb_endpoint_type(&urb->ep->desc)) { in xhci_urb_enqueue()
1630 urb->hcpriv = NULL; in xhci_urb_enqueue()
1632 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_urb_enqueue()
1649 * when drivers timeout on the last submitted URB and attempt to cancel.
1652 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1661 * It also needs to account for multiple cancellations on happening at the same
1682 spin_lock_irqsave(&xhci->lock, flags); in xhci_urb_dequeue()
1692 vdev = xhci->devs[urb->dev->slot_id]; in xhci_urb_dequeue()
1693 urb_priv = urb->hcpriv; in xhci_urb_dequeue()
1697 ep_index = xhci_get_endpoint_index(&urb->ep->desc); in xhci_urb_dequeue()
1698 ep = &vdev->eps[ep_index]; in xhci_urb_dequeue()
1704 temp = readl(&xhci->op_regs->status); in xhci_urb_dequeue()
1705 if (temp == ~(u32)0 || xhci->xhc_state & XHCI_STATE_DYING) { in xhci_urb_dequeue()
1711 * check ring is not re-allocated since URB was enqueued. If it is, then in xhci_urb_dequeue()
1715 if (!td_on_ring(&urb_priv->td[0], ep_ring)) { in xhci_urb_dequeue()
1716 xhci_err(xhci, "Canceled URB td not found on endpoint ring"); in xhci_urb_dequeue()
1717 for (i = urb_priv->num_tds_done; i < urb_priv->num_tds; i++) { in xhci_urb_dequeue()
1718 td = &urb_priv->td[i]; in xhci_urb_dequeue()
1719 if (!list_empty(&td->cancelled_td_list)) in xhci_urb_dequeue()
1720 list_del_init(&td->cancelled_td_list); in xhci_urb_dequeue()
1725 if (xhci->xhc_state & XHCI_STATE_HALTED) { in xhci_urb_dequeue()
1728 for (i = urb_priv->num_tds_done; in xhci_urb_dequeue()
1729 i < urb_priv->num_tds; in xhci_urb_dequeue()
1731 td = &urb_priv->td[i]; in xhci_urb_dequeue()
1732 if (!list_empty(&td->td_list)) in xhci_urb_dequeue()
1733 list_del_init(&td->td_list); in xhci_urb_dequeue()
1734 if (!list_empty(&td->cancelled_td_list)) in xhci_urb_dequeue()
1735 list_del_init(&td->cancelled_td_list); in xhci_urb_dequeue()
1740 i = urb_priv->num_tds_done; in xhci_urb_dequeue()
1741 if (i < urb_priv->num_tds) in xhci_urb_dequeue()
1745 urb, urb->dev->devpath, in xhci_urb_dequeue()
1746 urb->ep->desc.bEndpointAddress, in xhci_urb_dequeue()
1748 urb_priv->td[i].start_seg, in xhci_urb_dequeue()
1749 urb_priv->td[i].start_trb)); in xhci_urb_dequeue()
1751 for (; i < urb_priv->num_tds; i++) { in xhci_urb_dequeue()
1752 td = &urb_priv->td[i]; in xhci_urb_dequeue()
1753 /* TD can already be on cancelled list if ep halted on it */ in xhci_urb_dequeue()
1754 if (list_empty(&td->cancelled_td_list)) { in xhci_urb_dequeue()
1755 td->cancel_status = TD_DIRTY; in xhci_urb_dequeue()
1756 list_add_tail(&td->cancelled_td_list, in xhci_urb_dequeue()
1757 &ep->cancelled_td_list); in xhci_urb_dequeue()
1762 if (ep->ep_state & (EP_STOP_CMD_PENDING | EP_HALTED | SET_DEQ_PENDING)) { in xhci_urb_dequeue()
1763 xhci_dbg(xhci, "Not queuing Stop Endpoint on slot %d ep %d in state 0x%x\n", in xhci_urb_dequeue()
1764 urb->dev->slot_id, ep_index, ep->ep_state); in xhci_urb_dequeue()
1769 if (ep->ep_state & EP_CLEARING_TT) { in xhci_urb_dequeue()
1771 xhci_dbg(xhci, "Invalidating TDs instantly on slot %d ep %d in state 0x%x\n", in xhci_urb_dequeue()
1772 urb->dev->slot_id, ep_index, ep->ep_state); in xhci_urb_dequeue()
1778 ret = -ENOMEM; in xhci_urb_dequeue()
1781 ep->stop_time = jiffies; in xhci_urb_dequeue()
1782 ep->ep_state |= EP_STOP_CMD_PENDING; in xhci_urb_dequeue()
1783 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id, in xhci_urb_dequeue()
1788 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_urb_dequeue()
1795 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_urb_dequeue()
1796 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN); in xhci_urb_dequeue()
1811 * the xhci->devs[slot_id] structure.
1829 if (xhci->xhc_state & XHCI_STATE_DYING) in xhci_drop_endpoint()
1830 return -ENODEV; in xhci_drop_endpoint()
1833 drop_flag = xhci_get_endpoint_flag(&ep->desc); in xhci_drop_endpoint()
1835 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n", in xhci_drop_endpoint()
1840 in_ctx = xhci->devs[udev->slot_id]->in_ctx; in xhci_drop_endpoint()
1841 out_ctx = xhci->devs[udev->slot_id]->out_ctx; in xhci_drop_endpoint()
1849 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_drop_endpoint()
1852 * or the HCD has noted it is disabled, ignore this request in xhci_drop_endpoint()
1855 le32_to_cpu(ctrl_ctx->drop_flags) & in xhci_drop_endpoint()
1856 xhci_get_endpoint_flag(&ep->desc)) { in xhci_drop_endpoint()
1858 if (xhci->devs[udev->slot_id]->eps[ep_index].ring != NULL) in xhci_drop_endpoint()
1864 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag); in xhci_drop_endpoint()
1865 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags); in xhci_drop_endpoint()
1867 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag); in xhci_drop_endpoint()
1868 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags); in xhci_drop_endpoint()
1870 xhci_debugfs_remove_endpoint(xhci, xhci->devs[udev->slot_id], ep_index); in xhci_drop_endpoint()
1872 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep); in xhci_drop_endpoint()
1875 (unsigned int) ep->desc.bEndpointAddress, in xhci_drop_endpoint()
1876 udev->slot_id, in xhci_drop_endpoint()
1894 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1912 ep->hcpriv = NULL; in xhci_add_endpoint()
1916 if (xhci->xhc_state & XHCI_STATE_DYING) in xhci_add_endpoint()
1917 return -ENODEV; in xhci_add_endpoint()
1919 added_ctxs = xhci_get_endpoint_flag(&ep->desc); in xhci_add_endpoint()
1925 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n", in xhci_add_endpoint()
1930 virt_dev = xhci->devs[udev->slot_id]; in xhci_add_endpoint()
1931 in_ctx = virt_dev->in_ctx; in xhci_add_endpoint()
1939 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_add_endpoint()
1943 if (virt_dev->eps[ep_index].ring && in xhci_add_endpoint()
1944 !(le32_to_cpu(ctrl_ctx->drop_flags) & added_ctxs)) { in xhci_add_endpoint()
1947 (unsigned int) ep->desc.bEndpointAddress); in xhci_add_endpoint()
1948 return -EINVAL; in xhci_add_endpoint()
1952 * ignore this request. in xhci_add_endpoint()
1954 if (le32_to_cpu(ctrl_ctx->add_flags) & added_ctxs) { in xhci_add_endpoint()
1966 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n", in xhci_add_endpoint()
1967 __func__, ep->desc.bEndpointAddress); in xhci_add_endpoint()
1968 return -ENOMEM; in xhci_add_endpoint()
1971 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs); in xhci_add_endpoint()
1972 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags); in xhci_add_endpoint()
1976 * this re-adds a new state for the endpoint from the new endpoint in xhci_add_endpoint()
1977 * descriptors. We must drop and re-add this endpoint, so we leave the in xhci_add_endpoint()
1980 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags); in xhci_add_endpoint()
1983 ep->hcpriv = udev; in xhci_add_endpoint()
1985 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index); in xhci_add_endpoint()
1989 (unsigned int) ep->desc.bEndpointAddress, in xhci_add_endpoint()
1990 udev->slot_id, in xhci_add_endpoint()
2004 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx); in xhci_zero_in_ctx()
2016 ctrl_ctx->drop_flags = 0; in xhci_zero_in_ctx()
2017 ctrl_ctx->add_flags = 0; in xhci_zero_in_ctx()
2018 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); in xhci_zero_in_ctx()
2019 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK); in xhci_zero_in_ctx()
2021 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1)); in xhci_zero_in_ctx()
2023 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i); in xhci_zero_in_ctx()
2024 ep_ctx->ep_info = 0; in xhci_zero_in_ctx()
2025 ep_ctx->ep_info2 = 0; in xhci_zero_in_ctx()
2026 ep_ctx->deq = 0; in xhci_zero_in_ctx()
2027 ep_ctx->tx_info = 0; in xhci_zero_in_ctx()
2040 ret = -ETIME; in xhci_configure_endpoint_result()
2043 dev_warn(&udev->dev, in xhci_configure_endpoint_result()
2045 ret = -ENOMEM; in xhci_configure_endpoint_result()
2050 dev_warn(&udev->dev, in xhci_configure_endpoint_result()
2052 ret = -ENOSPC; in xhci_configure_endpoint_result()
2057 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, " in xhci_configure_endpoint_result()
2060 ret = -EINVAL; in xhci_configure_endpoint_result()
2063 dev_warn(&udev->dev, in xhci_configure_endpoint_result()
2065 ret = -ENODEV; in xhci_configure_endpoint_result()
2075 ret = -EINVAL; in xhci_configure_endpoint_result()
2090 ret = -ETIME; in xhci_evaluate_context_result()
2093 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2095 ret = -EINVAL; in xhci_evaluate_context_result()
2098 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2100 ret = -EINVAL; in xhci_evaluate_context_result()
2103 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2105 ret = -EINVAL; in xhci_evaluate_context_result()
2108 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2110 ret = -ENODEV; in xhci_evaluate_context_result()
2114 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n"); in xhci_evaluate_context_result()
2115 ret = -EINVAL; in xhci_evaluate_context_result()
2125 ret = -EINVAL; in xhci_evaluate_context_result()
2137 /* Ignore the slot flag (bit 0), and the default control endpoint flag in xhci_count_num_new_endpoints()
2141 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2; in xhci_count_num_new_endpoints()
2142 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2; in xhci_count_num_new_endpoints()
2148 return hweight32(valid_add_flags) - in xhci_count_num_new_endpoints()
2158 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2; in xhci_count_num_dropped_endpoints()
2159 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2; in xhci_count_num_dropped_endpoints()
2161 return hweight32(valid_drop_flags) - in xhci_count_num_dropped_endpoints()
2171 * - the first configure endpoint command drops more endpoints than it adds
2172 * - a second configure endpoint command that adds more endpoints is queued
2173 * - the first configure endpoint command fails, so the config is unchanged
2174 * - the second command may succeed, even though there isn't enough resources
2176 * Must be called with xhci->lock held.
2184 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) { in xhci_reserve_host_resources()
2188 xhci->num_active_eps, added_eps, in xhci_reserve_host_resources()
2189 xhci->limit_active_eps); in xhci_reserve_host_resources()
2190 return -ENOMEM; in xhci_reserve_host_resources()
2192 xhci->num_active_eps += added_eps; in xhci_reserve_host_resources()
2195 xhci->num_active_eps); in xhci_reserve_host_resources()
2203 * Must be called with xhci->lock held.
2211 xhci->num_active_eps -= num_failed_eps; in xhci_free_host_resources()
2215 xhci->num_active_eps); in xhci_free_host_resources()
2222 * Must be called with xhci->lock held.
2230 xhci->num_active_eps -= num_dropped_eps; in xhci_finish_resource_reservation()
2235 xhci->num_active_eps); in xhci_finish_resource_reservation()
2240 switch (udev->speed) { in xhci_get_block_size()
2259 if (interval_bw->overhead[LS_OVERHEAD_TYPE]) in xhci_get_largest_overhead()
2261 if (interval_bw->overhead[FS_OVERHEAD_TYPE]) in xhci_get_largest_overhead()
2278 bw_table = &xhci->rh_bw[virt_dev->rhub_port->hw_portnum].bw_table; in xhci_check_tt_bw_table()
2279 tt_info = virt_dev->tt_info; in xhci_check_tt_bw_table()
2286 if (old_active_eps == 0 && tt_info->active_eps != 0) { in xhci_check_tt_bw_table()
2287 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT) in xhci_check_tt_bw_table()
2288 return -ENOMEM; in xhci_check_tt_bw_table()
2306 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved)) in xhci_check_ss_bw()
2307 return -ENOMEM; in xhci_check_ss_bw()
2310 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved)) in xhci_check_ss_bw()
2311 return -ENOMEM; in xhci_check_ss_bw()
2317 * This algorithm is a very conservative estimate of the worst-case scheduling
2325 * over-estimate.
2372 if (virt_dev->udev->speed >= USB_SPEED_SUPER) in xhci_check_bw_table()
2375 if (virt_dev->udev->speed == USB_SPEED_HIGH) { in xhci_check_bw_table()
2384 bw_table = virt_dev->bw_table; in xhci_check_bw_table()
2388 block_size = xhci_get_block_size(virt_dev->udev); in xhci_check_bw_table()
2393 if (virt_dev->tt_info) { in xhci_check_bw_table()
2396 virt_dev->rhub_port->hw_portnum + 1); in xhci_check_bw_table()
2398 xhci_warn(xhci, "Not enough bandwidth on HS bus for " in xhci_check_bw_table()
2400 return -ENOMEM; in xhci_check_bw_table()
2404 virt_dev->tt_info->slot_id, in xhci_check_bw_table()
2405 virt_dev->tt_info->ttport); in xhci_check_bw_table()
2409 virt_dev->rhub_port->hw_portnum + 1); in xhci_check_bw_table()
2415 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) + in xhci_check_bw_table()
2416 bw_table->interval_bw[0].num_packets * in xhci_check_bw_table()
2417 xhci_get_largest_overhead(&bw_table->interval_bw[0]); in xhci_check_bw_table()
2430 bw_table->interval_bw[i].num_packets; in xhci_check_bw_table()
2435 if (list_empty(&bw_table->interval_bw[i].endpoints)) in xhci_check_bw_table()
2441 ep_entry = bw_table->interval_bw[i].endpoints.next; in xhci_check_bw_table()
2446 virt_ep->bw_info.max_packet_size, in xhci_check_bw_table()
2454 &bw_table->interval_bw[i]); in xhci_check_bw_table()
2493 return -ENOMEM; in xhci_check_bw_table()
2497 * Ok, we know we have some packets left over after even-handedly in xhci_check_bw_table()
2499 * fit into, so we over-schedule and say they will be scheduled every in xhci_check_bw_table()
2505 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) { in xhci_check_bw_table()
2511 xhci->rh_bw[virt_dev->rhub_port->hw_portnum].num_active_tts; in xhci_check_bw_table()
2518 (max_bandwidth - bw_used - bw_reserved) * 100 / in xhci_check_bw_table()
2525 return -ENOMEM; in xhci_check_bw_table()
2528 bw_table->bw_used = bw_used; in xhci_check_bw_table()
2546 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK); in xhci_get_ss_bw_consumed()
2548 if (ep_bw->ep_interval == 0) in xhci_get_ss_bw_consumed()
2550 (ep_bw->mult * ep_bw->num_packets * in xhci_get_ss_bw_consumed()
2552 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets * in xhci_get_ss_bw_consumed()
2554 1 << ep_bw->ep_interval); in xhci_get_ss_bw_consumed()
2568 if (xhci_is_async_ep(ep_bw->type)) in xhci_drop_ep_from_interval_table()
2571 if (udev->speed >= USB_SPEED_SUPER) { in xhci_drop_ep_from_interval_table()
2572 if (xhci_is_sync_in_ep(ep_bw->type)) in xhci_drop_ep_from_interval_table()
2573 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -= in xhci_drop_ep_from_interval_table()
2576 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -= in xhci_drop_ep_from_interval_table()
2584 if (list_empty(&virt_ep->bw_endpoint_list)) in xhci_drop_ep_from_interval_table()
2589 if (udev->speed == USB_SPEED_HIGH) in xhci_drop_ep_from_interval_table()
2590 normalized_interval = ep_bw->ep_interval; in xhci_drop_ep_from_interval_table()
2592 normalized_interval = ep_bw->ep_interval - 3; in xhci_drop_ep_from_interval_table()
2595 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload; in xhci_drop_ep_from_interval_table()
2596 interval_bw = &bw_table->interval_bw[normalized_interval]; in xhci_drop_ep_from_interval_table()
2597 interval_bw->num_packets -= ep_bw->num_packets; in xhci_drop_ep_from_interval_table()
2598 switch (udev->speed) { in xhci_drop_ep_from_interval_table()
2600 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1; in xhci_drop_ep_from_interval_table()
2603 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1; in xhci_drop_ep_from_interval_table()
2606 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1; in xhci_drop_ep_from_interval_table()
2615 tt_info->active_eps -= 1; in xhci_drop_ep_from_interval_table()
2616 list_del_init(&virt_ep->bw_endpoint_list); in xhci_drop_ep_from_interval_table()
2630 if (xhci_is_async_ep(ep_bw->type)) in xhci_add_ep_to_interval_table()
2633 if (udev->speed == USB_SPEED_SUPER) { in xhci_add_ep_to_interval_table()
2634 if (xhci_is_sync_in_ep(ep_bw->type)) in xhci_add_ep_to_interval_table()
2635 xhci->devs[udev->slot_id]->bw_table->ss_bw_in += in xhci_add_ep_to_interval_table()
2638 xhci->devs[udev->slot_id]->bw_table->ss_bw_out += in xhci_add_ep_to_interval_table()
2646 if (udev->speed == USB_SPEED_HIGH) in xhci_add_ep_to_interval_table()
2647 normalized_interval = ep_bw->ep_interval; in xhci_add_ep_to_interval_table()
2649 normalized_interval = ep_bw->ep_interval - 3; in xhci_add_ep_to_interval_table()
2652 bw_table->interval0_esit_payload += ep_bw->max_esit_payload; in xhci_add_ep_to_interval_table()
2653 interval_bw = &bw_table->interval_bw[normalized_interval]; in xhci_add_ep_to_interval_table()
2654 interval_bw->num_packets += ep_bw->num_packets; in xhci_add_ep_to_interval_table()
2655 switch (udev->speed) { in xhci_add_ep_to_interval_table()
2657 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1; in xhci_add_ep_to_interval_table()
2660 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1; in xhci_add_ep_to_interval_table()
2663 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1; in xhci_add_ep_to_interval_table()
2673 tt_info->active_eps += 1; in xhci_add_ep_to_interval_table()
2675 list_for_each_entry(smaller_ep, &interval_bw->endpoints, in xhci_add_ep_to_interval_table()
2677 if (ep_bw->max_packet_size >= in xhci_add_ep_to_interval_table()
2678 smaller_ep->bw_info.max_packet_size) { in xhci_add_ep_to_interval_table()
2680 list_add_tail(&virt_ep->bw_endpoint_list, in xhci_add_ep_to_interval_table()
2681 &smaller_ep->bw_endpoint_list); in xhci_add_ep_to_interval_table()
2686 list_add_tail(&virt_ep->bw_endpoint_list, in xhci_add_ep_to_interval_table()
2687 &interval_bw->endpoints); in xhci_add_ep_to_interval_table()
2695 if (!virt_dev->tt_info) in xhci_update_tt_active_eps()
2698 rh_bw_info = &xhci->rh_bw[virt_dev->rhub_port->hw_portnum]; in xhci_update_tt_active_eps()
2700 virt_dev->tt_info->active_eps != 0) { in xhci_update_tt_active_eps()
2701 rh_bw_info->num_active_tts += 1; in xhci_update_tt_active_eps()
2702 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD; in xhci_update_tt_active_eps()
2704 virt_dev->tt_info->active_eps == 0) { in xhci_update_tt_active_eps()
2705 rh_bw_info->num_active_tts -= 1; in xhci_update_tt_active_eps()
2706 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD; in xhci_update_tt_active_eps()
2719 if (virt_dev->tt_info) in xhci_reserve_bandwidth()
2720 old_active_eps = virt_dev->tt_info->active_eps; in xhci_reserve_bandwidth()
2726 return -ENOMEM; in xhci_reserve_bandwidth()
2734 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2741 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2742 virt_dev->bw_table, in xhci_reserve_bandwidth()
2743 virt_dev->udev, in xhci_reserve_bandwidth()
2744 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2745 virt_dev->tt_info); in xhci_reserve_bandwidth()
2748 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev); in xhci_reserve_bandwidth()
2753 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2754 virt_dev->bw_table, in xhci_reserve_bandwidth()
2755 virt_dev->udev, in xhci_reserve_bandwidth()
2756 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2757 virt_dev->tt_info); in xhci_reserve_bandwidth()
2778 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2779 virt_dev->bw_table, in xhci_reserve_bandwidth()
2780 virt_dev->udev, in xhci_reserve_bandwidth()
2781 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2782 virt_dev->tt_info); in xhci_reserve_bandwidth()
2785 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i], in xhci_reserve_bandwidth()
2790 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2791 virt_dev->bw_table, in xhci_reserve_bandwidth()
2792 virt_dev->udev, in xhci_reserve_bandwidth()
2793 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2794 virt_dev->tt_info); in xhci_reserve_bandwidth()
2796 return -ENOMEM; in xhci_reserve_bandwidth()
2817 return -ENOMEM; in xhci_stop_endpoint_sync()
2819 spin_lock_irqsave(&xhci->lock, flags); in xhci_stop_endpoint_sync()
2820 ret = xhci_queue_stop_endpoint(xhci, command, ep->vdev->slot_id, in xhci_stop_endpoint_sync()
2821 ep->ep_index, suspend); in xhci_stop_endpoint_sync()
2823 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_endpoint_sync()
2828 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_stop_endpoint_sync()
2830 wait_for_completion(command->completion); in xhci_stop_endpoint_sync()
2833 if (command->status == COMP_COMMAND_ABORTED || in xhci_stop_endpoint_sync()
2834 command->status == COMP_COMMAND_RING_STOPPED) { in xhci_stop_endpoint_sync()
2836 ret = -ETIME; in xhci_stop_endpoint_sync()
2860 return -EINVAL; in xhci_configure_endpoint()
2862 spin_lock_irqsave(&xhci->lock, flags); in xhci_configure_endpoint()
2864 if (xhci->xhc_state & XHCI_STATE_DYING) { in xhci_configure_endpoint()
2865 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2866 return -ESHUTDOWN; in xhci_configure_endpoint()
2869 virt_dev = xhci->devs[udev->slot_id]; in xhci_configure_endpoint()
2871 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_configure_endpoint()
2873 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2876 return -ENOMEM; in xhci_configure_endpoint()
2879 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) && in xhci_configure_endpoint()
2881 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2884 xhci->num_active_eps); in xhci_configure_endpoint()
2885 return -ENOMEM; in xhci_configure_endpoint()
2887 if ((xhci->quirks & XHCI_SW_BW_CHECKING) && !ctx_change && in xhci_configure_endpoint()
2888 xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) { in xhci_configure_endpoint()
2889 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) in xhci_configure_endpoint()
2891 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2893 return -ENOMEM; in xhci_configure_endpoint()
2896 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx); in xhci_configure_endpoint()
2903 command->in_ctx->dma, in xhci_configure_endpoint()
2904 udev->slot_id, must_succeed); in xhci_configure_endpoint()
2907 command->in_ctx->dma, in xhci_configure_endpoint()
2908 udev->slot_id, must_succeed); in xhci_configure_endpoint()
2910 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) in xhci_configure_endpoint()
2912 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2915 return -ENOMEM; in xhci_configure_endpoint()
2918 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2921 wait_for_completion(command->completion); in xhci_configure_endpoint()
2925 &command->status); in xhci_configure_endpoint()
2928 &command->status); in xhci_configure_endpoint()
2930 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { in xhci_configure_endpoint()
2931 spin_lock_irqsave(&xhci->lock, flags); in xhci_configure_endpoint()
2939 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2947 struct xhci_virt_ep *ep = &vdev->eps[i]; in xhci_check_bw_drop_ep_streams()
2949 if (ep->ep_state & EP_HAS_STREAMS) { in xhci_check_bw_drop_ep_streams()
2950 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n", in xhci_check_bw_drop_ep_streams()
2952 xhci_free_stream_info(xhci, ep->stream_info); in xhci_check_bw_drop_ep_streams()
2953 ep->stream_info = NULL; in xhci_check_bw_drop_ep_streams()
2954 ep->ep_state &= ~EP_HAS_STREAMS; in xhci_check_bw_drop_ep_streams()
2964 * enqueued for any endpoint on the old config or interface. Nothing
2965 * else should be touching the xhci->devs[slot_id] structure, so we
2966 * don't need to take the xhci->lock for manipulating that.
2982 if ((xhci->xhc_state & XHCI_STATE_DYING) || in xhci_check_bandwidth()
2983 (xhci->xhc_state & XHCI_STATE_REMOVING)) in xhci_check_bandwidth()
2984 return -ENODEV; in xhci_check_bandwidth()
2987 virt_dev = xhci->devs[udev->slot_id]; in xhci_check_bandwidth()
2991 return -ENOMEM; in xhci_check_bandwidth()
2993 command->in_ctx = virt_dev->in_ctx; in xhci_check_bandwidth()
2995 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */ in xhci_check_bandwidth()
2996 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_check_bandwidth()
3000 ret = -ENOMEM; in xhci_check_bandwidth()
3003 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_check_bandwidth()
3004 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG); in xhci_check_bandwidth()
3005 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG)); in xhci_check_bandwidth()
3008 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) && in xhci_check_bandwidth()
3009 ctrl_ctx->drop_flags == 0) { in xhci_check_bandwidth()
3014 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); in xhci_check_bandwidth()
3015 for (i = 31; i >= 1; i--) { in xhci_check_bandwidth()
3018 if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32)) in xhci_check_bandwidth()
3019 || (ctrl_ctx->add_flags & le32) || i == 1) { in xhci_check_bandwidth()
3020 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK); in xhci_check_bandwidth()
3021 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i)); in xhci_check_bandwidth()
3034 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) && in xhci_check_bandwidth()
3035 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) { in xhci_check_bandwidth()
3046 if (!virt_dev->eps[i].new_ring) in xhci_check_bandwidth()
3051 if (virt_dev->eps[i].ring) { in xhci_check_bandwidth()
3055 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring; in xhci_check_bandwidth()
3056 virt_dev->eps[i].new_ring = NULL; in xhci_check_bandwidth()
3060 kfree(command->completion); in xhci_check_bandwidth()
3079 virt_dev = xhci->devs[udev->slot_id]; in xhci_reset_bandwidth()
3082 if (virt_dev->eps[i].new_ring) { in xhci_reset_bandwidth()
3084 xhci_ring_free(xhci, virt_dev->eps[i].new_ring); in xhci_reset_bandwidth()
3085 virt_dev->eps[i].new_ring = NULL; in xhci_reset_bandwidth()
3098 ctrl_ctx->add_flags = cpu_to_le32(add_flags); in xhci_setup_input_ctx_for_config_ep()
3099 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags); in xhci_setup_input_ctx_for_config_ep()
3101 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_setup_input_ctx_for_config_ep()
3116 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_disable()
3118 udev = (struct usb_device *)host_ep->hcpriv; in xhci_endpoint_disable()
3119 if (!udev || !udev->slot_id) in xhci_endpoint_disable()
3122 vdev = xhci->devs[udev->slot_id]; in xhci_endpoint_disable()
3126 ep_index = xhci_get_endpoint_index(&host_ep->desc); in xhci_endpoint_disable()
3127 ep = &vdev->eps[ep_index]; in xhci_endpoint_disable()
3130 if (ep->ep_state & EP_CLEARING_TT) { in xhci_endpoint_disable()
3131 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_disable()
3136 if (ep->ep_state) in xhci_endpoint_disable()
3138 ep->ep_state); in xhci_endpoint_disable()
3140 host_ep->hcpriv = NULL; in xhci_endpoint_disable()
3141 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_disable()
3155 * vdev may be lost due to xHC restore error and re-initialization during S3/S4
3174 ep_index = xhci_get_endpoint_index(&host_ep->desc); in xhci_endpoint_reset()
3177 * Usb core assumes a max packet value for ep0 on FS devices until the in xhci_endpoint_reset()
3181 if (usb_endpoint_xfer_control(&host_ep->desc) && ep_index == 0) { in xhci_endpoint_reset()
3184 if (udev->speed != USB_SPEED_FULL || !udev->slot_id) in xhci_endpoint_reset()
3187 vdev = xhci->devs[udev->slot_id]; in xhci_endpoint_reset()
3188 if (!vdev || vdev->udev != udev) in xhci_endpoint_reset()
3197 if (!host_ep->hcpriv) in xhci_endpoint_reset()
3199 udev = (struct usb_device *) host_ep->hcpriv; in xhci_endpoint_reset()
3200 vdev = xhci->devs[udev->slot_id]; in xhci_endpoint_reset()
3202 if (!udev->slot_id || !vdev) in xhci_endpoint_reset()
3205 ep = &vdev->eps[ep_index]; in xhci_endpoint_reset()
3208 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3209 if (ep->ep_state & EP_HARD_CLEAR_TOGGLE) { in xhci_endpoint_reset()
3210 ep->ep_state &= ~EP_HARD_CLEAR_TOGGLE; in xhci_endpoint_reset()
3211 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3214 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3215 /* Only interrupt and bulk ep's use data toggle, USB2 spec 5.5.4-> */ in xhci_endpoint_reset()
3216 if (usb_endpoint_xfer_control(&host_ep->desc) || in xhci_endpoint_reset()
3217 usb_endpoint_xfer_isoc(&host_ep->desc)) in xhci_endpoint_reset()
3220 ep_flag = xhci_get_endpoint_flag(&host_ep->desc); in xhci_endpoint_reset()
3233 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3236 ep->ep_state |= EP_SOFT_CLEAR_TOGGLE; in xhci_endpoint_reset()
3244 if (!list_empty(&ep->ring->td_list)) { in xhci_endpoint_reset()
3245 dev_err(&udev->dev, "EP not empty, refuse reset\n"); in xhci_endpoint_reset()
3246 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3251 err = xhci_queue_stop_endpoint(xhci, stop_cmd, udev->slot_id, in xhci_endpoint_reset()
3254 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3262 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3264 wait_for_completion(stop_cmd->completion); in xhci_endpoint_reset()
3266 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3269 ctrl_ctx = xhci_get_input_control_ctx(cfg_cmd->in_ctx); in xhci_endpoint_reset()
3271 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3278 xhci_setup_input_ctx_for_config_ep(xhci, cfg_cmd->in_ctx, vdev->out_ctx, in xhci_endpoint_reset()
3280 xhci_endpoint_copy(xhci, cfg_cmd->in_ctx, vdev->out_ctx, ep_index); in xhci_endpoint_reset()
3282 err = xhci_queue_configure_endpoint(xhci, cfg_cmd, cfg_cmd->in_ctx->dma, in xhci_endpoint_reset()
3283 udev->slot_id, false); in xhci_endpoint_reset()
3285 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3293 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3295 wait_for_completion(cfg_cmd->completion); in xhci_endpoint_reset()
3300 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3301 if (ep->ep_state & EP_SOFT_CLEAR_TOGGLE) in xhci_endpoint_reset()
3302 ep->ep_state &= ~EP_SOFT_CLEAR_TOGGLE; in xhci_endpoint_reset()
3303 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3315 return -EINVAL; in xhci_check_streams_endpoint()
3318 return ret ? ret : -EINVAL; in xhci_check_streams_endpoint()
3319 if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) { in xhci_check_streams_endpoint()
3322 ep->desc.bEndpointAddress); in xhci_check_streams_endpoint()
3323 return -EINVAL; in xhci_check_streams_endpoint()
3326 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_check_streams_endpoint()
3327 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state; in xhci_check_streams_endpoint()
3332 ep->desc.bEndpointAddress); in xhci_check_streams_endpoint()
3335 return -EINVAL; in xhci_check_streams_endpoint()
3337 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) { in xhci_check_streams_endpoint()
3340 ep->desc.bEndpointAddress); in xhci_check_streams_endpoint()
3341 return -EINVAL; in xhci_check_streams_endpoint()
3351 /* The stream context array size must be a power of two */ in xhci_calculate_streams_entries()
3359 max_streams = HCC_MAX_PSA(xhci->hcc_params); in xhci_calculate_streams_entries()
3384 eps[i], udev->slot_id); in xhci_calculate_streams_and_bitmask()
3388 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp); in xhci_calculate_streams_and_bitmask()
3389 if (max_streams < (*num_streams - 1)) { in xhci_calculate_streams_and_bitmask()
3391 eps[i]->desc.bEndpointAddress, in xhci_calculate_streams_and_bitmask()
3396 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc); in xhci_calculate_streams_and_bitmask()
3398 return -EINVAL; in xhci_calculate_streams_and_bitmask()
3414 slot_id = udev->slot_id; in xhci_calculate_no_streams_bitmask()
3415 if (!xhci->devs[slot_id]) in xhci_calculate_no_streams_bitmask()
3419 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_calculate_no_streams_bitmask()
3420 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state; in xhci_calculate_no_streams_bitmask()
3426 eps[i]->desc.bEndpointAddress); in xhci_calculate_no_streams_bitmask()
3435 eps[i]->desc.bEndpointAddress); in xhci_calculate_no_streams_bitmask()
3437 "with non-streams endpoint\n"); in xhci_calculate_no_streams_bitmask()
3440 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc); in xhci_calculate_no_streams_bitmask()
3477 return -EINVAL; in xhci_alloc_streams()
3488 if ((xhci->quirks & XHCI_BROKEN_STREAMS) || in xhci_alloc_streams()
3489 HCC_MAX_PSA(xhci->hcc_params) < 4) { in xhci_alloc_streams()
3491 return -ENOSYS; in xhci_alloc_streams()
3496 return -ENOMEM; in xhci_alloc_streams()
3498 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx); in xhci_alloc_streams()
3503 return -ENOMEM; in xhci_alloc_streams()
3510 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_streams()
3515 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3522 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3523 return -EINVAL; in xhci_alloc_streams()
3525 vdev = xhci->devs[udev->slot_id]; in xhci_alloc_streams()
3530 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3531 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS; in xhci_alloc_streams()
3533 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3544 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3545 max_packet = usb_endpoint_maxp(&eps[i]->desc); in xhci_alloc_streams()
3546 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci, in xhci_alloc_streams()
3550 if (!vdev->eps[ep_index].stream_info) in xhci_alloc_streams()
3561 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3562 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index); in xhci_alloc_streams()
3564 xhci_endpoint_copy(xhci, config_cmd->in_ctx, in xhci_alloc_streams()
3565 vdev->out_ctx, ep_index); in xhci_alloc_streams()
3567 vdev->eps[ep_index].stream_info); in xhci_alloc_streams()
3572 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx, in xhci_alloc_streams()
3573 vdev->out_ctx, ctrl_ctx, in xhci_alloc_streams()
3587 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_streams()
3589 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3590 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS; in xhci_alloc_streams()
3592 udev->slot_id, ep_index); in xhci_alloc_streams()
3593 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS; in xhci_alloc_streams()
3596 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3599 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3603 return num_streams - 1; in xhci_alloc_streams()
3608 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3609 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info); in xhci_alloc_streams()
3610 vdev->eps[ep_index].stream_info = NULL; in xhci_alloc_streams()
3614 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS; in xhci_alloc_streams()
3615 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS; in xhci_alloc_streams()
3619 return -ENOMEM; in xhci_alloc_streams()
3642 vdev = xhci->devs[udev->slot_id]; in xhci_free_streams()
3645 spin_lock_irqsave(&xhci->lock, flags); in xhci_free_streams()
3649 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3650 return -EINVAL; in xhci_free_streams()
3657 ep_index = xhci_get_endpoint_index(&eps[0]->desc); in xhci_free_streams()
3658 command = vdev->eps[ep_index].stream_info->free_streams_command; in xhci_free_streams()
3659 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_free_streams()
3661 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3664 return -EINVAL; in xhci_free_streams()
3670 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_free_streams()
3671 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index); in xhci_free_streams()
3672 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |= in xhci_free_streams()
3675 xhci_endpoint_copy(xhci, command->in_ctx, in xhci_free_streams()
3676 vdev->out_ctx, ep_index); in xhci_free_streams()
3678 &vdev->eps[ep_index]); in xhci_free_streams()
3680 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx, in xhci_free_streams()
3681 vdev->out_ctx, ctrl_ctx, in xhci_free_streams()
3683 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3697 spin_lock_irqsave(&xhci->lock, flags); in xhci_free_streams()
3699 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_free_streams()
3700 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info); in xhci_free_streams()
3701 vdev->eps[ep_index].stream_info = NULL; in xhci_free_streams()
3705 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS; in xhci_free_streams()
3706 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS; in xhci_free_streams()
3708 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3718 * Must be called with xhci->lock held.
3728 if (virt_dev->eps[i].ring) { in xhci_free_device_endpoint_resources()
3733 xhci->num_active_eps -= num_dropped_eps; in xhci_free_device_endpoint_resources()
3739 xhci->num_active_eps); in xhci_free_device_endpoint_resources()
3748 * xhci_address_device(), and then re-set up the configuration. If this is
3750 * settings will be re-installed through the normal bandwidth allocation
3759 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3760 * re-allocate the device.
3778 slot_id = udev->slot_id; in xhci_discover_or_reset_device()
3779 virt_dev = xhci->devs[slot_id]; in xhci_discover_or_reset_device()
3782 "not exist. Re-allocate the device\n", slot_id); in xhci_discover_or_reset_device()
3787 return -EINVAL; in xhci_discover_or_reset_device()
3790 if (virt_dev->tt_info) in xhci_discover_or_reset_device()
3791 old_active_eps = virt_dev->tt_info->active_eps; in xhci_discover_or_reset_device()
3793 if (virt_dev->udev != udev) { in xhci_discover_or_reset_device()
3796 * Re-allocate the device. in xhci_discover_or_reset_device()
3799 "not match the udev. Re-allocate the device\n", in xhci_discover_or_reset_device()
3805 return -EINVAL; in xhci_discover_or_reset_device()
3809 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_discover_or_reset_device()
3810 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) == in xhci_discover_or_reset_device()
3814 if (xhci->quirks & XHCI_ETRON_HOST) { in xhci_discover_or_reset_device()
3819 ret = xhci_disable_slot(xhci, udev->slot_id); in xhci_discover_or_reset_device()
3820 xhci_free_virt_device(xhci, udev->slot_id); in xhci_discover_or_reset_device()
3826 ret = -EINVAL; in xhci_discover_or_reset_device()
3843 return -ENOMEM; in xhci_discover_or_reset_device()
3847 spin_lock_irqsave(&xhci->lock, flags); in xhci_discover_or_reset_device()
3852 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_discover_or_reset_device()
3856 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_discover_or_reset_device()
3859 wait_for_completion(reset_device_cmd->completion); in xhci_discover_or_reset_device()
3865 ret = reset_device_cmd->status; in xhci_discover_or_reset_device()
3870 ret = -ETIME; in xhci_discover_or_reset_device()
3876 xhci_get_slot_state(xhci, virt_dev->out_ctx)); in xhci_discover_or_reset_device()
3889 ret = -EINVAL; in xhci_discover_or_reset_device()
3894 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { in xhci_discover_or_reset_device()
3895 spin_lock_irqsave(&xhci->lock, flags); in xhci_discover_or_reset_device()
3898 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_discover_or_reset_device()
3903 struct xhci_virt_ep *ep = &virt_dev->eps[i]; in xhci_discover_or_reset_device()
3905 if (ep->ep_state & EP_HAS_STREAMS) { in xhci_discover_or_reset_device()
3906 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n", in xhci_discover_or_reset_device()
3908 xhci_free_stream_info(xhci, ep->stream_info); in xhci_discover_or_reset_device()
3909 ep->stream_info = NULL; in xhci_discover_or_reset_device()
3910 ep->ep_state &= ~EP_HAS_STREAMS; in xhci_discover_or_reset_device()
3913 if (ep->ring) { in xhci_discover_or_reset_device()
3917 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list)) in xhci_discover_or_reset_device()
3919 &virt_dev->eps[i].bw_info, in xhci_discover_or_reset_device()
3920 virt_dev->bw_table, in xhci_discover_or_reset_device()
3922 &virt_dev->eps[i], in xhci_discover_or_reset_device()
3923 virt_dev->tt_info); in xhci_discover_or_reset_device()
3924 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info); in xhci_discover_or_reset_device()
3926 /* If necessary, update the number of active TTs on this root port */ in xhci_discover_or_reset_device()
3928 virt_dev->flags = 0; in xhci_discover_or_reset_device()
3954 if (xhci->quirks & XHCI_RESET_ON_RESUME) in xhci_free_dev()
3955 pm_runtime_put_noidle(hcd->self.controller); in xhci_free_dev()
3961 if (ret <= 0 && ret != -ENODEV) in xhci_free_dev()
3964 virt_dev = xhci->devs[udev->slot_id]; in xhci_free_dev()
3965 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_free_dev()
3970 virt_dev->eps[i].ep_state &= ~EP_STOP_CMD_PENDING; in xhci_free_dev()
3971 virt_dev->udev = NULL; in xhci_free_dev()
3972 xhci_disable_slot(xhci, udev->slot_id); in xhci_free_dev()
3974 spin_lock_irqsave(&xhci->lock, flags); in xhci_free_dev()
3975 xhci_free_virt_device(xhci, udev->slot_id); in xhci_free_dev()
3976 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_dev()
3989 return -ENOMEM; in xhci_disable_slot()
3993 spin_lock_irqsave(&xhci->lock, flags); in xhci_disable_slot()
3995 state = readl(&xhci->op_regs->status); in xhci_disable_slot()
3996 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) || in xhci_disable_slot()
3997 (xhci->xhc_state & XHCI_STATE_HALTED)) { in xhci_disable_slot()
3998 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_slot()
4000 return -ENODEV; in xhci_disable_slot()
4006 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_slot()
4011 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_slot()
4013 wait_for_completion(command->completion); in xhci_disable_slot()
4015 if (command->status != COMP_SUCCESS) in xhci_disable_slot()
4017 slot_id, command->status); in xhci_disable_slot()
4028 * Must be called with xhci->lock held.
4032 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) { in xhci_reserve_host_control_ep_resources()
4036 xhci->num_active_eps, xhci->limit_active_eps); in xhci_reserve_host_control_ep_resources()
4037 return -ENOMEM; in xhci_reserve_host_control_ep_resources()
4039 xhci->num_active_eps += 1; in xhci_reserve_host_control_ep_resources()
4042 xhci->num_active_eps); in xhci_reserve_host_control_ep_resources()
4049 * timed out, or allocating memory failed. Returns 1 on success.
4064 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_dev()
4067 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
4073 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
4075 wait_for_completion(command->completion); in xhci_alloc_dev()
4076 slot_id = command->slot_id; in xhci_alloc_dev()
4078 if (!slot_id || command->status != COMP_SUCCESS) { in xhci_alloc_dev()
4080 xhci_trb_comp_code_string(command->status)); in xhci_alloc_dev()
4083 readl(&xhci->cap_regs->hcs_params1))); in xhci_alloc_dev()
4090 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { in xhci_alloc_dev()
4091 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_dev()
4094 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
4097 xhci->num_active_eps); in xhci_alloc_dev()
4100 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
4110 vdev = xhci->devs[slot_id]; in xhci_alloc_dev()
4111 slot_ctx = xhci_get_slot_ctx(xhci, vdev->out_ctx); in xhci_alloc_dev()
4114 udev->slot_id = slot_id; in xhci_alloc_dev()
4122 if (xhci->quirks & XHCI_RESET_ON_RESUME) in xhci_alloc_dev()
4123 pm_runtime_get_noresume(hcd->self.controller); in xhci_alloc_dev()
4130 xhci_disable_slot(xhci, udev->slot_id); in xhci_alloc_dev()
4131 xhci_free_virt_device(xhci, udev->slot_id); in xhci_alloc_dev()
4137 * xhci_setup_device - issues an Address Device command to assign a unique
4159 mutex_lock(&xhci->mutex); in xhci_setup_device()
4161 if (xhci->xhc_state) { /* dying, removing or halted */ in xhci_setup_device()
4162 ret = -ESHUTDOWN; in xhci_setup_device()
4166 if (!udev->slot_id) { in xhci_setup_device()
4168 "Bad Slot ID %d", udev->slot_id); in xhci_setup_device()
4169 ret = -EINVAL; in xhci_setup_device()
4173 virt_dev = xhci->devs[udev->slot_id]; in xhci_setup_device()
4178 * a zero-dereference was observed once due to virt_dev = 0. in xhci_setup_device()
4182 udev->slot_id); in xhci_setup_device()
4183 ret = -EINVAL; in xhci_setup_device()
4186 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_setup_device()
4190 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) == in xhci_setup_device()
4199 ret = -ENOMEM; in xhci_setup_device()
4203 command->in_ctx = virt_dev->in_ctx; in xhci_setup_device()
4204 command->timeout_ms = timeout_ms; in xhci_setup_device()
4206 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); in xhci_setup_device()
4207 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx); in xhci_setup_device()
4211 ret = -EINVAL; in xhci_setup_device()
4215 * If this is the first Set Address since device plug-in or in xhci_setup_device()
4216 * virt_device realloaction after a resume with an xHCI power loss, in xhci_setup_device()
4219 if (!slot_ctx->dev_info) in xhci_setup_device()
4224 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG); in xhci_setup_device()
4225 ctrl_ctx->drop_flags = 0; in xhci_setup_device()
4227 trace_xhci_address_ctx(xhci, virt_dev->in_ctx, in xhci_setup_device()
4228 le32_to_cpu(slot_ctx->dev_info) >> 27); in xhci_setup_device()
4231 spin_lock_irqsave(&xhci->lock, flags); in xhci_setup_device()
4233 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma, in xhci_setup_device()
4234 udev->slot_id, setup); in xhci_setup_device()
4236 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_setup_device()
4242 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_setup_device()
4245 wait_for_completion(command->completion); in xhci_setup_device()
4249 * command on a timeout. in xhci_setup_device()
4251 switch (command->status) { in xhci_setup_device()
4255 ret = -ETIME; in xhci_setup_device()
4260 act, udev->slot_id); in xhci_setup_device()
4261 ret = -EINVAL; in xhci_setup_device()
4264 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act); in xhci_setup_device()
4266 mutex_unlock(&xhci->mutex); in xhci_setup_device()
4267 ret = xhci_disable_slot(xhci, udev->slot_id); in xhci_setup_device()
4268 xhci_free_virt_device(xhci, udev->slot_id); in xhci_setup_device()
4273 kfree(command->completion); in xhci_setup_device()
4275 return -EPROTO; in xhci_setup_device()
4277 dev_warn(&udev->dev, in xhci_setup_device()
4279 ret = -ENODEV; in xhci_setup_device()
4288 act, command->status); in xhci_setup_device()
4289 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1); in xhci_setup_device()
4290 ret = -EINVAL; in xhci_setup_device()
4295 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); in xhci_setup_device()
4300 udev->slot_id, in xhci_setup_device()
4301 &xhci->dcbaa->dev_context_ptrs[udev->slot_id], in xhci_setup_device()
4303 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id])); in xhci_setup_device()
4306 (unsigned long long)virt_dev->out_ctx->dma); in xhci_setup_device()
4307 trace_xhci_address_ctx(xhci, virt_dev->in_ctx, in xhci_setup_device()
4308 le32_to_cpu(slot_ctx->dev_info) >> 27); in xhci_setup_device()
4313 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, in xhci_setup_device()
4314 le32_to_cpu(slot_ctx->dev_info) >> 27); in xhci_setup_device()
4316 ctrl_ctx->add_flags = 0; in xhci_setup_device()
4317 ctrl_ctx->drop_flags = 0; in xhci_setup_device()
4318 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_setup_device()
4319 udev->devaddr = (u8)(le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK); in xhci_setup_device()
4323 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK); in xhci_setup_device()
4325 mutex_unlock(&xhci->mutex); in xhci_setup_device()
4327 kfree(command->completion); in xhci_setup_device()
4356 return rhub->ports[port1 - 1]->hw_portnum + 1; in xhci_find_raw_port_number()
4375 return -ENOMEM; in xhci_change_max_exit_latency()
4377 spin_lock_irqsave(&xhci->lock, flags); in xhci_change_max_exit_latency()
4379 virt_dev = xhci->devs[udev->slot_id]; in xhci_change_max_exit_latency()
4383 * xHC was re-initialized. Exit latency will be set later after in xhci_change_max_exit_latency()
4384 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated in xhci_change_max_exit_latency()
4387 if (!virt_dev || max_exit_latency == virt_dev->current_mel) { in xhci_change_max_exit_latency()
4388 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4394 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_change_max_exit_latency()
4396 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4400 return -ENOMEM; in xhci_change_max_exit_latency()
4403 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx); in xhci_change_max_exit_latency()
4404 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4406 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_change_max_exit_latency()
4407 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx); in xhci_change_max_exit_latency()
4408 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT)); in xhci_change_max_exit_latency()
4409 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency); in xhci_change_max_exit_latency()
4410 slot_ctx->dev_state = 0; in xhci_change_max_exit_latency()
4420 spin_lock_irqsave(&xhci->lock, flags); in xhci_change_max_exit_latency()
4421 virt_dev->current_mel = max_exit_latency; in xhci_change_max_exit_latency()
4422 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4444 u2del = HCS_U2_LATENCY(xhci->hcs_params3); in xhci_calculate_hird_besl()
4445 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); in xhci_calculate_hird_besl()
4461 besl_host = (u2del - 51) / 75 + 1; in xhci_calculate_hird_besl()
4479 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); in xhci_calculate_usb2_hw_lpm_params()
4482 l1 = udev->l1_params.timeout / 256; in xhci_calculate_usb2_hw_lpm_params()
4505 if (xhci->quirks & XHCI_HW_LPM_DISABLE) in xhci_set_usb2_hardware_lpm()
4506 return -EPERM; in xhci_set_usb2_hardware_lpm()
4508 if (hcd->speed >= HCD_USB3 || !xhci->hw_lpm_support || in xhci_set_usb2_hardware_lpm()
4509 !udev->lpm_capable) in xhci_set_usb2_hardware_lpm()
4510 return -EPERM; in xhci_set_usb2_hardware_lpm()
4512 if (!udev->parent || udev->parent->parent || in xhci_set_usb2_hardware_lpm()
4513 udev->descriptor.bDeviceClass == USB_CLASS_HUB) in xhci_set_usb2_hardware_lpm()
4514 return -EPERM; in xhci_set_usb2_hardware_lpm()
4516 if (udev->usb2_hw_lpm_capable != 1) in xhci_set_usb2_hardware_lpm()
4517 return -EPERM; in xhci_set_usb2_hardware_lpm()
4519 spin_lock_irqsave(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4521 ports = xhci->usb2_rhub.ports; in xhci_set_usb2_hardware_lpm()
4522 port_num = udev->portnum - 1; in xhci_set_usb2_hardware_lpm()
4523 pm_addr = ports[port_num]->addr + PORTPMSC; in xhci_set_usb2_hardware_lpm()
4525 hlpm_addr = ports[port_num]->addr + PORTHLPMC; in xhci_set_usb2_hardware_lpm()
4532 if (udev->usb2_hw_lpm_besl_capable) { in xhci_set_usb2_hardware_lpm()
4537 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); in xhci_set_usb2_hardware_lpm()
4542 hird = udev->l1_params.besl; in xhci_set_usb2_hardware_lpm()
4545 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4551 spin_lock_irqsave(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4562 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id); in xhci_set_usb2_hardware_lpm()
4574 if (udev->usb2_hw_lpm_besl_capable) { in xhci_set_usb2_hardware_lpm()
4575 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4577 readl_poll_timeout(ports[port_num]->addr, pm_val, in xhci_set_usb2_hardware_lpm()
4584 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4595 if (hcd->speed >= HCD_USB3 && !udev->parent->parent) { in xhci_update_device()
4596 port = xhci->usb3_rhub.ports[udev->portnum - 1]; in xhci_update_device()
4598 udev->tunnel_mode = xhci_port_is_tunneled(xhci, port); in xhci_update_device()
4599 if (udev->tunnel_mode == USB_LINK_UNKNOWN) in xhci_update_device()
4600 dev_dbg(&udev->dev, "link tunnel state unknown\n"); in xhci_update_device()
4601 else if (udev->tunnel_mode == USB_LINK_TUNNELED) in xhci_update_device()
4602 dev_dbg(&udev->dev, "tunneled over USB4 link\n"); in xhci_update_device()
4603 else if (udev->tunnel_mode == USB_LINK_NATIVE) in xhci_update_device()
4604 dev_dbg(&udev->dev, "native USB 3.x link\n"); in xhci_update_device()
4608 if (hcd->speed >= HCD_USB3 || !udev->lpm_capable || !xhci->hw_lpm_support) in xhci_update_device()
4611 /* we only support lpm for non-hub device connected to root hub yet */ in xhci_update_device()
4612 if (!udev->parent || udev->parent->parent || in xhci_update_device()
4613 udev->descriptor.bDeviceClass == USB_CLASS_HUB) in xhci_update_device()
4616 port = xhci->usb2_rhub.ports[udev->portnum - 1]; in xhci_update_device()
4617 capability = port->port_cap->protocol_caps; in xhci_update_device()
4620 udev->usb2_hw_lpm_capable = 1; in xhci_update_device()
4621 udev->l1_params.timeout = XHCI_L1_TIMEOUT; in xhci_update_device()
4622 udev->l1_params.besl = XHCI_DEFAULT_BESL; in xhci_update_device()
4624 udev->usb2_hw_lpm_besl_capable = 1; in xhci_update_device()
4630 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4632 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4636 return (1ULL << (desc->bInterval - 1)) * 125 * 1000; in xhci_service_interval_to_ns()
4642 unsigned long long sel; in xhci_get_timeout_no_hub_lpm() local
4649 /* Convert SEL and PEL stored in nanoseconds to microseconds */ in xhci_get_timeout_no_hub_lpm()
4650 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000); in xhci_get_timeout_no_hub_lpm()
4651 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000); in xhci_get_timeout_no_hub_lpm()
4656 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000); in xhci_get_timeout_no_hub_lpm()
4657 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000); in xhci_get_timeout_no_hub_lpm()
4662 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n", in xhci_get_timeout_no_hub_lpm()
4667 if (sel <= max_sel_pel && pel <= max_sel_pel) in xhci_get_timeout_no_hub_lpm()
4670 if (sel > max_sel_pel) in xhci_get_timeout_no_hub_lpm()
4671 dev_dbg(&udev->dev, "Device-initiated %s disabled " in xhci_get_timeout_no_hub_lpm()
4672 "due to long SEL %llu ms\n", in xhci_get_timeout_no_hub_lpm()
4673 state_name, sel); in xhci_get_timeout_no_hub_lpm()
4675 dev_dbg(&udev->dev, "Device-initiated %s disabled " in xhci_get_timeout_no_hub_lpm()
4682 * - For control endpoints, U1 system exit latency (SEL) * 3
4683 * - For bulk endpoints, U1 SEL * 5
4684 * - For interrupt endpoints:
4685 * - Notification EPs, U1 SEL * 3
4686 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4687 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4700 timeout_ns = udev->u1_params.sel * 3; in xhci_calculate_intel_u1_timeout()
4703 timeout_ns = udev->u1_params.sel * 5; in xhci_calculate_intel_u1_timeout()
4708 timeout_ns = udev->u1_params.sel * 3; in xhci_calculate_intel_u1_timeout()
4716 if (timeout_ns < udev->u1_params.sel * 2) in xhci_calculate_intel_u1_timeout()
4717 timeout_ns = udev->u1_params.sel * 2; in xhci_calculate_intel_u1_timeout()
4726 /* Returns the hub-encoded U1 timeout value. */
4735 if (xhci_service_interval_to_ns(desc) <= udev->u1_params.mel) { in xhci_calculate_u1_timeout()
4736 dev_dbg(&udev->dev, "Disable U1, ESIT shorter than exit latency\n"); in xhci_calculate_u1_timeout()
4741 if (xhci->quirks & (XHCI_INTEL_HOST | XHCI_ZHAOXIN_HOST)) in xhci_calculate_u1_timeout()
4744 timeout_ns = udev->u1_params.sel; in xhci_calculate_u1_timeout()
4755 * USB 3.0 hub, we have to disable hub-initiated U1. in xhci_calculate_u1_timeout()
4759 dev_dbg(&udev->dev, "Hub-initiated U1 disabled due to long timeout %lluus\n", in xhci_calculate_u1_timeout()
4765 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4766 * - largest bInterval of any active periodic endpoint (to avoid going
4767 * into lower power link states between intervals).
4768 * - the U2 Exit Latency of the device
4783 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL; in xhci_calculate_intel_u2_timeout()
4790 /* Returns the hub-encoded U2 timeout value. */
4799 if (xhci_service_interval_to_ns(desc) <= udev->u2_params.mel) { in xhci_calculate_u2_timeout()
4800 dev_dbg(&udev->dev, "Disable U2, ESIT shorter than exit latency\n"); in xhci_calculate_u2_timeout()
4805 if (xhci->quirks & (XHCI_INTEL_HOST | XHCI_ZHAOXIN_HOST)) in xhci_calculate_u2_timeout()
4808 timeout_ns = udev->u2_params.sel; in xhci_calculate_u2_timeout()
4813 * USB 3.0 hub, we have to disable hub-initiated U2. in xhci_calculate_u2_timeout()
4817 dev_dbg(&udev->dev, "Hub-initiated U2 disabled due to long timeout %lluus\n", in xhci_calculate_u2_timeout()
4847 /* If we found we can't enable hub-initiated LPM, and in xhci_update_timeout_for_endpoint()
4849 * device-initiated LPM as well, then we will disable LPM in xhci_update_timeout_for_endpoint()
4854 return -E2BIG; in xhci_update_timeout_for_endpoint()
4869 for (j = 0; j < alt->desc.bNumEndpoints; j++) { in xhci_update_timeout_for_interface()
4871 &alt->endpoint[j].desc, state, timeout)) in xhci_update_timeout_for_interface()
4872 return -E2BIG; in xhci_update_timeout_for_interface()
4881 struct usb_device *parent = udev->parent; in xhci_check_tier_policy()
4885 parent = parent->parent; in xhci_check_tier_policy()
4889 if (xhci->quirks & XHCI_INTEL_HOST && tier > 3) in xhci_check_tier_policy()
4891 if (xhci->quirks & XHCI_ZHAOXIN_HOST && tier > 2) in xhci_check_tier_policy()
4896 dev_dbg(&udev->dev, "Tier policy prevents U1/U2 LPM states for devices at tier %d\n", in xhci_check_tier_policy()
4898 return -E2BIG; in xhci_check_tier_policy()
4902 * If the tier check or timeout setting functions return with a non-zero exit
4920 dev_warn(&udev->dev, "Can't enable unknown link state %i\n", in xhci_calculate_lpm_timeout()
4928 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc, in xhci_calculate_lpm_timeout()
4932 config = udev->actconfig; in xhci_calculate_lpm_timeout()
4936 for (i = 0; i < config->desc.bNumInterfaces; i++) { in xhci_calculate_lpm_timeout()
4938 struct usb_interface *intf = config->interface[i]; in xhci_calculate_lpm_timeout()
4943 /* Check if any currently bound drivers want hub-initiated LPM in xhci_calculate_lpm_timeout()
4946 if (intf->dev.driver) { in xhci_calculate_lpm_timeout()
4947 driver = to_usb_driver(intf->dev.driver); in xhci_calculate_lpm_timeout()
4948 if (driver && driver->disable_hub_initiated_lpm) { in xhci_calculate_lpm_timeout()
4949 dev_dbg(&udev->dev, "Hub-initiated %s disabled at request of driver %s\n", in xhci_calculate_lpm_timeout()
4950 state_name, driver->name); in xhci_calculate_lpm_timeout()
4959 if (!intf->cur_altsetting) in xhci_calculate_lpm_timeout()
4963 intf->cur_altsetting, in xhci_calculate_lpm_timeout()
4995 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) || in calculate_max_exit_latency()
4997 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000); in calculate_max_exit_latency()
4998 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) || in calculate_max_exit_latency()
5000 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000); in calculate_max_exit_latency()
5006 dev_warn(&udev->dev, "Link PM max exit latency of %lluus " in calculate_max_exit_latency()
5008 return -E2BIG; in calculate_max_exit_latency()
5013 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
5024 /* The LPM timeout values are pretty host-controller specific, so don't in xhci_enable_usb3_lpm_timeout()
5025 * enable hub-initiated timeouts unless the vendor has provided in xhci_enable_usb3_lpm_timeout()
5028 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) || in xhci_enable_usb3_lpm_timeout()
5029 !xhci->devs[udev->slot_id]) in xhci_enable_usb3_lpm_timeout()
5036 if (udev->parent && !udev->parent->parent) { in xhci_enable_usb3_lpm_timeout()
5037 port = xhci->usb3_rhub.ports[udev->portnum - 1]; in xhci_enable_usb3_lpm_timeout()
5038 if (port->lpm_incapable) in xhci_enable_usb3_lpm_timeout()
5063 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) || in xhci_disable_usb3_lpm_timeout()
5064 !xhci->devs[udev->slot_id]) in xhci_disable_usb3_lpm_timeout()
5096 /*-------------------------------------------------------------------------*/
5113 /* Ignore root hubs */ in xhci_update_hub_device()
5114 if (!hdev->parent) in xhci_update_hub_device()
5117 vdev = xhci->devs[hdev->slot_id]; in xhci_update_hub_device()
5120 return -EINVAL; in xhci_update_hub_device()
5125 return -ENOMEM; in xhci_update_hub_device()
5127 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx); in xhci_update_hub_device()
5132 return -ENOMEM; in xhci_update_hub_device()
5135 spin_lock_irqsave(&xhci->lock, flags); in xhci_update_hub_device()
5136 if (hdev->speed == USB_SPEED_HIGH && in xhci_update_hub_device()
5140 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_update_hub_device()
5141 return -ENOMEM; in xhci_update_hub_device()
5144 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx); in xhci_update_hub_device()
5145 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_update_hub_device()
5146 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx); in xhci_update_hub_device()
5147 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB); in xhci_update_hub_device()
5153 if (tt->multi) in xhci_update_hub_device()
5154 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT); in xhci_update_hub_device()
5155 else if (hdev->speed == USB_SPEED_FULL) in xhci_update_hub_device()
5156 slot_ctx->dev_info &= cpu_to_le32(~DEV_MTT); in xhci_update_hub_device()
5158 if (xhci->hci_version > 0x95) { in xhci_update_hub_device()
5161 (unsigned int) xhci->hci_version); in xhci_update_hub_device()
5162 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild)); in xhci_update_hub_device()
5163 /* Set TT think time - convert from ns to FS bit times. in xhci_update_hub_device()
5168 * High-spped hub. in xhci_update_hub_device()
5170 think_time = tt->think_time; in xhci_update_hub_device()
5172 think_time = (think_time / 666) - 1; in xhci_update_hub_device()
5173 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH) in xhci_update_hub_device()
5174 slot_ctx->tt_info |= in xhci_update_hub_device()
5179 (unsigned int) xhci->hci_version); in xhci_update_hub_device()
5181 slot_ctx->dev_state = 0; in xhci_update_hub_device()
5182 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_update_hub_device()
5185 (xhci->hci_version > 0x95) ? in xhci_update_hub_device()
5191 if (xhci->hci_version > 0x95) in xhci_update_hub_device()
5207 return readl(&xhci->run_regs->microframe_index) >> 3; in xhci_get_frame()
5212 xhci->usb2_rhub.hcd = hcd; in xhci_hcd_init_usb2_data()
5213 hcd->speed = HCD_USB2; in xhci_hcd_init_usb2_data()
5214 hcd->self.root_hub->speed = USB_SPEED_HIGH; in xhci_hcd_init_usb2_data()
5220 hcd->has_tt = 1; in xhci_hcd_init_usb2_data()
5230 * is a two digit BCD containig minor and sub-minor numbers. in xhci_hcd_init_usb3_data()
5236 if (xhci->usb3_rhub.min_rev == 0x1) in xhci_hcd_init_usb3_data()
5239 minor_rev = xhci->usb3_rhub.min_rev / 0x10; in xhci_hcd_init_usb3_data()
5243 hcd->speed = HCD_USB32; in xhci_hcd_init_usb3_data()
5244 hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS; in xhci_hcd_init_usb3_data()
5245 hcd->self.root_hub->rx_lanes = 2; in xhci_hcd_init_usb3_data()
5246 hcd->self.root_hub->tx_lanes = 2; in xhci_hcd_init_usb3_data()
5247 hcd->self.root_hub->ssp_rate = USB_SSP_GEN_2x2; in xhci_hcd_init_usb3_data()
5250 hcd->speed = HCD_USB31; in xhci_hcd_init_usb3_data()
5251 hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS; in xhci_hcd_init_usb3_data()
5252 hcd->self.root_hub->ssp_rate = USB_SSP_GEN_2x1; in xhci_hcd_init_usb3_data()
5258 xhci->usb3_rhub.hcd = hcd; in xhci_hcd_init_usb3_data()
5268 struct device *dev = hcd->self.sysdev; in xhci_gen_setup()
5271 /* Accept arbitrarily long scatter-gather lists */ in xhci_gen_setup()
5272 hcd->self.sg_tablesize = ~0; in xhci_gen_setup()
5275 hcd->self.no_sg_constraint = 1; in xhci_gen_setup()
5277 /* XHCI controllers don't stop the ep queue on short packets :| */ in xhci_gen_setup()
5278 hcd->self.no_stop_on_short = 1; in xhci_gen_setup()
5287 mutex_init(&xhci->mutex); in xhci_gen_setup()
5288 xhci->main_hcd = hcd; in xhci_gen_setup()
5289 xhci->cap_regs = hcd->regs; in xhci_gen_setup()
5290 xhci->op_regs = hcd->regs + in xhci_gen_setup()
5291 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase)); in xhci_gen_setup()
5292 xhci->run_regs = hcd->regs + in xhci_gen_setup()
5293 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK); in xhci_gen_setup()
5294 /* Cache read-only capability registers */ in xhci_gen_setup()
5295 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1); in xhci_gen_setup()
5296 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2); in xhci_gen_setup()
5297 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3); in xhci_gen_setup()
5298 xhci->hci_version = HC_VERSION(readl(&xhci->cap_regs->hc_capbase)); in xhci_gen_setup()
5299 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params); in xhci_gen_setup()
5300 if (xhci->hci_version > 0x100) in xhci_gen_setup()
5301 xhci->hcc_params2 = readl(&xhci->cap_regs->hcc_params2); in xhci_gen_setup()
5303 /* xhci-plat or xhci-pci might have set max_interrupters already */ in xhci_gen_setup()
5304 if ((!xhci->max_interrupters) || in xhci_gen_setup()
5305 xhci->max_interrupters > HCS_MAX_INTRS(xhci->hcs_params1)) in xhci_gen_setup()
5306 xhci->max_interrupters = HCS_MAX_INTRS(xhci->hcs_params1); in xhci_gen_setup()
5308 xhci->quirks |= quirks; in xhci_gen_setup()
5314 * success event after a short transfer. This quirk will ignore such in xhci_gen_setup()
5317 if (xhci->hci_version > 0x96) in xhci_gen_setup()
5318 xhci->quirks |= XHCI_SPURIOUS_SUCCESS; in xhci_gen_setup()
5320 if (xhci->hci_version == 0x95 && link_quirk) { in xhci_gen_setup()
5322 xhci->quirks |= XHCI_LINK_TRB_QUIRK; in xhci_gen_setup()
5340 * On some xHCI controllers (e.g. R-Car SoCs), the AC64 bit (bit 0) in xhci_gen_setup()
5341 * of HCCPARAMS1 is set to 1. However, the xHCs don't support 64-bit in xhci_gen_setup()
5343 * bit of xhci->hcc_params to call dma_set_coherent_mask(dev, in xhci_gen_setup()
5346 if (xhci->quirks & XHCI_NO_64BIT_SUPPORT) in xhci_gen_setup()
5347 xhci->hcc_params &= ~BIT(0); in xhci_gen_setup()
5349 /* Set dma_mask and coherent_dma_mask to 64-bits, in xhci_gen_setup()
5350 * if xHC supports 64-bit addressing */ in xhci_gen_setup()
5351 if (HCC_64BIT_ADDR(xhci->hcc_params) && in xhci_gen_setup()
5353 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n"); in xhci_gen_setup()
5357 * This is to avoid error in cases where a 32-bit USB in xhci_gen_setup()
5358 * controller is used on a 64-bit capable system. in xhci_gen_setup()
5363 xhci_dbg(xhci, "Enabling 32-bit DMA addresses.\n"); in xhci_gen_setup()
5380 xhci->hcc_params, xhci->hci_version, xhci->quirks); in xhci_gen_setup()
5397 spin_lock_irqsave(&xhci->lock, flags); in xhci_clear_tt_buffer_complete()
5398 udev = (struct usb_device *)ep->hcpriv; in xhci_clear_tt_buffer_complete()
5399 slot_id = udev->slot_id; in xhci_clear_tt_buffer_complete()
5400 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_clear_tt_buffer_complete()
5402 xhci->devs[slot_id]->eps[ep_index].ep_state &= ~EP_CLEARING_TT; in xhci_clear_tt_buffer_complete()
5404 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_clear_tt_buffer_complete()
5408 .description = "xhci-hcd",
5483 drv->hcd_priv_size += over->extra_priv_size; in xhci_init_driver()
5484 if (over->reset) in xhci_init_driver()
5485 drv->reset = over->reset; in xhci_init_driver()
5486 if (over->start) in xhci_init_driver()
5487 drv->start = over->start; in xhci_init_driver()
5488 if (over->add_endpoint) in xhci_init_driver()
5489 drv->add_endpoint = over->add_endpoint; in xhci_init_driver()
5490 if (over->drop_endpoint) in xhci_init_driver()
5491 drv->drop_endpoint = over->drop_endpoint; in xhci_init_driver()
5492 if (over->check_bandwidth) in xhci_init_driver()
5493 drv->check_bandwidth = over->check_bandwidth; in xhci_init_driver()
5494 if (over->reset_bandwidth) in xhci_init_driver()
5495 drv->reset_bandwidth = over->reset_bandwidth; in xhci_init_driver()
5496 if (over->update_hub_device) in xhci_init_driver()
5497 drv->update_hub_device = over->update_hub_device; in xhci_init_driver()
5498 if (over->hub_control) in xhci_init_driver()
5499 drv->hub_control = over->hub_control; in xhci_init_driver()
5529 return -ENODEV; in xhci_hcd_init()