Lines Matching +full:mac +full:- +full:clk +full:- +full:tx
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org>
5 * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org>
6 * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com>
16 #include <linux/clk.h>
24 #include <linux/pcs/pcs-mtk-lynxi.h>
34 static int mtk_msg_level = -1;
36 MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)");
290 __raw_writel(val, eth->base + reg); in mtk_w32()
295 return __raw_readl(eth->base + reg); in mtk_r32()
321 dev_err(eth->dev, "mdio: MDIO timeout\n"); in mtk_mdio_busy_wait()
322 return -ETIMEDOUT; in mtk_mdio_busy_wait()
445 struct mtk_eth *eth = bus->priv; in mtk_mdio_write_c22()
453 struct mtk_eth *eth = bus->priv; in mtk_mdio_write_c45()
460 struct mtk_eth *eth = bus->priv; in mtk_mdio_read_c22()
468 struct mtk_eth *eth = bus->priv; in mtk_mdio_read_c45()
481 regmap_update_bits(eth->ethsys, ETHSYS_CLKCFG0, in mt7621_gmac0_rgmii_adjust()
494 ret = clk_set_rate(eth->clks[MTK_CLK_TRGPLL], 500000000); in mtk_gmac0_rgmii_adjust()
496 dev_err(eth->dev, "Failed to set trgmii pll: %d\n", ret); in mtk_gmac0_rgmii_adjust()
500 dev_err(eth->dev, "Missing PLL configuration, ethernet may not work\n"); in mtk_gmac0_rgmii_adjust()
519 struct mtk_mac *mac = container_of(config, struct mtk_mac, in mtk_mac_select_pcs() local
521 struct mtk_eth *eth = mac->hw; in mtk_mac_select_pcs()
526 sid = (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_SGMII)) ? in mtk_mac_select_pcs()
527 0 : mac->id; in mtk_mac_select_pcs()
529 return eth->sgmii_pcs[sid]; in mtk_mac_select_pcs()
538 struct mtk_mac *mac = container_of(config, struct mtk_mac, in mtk_mac_config() local
540 struct mtk_eth *eth = mac->hw; in mtk_mac_config()
544 /* MT76x8 has no hardware settings between for the MAC */ in mtk_mac_config()
545 if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) && in mtk_mac_config()
546 mac->interface != state->interface) { in mtk_mac_config()
548 switch (state->interface) { in mtk_mac_config()
555 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RGMII)) { in mtk_mac_config()
556 err = mtk_gmac_rgmii_path_setup(eth, mac->id); in mtk_mac_config()
564 err = mtk_gmac_sgmii_path_setup(eth, mac->id); in mtk_mac_config()
569 if (MTK_HAS_CAPS(eth->soc->caps, MTK_GEPHY)) { in mtk_mac_config()
570 err = mtk_gmac_gephy_path_setup(eth, mac->id); in mtk_mac_config()
582 if (!mac->id && state->interface != PHY_INTERFACE_MODE_SGMII && in mtk_mac_config()
583 !phy_interface_mode_is_8023z(state->interface) && in mtk_mac_config()
584 MTK_HAS_CAPS(mac->hw->soc->caps, MTK_GMAC1_TRGMII)) { in mtk_mac_config()
585 if (MTK_HAS_CAPS(mac->hw->soc->caps, in mtk_mac_config()
587 if (mt7621_gmac0_rgmii_adjust(mac->hw, in mtk_mac_config()
588 state->interface)) in mtk_mac_config()
591 mtk_gmac0_rgmii_adjust(mac->hw, in mtk_mac_config()
592 state->interface); in mtk_mac_config()
596 mtk_w32(mac->hw, in mtk_mac_config()
601 mtk_m32(mac->hw, 0, RXC_RST | RXC_DQSISEL, in mtk_mac_config()
603 mtk_m32(mac->hw, RXC_RST, 0, TRGMII_RCK_CTRL); in mtk_mac_config()
607 switch (state->interface) { in mtk_mac_config()
618 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in mtk_mac_config()
619 val &= ~SYSCFG0_GE_MODE(SYSCFG0_GE_MASK, mac->id); in mtk_mac_config()
620 val |= SYSCFG0_GE_MODE(ge_mode, mac->id); in mtk_mac_config()
621 regmap_write(eth->ethsys, ETHSYS_SYSCFG0, val); in mtk_mac_config()
623 mac->interface = state->interface; in mtk_mac_config()
627 if (state->interface == PHY_INTERFACE_MODE_SGMII || in mtk_mac_config()
628 phy_interface_mode_is_8023z(state->interface)) { in mtk_mac_config()
632 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in mtk_mac_config()
634 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in mtk_mac_config()
639 mac->syscfg0 = val; in mtk_mac_config()
641 dev_err(eth->dev, in mtk_mac_config()
642 "In-band mode not supported in non SGMII mode!\n"); in mtk_mac_config()
648 mac->interface == PHY_INTERFACE_MODE_INTERNAL) { in mtk_mac_config()
649 mtk_w32(mac->hw, MTK_GDMA_XGDM_SEL, MTK_GDMA_EG_CTRL(mac->id)); in mtk_mac_config()
650 mtk_w32(mac->hw, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(mac->id)); in mtk_mac_config()
658 dev_err(eth->dev, "%s: GMAC%d mode %s not supported!\n", __func__, in mtk_mac_config()
659 mac->id, phy_modes(state->interface)); in mtk_mac_config()
663 dev_err(eth->dev, "%s: GMAC%d mode %s err: %d!\n", __func__, in mtk_mac_config()
664 mac->id, phy_modes(state->interface), err); in mtk_mac_config()
670 struct mtk_mac *mac = container_of(config, struct mtk_mac, in mtk_mac_finish() local
672 struct mtk_eth *eth = mac->hw; in mtk_mac_finish()
678 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in mtk_mac_finish()
679 SYSCFG0_SGMII_MASK, mac->syscfg0); in mtk_mac_finish()
682 mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); in mtk_mac_finish()
689 mtk_w32(mac->hw, mcr_new, MTK_MAC_MCR(mac->id)); in mtk_mac_finish()
697 struct mtk_mac *mac = container_of(config, struct mtk_mac, in mtk_mac_link_down() local
699 u32 mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); in mtk_mac_link_down()
702 mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); in mtk_mac_link_down()
708 const struct mtk_soc_data *soc = eth->soc; in mtk_set_queue_speed()
711 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) in mtk_set_queue_speed()
771 mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs); in mtk_set_queue_speed()
779 struct mtk_mac *mac = container_of(config, struct mtk_mac, in mtk_mac_link_up() local
783 mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); in mtk_mac_link_up()
789 mac->speed = speed; in mtk_mac_link_up()
804 /* Configure pause modes - phylink will avoid these for half duplex */ in mtk_mac_link_up()
811 mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); in mtk_mac_link_up()
816 struct mtk_mac *mac = container_of(config, struct mtk_mac, in mtk_mac_disable_tx_lpi() local
818 struct mtk_eth *eth = mac->hw; in mtk_mac_disable_tx_lpi()
820 mtk_m32(eth, MAC_MCR_EEE100M | MAC_MCR_EEE1G, 0, MTK_MAC_MCR(mac->id)); in mtk_mac_disable_tx_lpi()
826 struct mtk_mac *mac = container_of(config, struct mtk_mac, in mtk_mac_enable_tx_lpi() local
828 struct mtk_eth *eth = mac->hw; in mtk_mac_enable_tx_lpi()
831 /* Tx idle timer in ms */ in mtk_mac_enable_tx_lpi()
848 /* PHY Wake-up time, this field does not have a reset value, so use the in mtk_mac_enable_tx_lpi()
854 mtk_w32(eth, val, MTK_MAC_EEECR(mac->id)); in mtk_mac_enable_tx_lpi()
855 mtk_m32(eth, 0, MAC_MCR_EEE100M | MAC_MCR_EEE1G, MTK_MAC_MCR(mac->id)); in mtk_mac_enable_tx_lpi()
875 val = FIELD_PREP(PPSC_MDC_CFG, eth->mdc_divider); in mtk_mdio_config()
893 mii_np = of_get_available_child_by_name(eth->dev->of_node, "mdio-bus"); in mtk_mdio_init()
895 dev_err(eth->dev, "no %s child node found", "mdio-bus"); in mtk_mdio_init()
896 return -ENODEV; in mtk_mdio_init()
899 eth->mii_bus = devm_mdiobus_alloc(eth->dev); in mtk_mdio_init()
900 if (!eth->mii_bus) { in mtk_mdio_init()
901 ret = -ENOMEM; in mtk_mdio_init()
905 eth->mii_bus->name = "mdio"; in mtk_mdio_init()
906 eth->mii_bus->read = mtk_mdio_read_c22; in mtk_mdio_init()
907 eth->mii_bus->write = mtk_mdio_write_c22; in mtk_mdio_init()
908 eth->mii_bus->read_c45 = mtk_mdio_read_c45; in mtk_mdio_init()
909 eth->mii_bus->write_c45 = mtk_mdio_write_c45; in mtk_mdio_init()
910 eth->mii_bus->priv = eth; in mtk_mdio_init()
911 eth->mii_bus->parent = eth->dev; in mtk_mdio_init()
913 snprintf(eth->mii_bus->id, MII_BUS_ID_SIZE, "%pOFn", mii_np); in mtk_mdio_init()
915 if (!of_property_read_u32(mii_np, "clock-frequency", &val)) { in mtk_mdio_init()
917 dev_err(eth->dev, "MDIO clock frequency out of range"); in mtk_mdio_init()
918 ret = -EINVAL; in mtk_mdio_init()
923 eth->mdc_divider = min_t(unsigned int, DIV_ROUND_UP(MDC_MAX_FREQ, max_clk), 63); in mtk_mdio_init()
925 dev_dbg(eth->dev, "MDC is running on %d Hz\n", MDC_MAX_FREQ / eth->mdc_divider); in mtk_mdio_init()
926 ret = of_mdiobus_register(eth->mii_bus, mii_np); in mtk_mdio_init()
935 if (!eth->mii_bus) in mtk_mdio_cleanup()
938 mdiobus_unregister(eth->mii_bus); in mtk_mdio_cleanup()
946 spin_lock_irqsave(ð->tx_irq_lock, flags); in mtk_tx_irq_disable()
947 val = mtk_r32(eth, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_disable()
948 mtk_w32(eth, val & ~mask, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_disable()
949 spin_unlock_irqrestore(ð->tx_irq_lock, flags); in mtk_tx_irq_disable()
957 spin_lock_irqsave(ð->tx_irq_lock, flags); in mtk_tx_irq_enable()
958 val = mtk_r32(eth, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_enable()
959 mtk_w32(eth, val | mask, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_enable()
960 spin_unlock_irqrestore(ð->tx_irq_lock, flags); in mtk_tx_irq_enable()
968 spin_lock_irqsave(ð->rx_irq_lock, flags); in mtk_rx_irq_disable()
969 val = mtk_r32(eth, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_disable()
970 mtk_w32(eth, val & ~mask, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_disable()
971 spin_unlock_irqrestore(ð->rx_irq_lock, flags); in mtk_rx_irq_disable()
979 spin_lock_irqsave(ð->rx_irq_lock, flags); in mtk_rx_irq_enable()
980 val = mtk_r32(eth, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_enable()
981 mtk_w32(eth, val | mask, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_enable()
982 spin_unlock_irqrestore(ð->rx_irq_lock, flags); in mtk_rx_irq_enable()
988 struct mtk_mac *mac = netdev_priv(dev); in mtk_set_mac_address() local
989 struct mtk_eth *eth = mac->hw; in mtk_set_mac_address()
990 const char *macaddr = dev->dev_addr; in mtk_set_mac_address()
995 if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) in mtk_set_mac_address()
996 return -EBUSY; in mtk_set_mac_address()
998 spin_lock_bh(&mac->hw->page_lock); in mtk_set_mac_address()
999 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { in mtk_set_mac_address()
1000 mtk_w32(mac->hw, (macaddr[0] << 8) | macaddr[1], in mtk_set_mac_address()
1002 mtk_w32(mac->hw, (macaddr[2] << 24) | (macaddr[3] << 16) | in mtk_set_mac_address()
1006 mtk_w32(mac->hw, (macaddr[0] << 8) | macaddr[1], in mtk_set_mac_address()
1007 MTK_GDMA_MAC_ADRH(mac->id)); in mtk_set_mac_address()
1008 mtk_w32(mac->hw, (macaddr[2] << 24) | (macaddr[3] << 16) | in mtk_set_mac_address()
1010 MTK_GDMA_MAC_ADRL(mac->id)); in mtk_set_mac_address()
1012 spin_unlock_bh(&mac->hw->page_lock); in mtk_set_mac_address()
1017 void mtk_stats_update_mac(struct mtk_mac *mac) in mtk_stats_update_mac() argument
1019 struct mtk_hw_stats *hw_stats = mac->hw_stats; in mtk_stats_update_mac()
1020 struct mtk_eth *eth = mac->hw; in mtk_stats_update_mac()
1022 u64_stats_update_begin(&hw_stats->syncp); in mtk_stats_update_mac()
1024 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { in mtk_stats_update_mac()
1025 hw_stats->tx_packets += mtk_r32(mac->hw, MT7628_SDM_TPCNT); in mtk_stats_update_mac()
1026 hw_stats->tx_bytes += mtk_r32(mac->hw, MT7628_SDM_TBCNT); in mtk_stats_update_mac()
1027 hw_stats->rx_packets += mtk_r32(mac->hw, MT7628_SDM_RPCNT); in mtk_stats_update_mac()
1028 hw_stats->rx_bytes += mtk_r32(mac->hw, MT7628_SDM_RBCNT); in mtk_stats_update_mac()
1029 hw_stats->rx_checksum_errors += in mtk_stats_update_mac()
1030 mtk_r32(mac->hw, MT7628_SDM_CS_ERR); in mtk_stats_update_mac()
1032 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_stats_update_mac()
1033 unsigned int offs = hw_stats->reg_offset; in mtk_stats_update_mac()
1036 hw_stats->rx_bytes += mtk_r32(mac->hw, reg_map->gdm1_cnt + offs); in mtk_stats_update_mac()
1037 stats = mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x4 + offs); in mtk_stats_update_mac()
1039 hw_stats->rx_bytes += (stats << 32); in mtk_stats_update_mac()
1040 hw_stats->rx_packets += in mtk_stats_update_mac()
1041 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x8 + offs); in mtk_stats_update_mac()
1042 hw_stats->rx_overflow += in mtk_stats_update_mac()
1043 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x10 + offs); in mtk_stats_update_mac()
1044 hw_stats->rx_fcs_errors += in mtk_stats_update_mac()
1045 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x14 + offs); in mtk_stats_update_mac()
1046 hw_stats->rx_short_errors += in mtk_stats_update_mac()
1047 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x18 + offs); in mtk_stats_update_mac()
1048 hw_stats->rx_long_errors += in mtk_stats_update_mac()
1049 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x1c + offs); in mtk_stats_update_mac()
1050 hw_stats->rx_checksum_errors += in mtk_stats_update_mac()
1051 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x20 + offs); in mtk_stats_update_mac()
1052 hw_stats->rx_flow_control_packets += in mtk_stats_update_mac()
1053 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x24 + offs); in mtk_stats_update_mac()
1056 hw_stats->tx_skip += in mtk_stats_update_mac()
1057 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x50 + offs); in mtk_stats_update_mac()
1058 hw_stats->tx_collisions += in mtk_stats_update_mac()
1059 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x54 + offs); in mtk_stats_update_mac()
1060 hw_stats->tx_bytes += in mtk_stats_update_mac()
1061 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x40 + offs); in mtk_stats_update_mac()
1062 stats = mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x44 + offs); in mtk_stats_update_mac()
1064 hw_stats->tx_bytes += (stats << 32); in mtk_stats_update_mac()
1065 hw_stats->tx_packets += in mtk_stats_update_mac()
1066 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x48 + offs); in mtk_stats_update_mac()
1068 hw_stats->tx_skip += in mtk_stats_update_mac()
1069 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x28 + offs); in mtk_stats_update_mac()
1070 hw_stats->tx_collisions += in mtk_stats_update_mac()
1071 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x2c + offs); in mtk_stats_update_mac()
1072 hw_stats->tx_bytes += in mtk_stats_update_mac()
1073 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x30 + offs); in mtk_stats_update_mac()
1074 stats = mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x34 + offs); in mtk_stats_update_mac()
1076 hw_stats->tx_bytes += (stats << 32); in mtk_stats_update_mac()
1077 hw_stats->tx_packets += in mtk_stats_update_mac()
1078 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x38 + offs); in mtk_stats_update_mac()
1082 u64_stats_update_end(&hw_stats->syncp); in mtk_stats_update_mac()
1090 if (!eth->mac[i] || !eth->mac[i]->hw_stats) in mtk_stats_update()
1092 if (spin_trylock(ð->mac[i]->hw_stats->stats_lock)) { in mtk_stats_update()
1093 mtk_stats_update_mac(eth->mac[i]); in mtk_stats_update()
1094 spin_unlock(ð->mac[i]->hw_stats->stats_lock); in mtk_stats_update()
1102 struct mtk_mac *mac = netdev_priv(dev); in mtk_get_stats64() local
1103 struct mtk_hw_stats *hw_stats = mac->hw_stats; in mtk_get_stats64()
1107 if (spin_trylock_bh(&hw_stats->stats_lock)) { in mtk_get_stats64()
1108 mtk_stats_update_mac(mac); in mtk_get_stats64()
1109 spin_unlock_bh(&hw_stats->stats_lock); in mtk_get_stats64()
1114 start = u64_stats_fetch_begin(&hw_stats->syncp); in mtk_get_stats64()
1115 storage->rx_packets = hw_stats->rx_packets; in mtk_get_stats64()
1116 storage->tx_packets = hw_stats->tx_packets; in mtk_get_stats64()
1117 storage->rx_bytes = hw_stats->rx_bytes; in mtk_get_stats64()
1118 storage->tx_bytes = hw_stats->tx_bytes; in mtk_get_stats64()
1119 storage->collisions = hw_stats->tx_collisions; in mtk_get_stats64()
1120 storage->rx_length_errors = hw_stats->rx_short_errors + in mtk_get_stats64()
1121 hw_stats->rx_long_errors; in mtk_get_stats64()
1122 storage->rx_over_errors = hw_stats->rx_overflow; in mtk_get_stats64()
1123 storage->rx_crc_errors = hw_stats->rx_fcs_errors; in mtk_get_stats64()
1124 storage->rx_errors = hw_stats->rx_checksum_errors; in mtk_get_stats64()
1125 storage->tx_aborted_errors = hw_stats->tx_skip; in mtk_get_stats64()
1126 } while (u64_stats_fetch_retry(&hw_stats->syncp, start)); in mtk_get_stats64()
1128 storage->tx_errors = dev->stats.tx_errors; in mtk_get_stats64()
1129 storage->rx_dropped = dev->stats.rx_dropped; in mtk_get_stats64()
1130 storage->tx_dropped = dev->stats.tx_dropped; in mtk_get_stats64()
1137 mtu = MTK_MAX_RX_LENGTH_2K - MTK_RX_ETH_HLEN; in mtk_max_frag_size()
1145 int buf_size = frag_size - NET_SKB_PAD - NET_IP_ALIGN - in mtk_max_buf_size()
1156 rxd->rxd2 = READ_ONCE(dma_rxd->rxd2); in mtk_rx_get_desc()
1157 if (!(rxd->rxd2 & RX_DMA_DONE)) in mtk_rx_get_desc()
1160 rxd->rxd1 = READ_ONCE(dma_rxd->rxd1); in mtk_rx_get_desc()
1161 rxd->rxd3 = READ_ONCE(dma_rxd->rxd3); in mtk_rx_get_desc()
1162 rxd->rxd4 = READ_ONCE(dma_rxd->rxd4); in mtk_rx_get_desc()
1164 rxd->rxd5 = READ_ONCE(dma_rxd->rxd5); in mtk_rx_get_desc()
1165 rxd->rxd6 = READ_ONCE(dma_rxd->rxd6); in mtk_rx_get_desc()
1185 const struct mtk_soc_data *soc = eth->soc; in mtk_init_fq_dma()
1187 int cnt = soc->tx.fq_dma_size; in mtk_init_fq_dma()
1191 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM)) in mtk_init_fq_dma()
1192 eth->scratch_ring = eth->sram_base; in mtk_init_fq_dma()
1194 eth->scratch_ring = dma_alloc_coherent(eth->dma_dev, in mtk_init_fq_dma()
1195 cnt * soc->tx.desc_size, in mtk_init_fq_dma()
1196 ð->phy_scratch_ring, in mtk_init_fq_dma()
1199 if (unlikely(!eth->scratch_ring)) in mtk_init_fq_dma()
1200 return -ENOMEM; in mtk_init_fq_dma()
1202 phy_ring_tail = eth->phy_scratch_ring + soc->tx.desc_size * (cnt - 1); in mtk_init_fq_dma()
1204 for (j = 0; j < DIV_ROUND_UP(soc->tx.fq_dma_size, MTK_FQ_DMA_LENGTH); j++) { in mtk_init_fq_dma()
1205 len = min_t(int, cnt - j * MTK_FQ_DMA_LENGTH, MTK_FQ_DMA_LENGTH); in mtk_init_fq_dma()
1206 eth->scratch_head[j] = kcalloc(len, MTK_QDMA_PAGE_SIZE, GFP_KERNEL); in mtk_init_fq_dma()
1208 if (unlikely(!eth->scratch_head[j])) in mtk_init_fq_dma()
1209 return -ENOMEM; in mtk_init_fq_dma()
1211 dma_addr = dma_map_single(eth->dma_dev, in mtk_init_fq_dma()
1212 eth->scratch_head[j], len * MTK_QDMA_PAGE_SIZE, in mtk_init_fq_dma()
1215 if (unlikely(dma_mapping_error(eth->dma_dev, dma_addr))) in mtk_init_fq_dma()
1216 return -ENOMEM; in mtk_init_fq_dma()
1221 txd = eth->scratch_ring + (j * MTK_FQ_DMA_LENGTH + i) * soc->tx.desc_size; in mtk_init_fq_dma()
1222 txd->txd1 = dma_addr + i * MTK_QDMA_PAGE_SIZE; in mtk_init_fq_dma()
1224 txd->txd2 = eth->phy_scratch_ring + in mtk_init_fq_dma()
1225 (j * MTK_FQ_DMA_LENGTH + i + 1) * soc->tx.desc_size; in mtk_init_fq_dma()
1227 txd->txd3 = TX_DMA_PLEN0(MTK_QDMA_PAGE_SIZE); in mtk_init_fq_dma()
1228 if (MTK_HAS_CAPS(soc->caps, MTK_36BIT_DMA)) in mtk_init_fq_dma()
1229 txd->txd3 |= TX_DMA_PREP_ADDR64(dma_addr + i * MTK_QDMA_PAGE_SIZE); in mtk_init_fq_dma()
1231 txd->txd4 = 0; in mtk_init_fq_dma()
1233 txd->txd5 = 0; in mtk_init_fq_dma()
1234 txd->txd6 = 0; in mtk_init_fq_dma()
1235 txd->txd7 = 0; in mtk_init_fq_dma()
1236 txd->txd8 = 0; in mtk_init_fq_dma()
1241 mtk_w32(eth, eth->phy_scratch_ring, soc->reg_map->qdma.fq_head); in mtk_init_fq_dma()
1242 mtk_w32(eth, phy_ring_tail, soc->reg_map->qdma.fq_tail); in mtk_init_fq_dma()
1243 mtk_w32(eth, (cnt << 16) | cnt, soc->reg_map->qdma.fq_count); in mtk_init_fq_dma()
1244 mtk_w32(eth, MTK_QDMA_PAGE_SIZE << 16, soc->reg_map->qdma.fq_blen); in mtk_init_fq_dma()
1251 return ring->dma + (desc - ring->phys); in mtk_qdma_phys_to_virt()
1257 int idx = (txd - ring->dma) / txd_size; in mtk_desc_to_tx_buf()
1259 return &ring->buf[idx]; in mtk_desc_to_tx_buf()
1265 return ring->dma_pdma - (struct mtk_tx_dma *)ring->dma + dma; in qdma_to_pdma()
1270 return (dma - ring->dma) / txd_size; in txd_to_idx()
1276 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in mtk_tx_unmap()
1277 if (tx_buf->flags & MTK_TX_FLAGS_SINGLE0) { in mtk_tx_unmap()
1278 dma_unmap_single(eth->dma_dev, in mtk_tx_unmap()
1282 } else if (tx_buf->flags & MTK_TX_FLAGS_PAGE0) { in mtk_tx_unmap()
1283 dma_unmap_page(eth->dma_dev, in mtk_tx_unmap()
1290 dma_unmap_page(eth->dma_dev, in mtk_tx_unmap()
1297 dma_unmap_page(eth->dma_dev, in mtk_tx_unmap()
1304 if (tx_buf->data && tx_buf->data != (void *)MTK_DMA_DUMMY_DESC) { in mtk_tx_unmap()
1305 if (tx_buf->type == MTK_TYPE_SKB) { in mtk_tx_unmap()
1306 struct sk_buff *skb = tx_buf->data; in mtk_tx_unmap()
1313 struct xdp_frame *xdpf = tx_buf->data; in mtk_tx_unmap()
1315 if (napi && tx_buf->type == MTK_TYPE_XDP_TX) in mtk_tx_unmap()
1323 tx_buf->flags = 0; in mtk_tx_unmap()
1324 tx_buf->data = NULL; in mtk_tx_unmap()
1331 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in setup_tx_buf()
1336 txd->txd3 = mapped_addr; in setup_tx_buf()
1337 txd->txd2 |= TX_DMA_PLEN1(size); in setup_tx_buf()
1341 tx_buf->data = (void *)MTK_DMA_DUMMY_DESC; in setup_tx_buf()
1342 txd->txd1 = mapped_addr; in setup_tx_buf()
1343 txd->txd2 = TX_DMA_PLEN0(size); in setup_tx_buf()
1353 struct mtk_mac *mac = netdev_priv(dev); in mtk_tx_set_dma_desc_v1() local
1354 struct mtk_eth *eth = mac->hw; in mtk_tx_set_dma_desc_v1()
1358 WRITE_ONCE(desc->txd1, info->addr); in mtk_tx_set_dma_desc_v1()
1360 data = TX_DMA_SWC | TX_DMA_PLEN0(info->size) | in mtk_tx_set_dma_desc_v1()
1361 FIELD_PREP(TX_DMA_PQID, info->qid); in mtk_tx_set_dma_desc_v1()
1362 if (info->last) in mtk_tx_set_dma_desc_v1()
1364 WRITE_ONCE(desc->txd3, data); in mtk_tx_set_dma_desc_v1()
1366 data = (mac->id + 1) << TX_DMA_FPORT_SHIFT; /* forward port */ in mtk_tx_set_dma_desc_v1()
1367 if (info->first) { in mtk_tx_set_dma_desc_v1()
1368 if (info->gso) in mtk_tx_set_dma_desc_v1()
1370 /* tx checksum offload */ in mtk_tx_set_dma_desc_v1()
1371 if (info->csum) in mtk_tx_set_dma_desc_v1()
1374 if (info->vlan) in mtk_tx_set_dma_desc_v1()
1375 data |= TX_DMA_INS_VLAN | info->vlan_tci; in mtk_tx_set_dma_desc_v1()
1377 WRITE_ONCE(desc->txd4, data); in mtk_tx_set_dma_desc_v1()
1383 struct mtk_mac *mac = netdev_priv(dev); in mtk_tx_set_dma_desc_v2() local
1385 struct mtk_eth *eth = mac->hw; in mtk_tx_set_dma_desc_v2()
1388 WRITE_ONCE(desc->txd1, info->addr); in mtk_tx_set_dma_desc_v2()
1390 data = TX_DMA_PLEN0(info->size); in mtk_tx_set_dma_desc_v2()
1391 if (info->last) in mtk_tx_set_dma_desc_v2()
1394 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) in mtk_tx_set_dma_desc_v2()
1395 data |= TX_DMA_PREP_ADDR64(info->addr); in mtk_tx_set_dma_desc_v2()
1397 WRITE_ONCE(desc->txd3, data); in mtk_tx_set_dma_desc_v2()
1400 switch (mac->id) { in mtk_tx_set_dma_desc_v2()
1412 data |= TX_DMA_SWC_V2 | QID_BITS_V2(info->qid); in mtk_tx_set_dma_desc_v2()
1413 WRITE_ONCE(desc->txd4, data); in mtk_tx_set_dma_desc_v2()
1416 if (info->first) { in mtk_tx_set_dma_desc_v2()
1417 if (info->gso) in mtk_tx_set_dma_desc_v2()
1419 /* tx checksum offload */ in mtk_tx_set_dma_desc_v2()
1420 if (info->csum) in mtk_tx_set_dma_desc_v2()
1425 WRITE_ONCE(desc->txd5, data); in mtk_tx_set_dma_desc_v2()
1428 if (info->first && info->vlan) in mtk_tx_set_dma_desc_v2()
1429 data |= TX_DMA_INS_VLAN_V2 | info->vlan_tci; in mtk_tx_set_dma_desc_v2()
1430 WRITE_ONCE(desc->txd6, data); in mtk_tx_set_dma_desc_v2()
1432 WRITE_ONCE(desc->txd7, 0); in mtk_tx_set_dma_desc_v2()
1433 WRITE_ONCE(desc->txd8, 0); in mtk_tx_set_dma_desc_v2()
1439 struct mtk_mac *mac = netdev_priv(dev); in mtk_tx_set_dma_desc() local
1440 struct mtk_eth *eth = mac->hw; in mtk_tx_set_dma_desc()
1454 .csum = skb->ip_summed == CHECKSUM_PARTIAL, in mtk_tx_map()
1462 struct mtk_mac *mac = netdev_priv(dev); in mtk_tx_map() local
1463 struct mtk_eth *eth = mac->hw; in mtk_tx_map()
1464 const struct mtk_soc_data *soc = eth->soc; in mtk_tx_map()
1473 itxd = ring->next_free; in mtk_tx_map()
1475 if (itxd == ring->last_free) in mtk_tx_map()
1476 return -ENOMEM; in mtk_tx_map()
1478 itx_buf = mtk_desc_to_tx_buf(ring, itxd, soc->tx.desc_size); in mtk_tx_map()
1481 txd_info.addr = dma_map_single(eth->dma_dev, skb->data, txd_info.size, in mtk_tx_map()
1483 if (unlikely(dma_mapping_error(eth->dma_dev, txd_info.addr))) in mtk_tx_map()
1484 return -ENOMEM; in mtk_tx_map()
1488 itx_buf->flags |= MTK_TX_FLAGS_SINGLE0; in mtk_tx_map()
1489 itx_buf->mac_id = mac->id; in mtk_tx_map()
1493 /* TX SG offload */ in mtk_tx_map()
1497 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { in mtk_tx_map()
1498 skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in mtk_tx_map()
1505 if (MTK_HAS_CAPS(soc->caps, MTK_QDMA) || in mtk_tx_map()
1507 txd = mtk_qdma_phys_to_virt(ring, txd->txd2); in mtk_tx_map()
1509 if (txd == ring->last_free) in mtk_tx_map()
1519 soc->tx.dma_max_len); in mtk_tx_map()
1521 txd_info.last = i == skb_shinfo(skb)->nr_frags - 1 && in mtk_tx_map()
1522 !(frag_size - txd_info.size); in mtk_tx_map()
1523 txd_info.addr = skb_frag_dma_map(eth->dma_dev, frag, in mtk_tx_map()
1526 if (unlikely(dma_mapping_error(eth->dma_dev, txd_info.addr))) in mtk_tx_map()
1532 soc->tx.desc_size); in mtk_tx_map()
1535 tx_buf->data = (void *)MTK_DMA_DUMMY_DESC; in mtk_tx_map()
1536 tx_buf->flags |= MTK_TX_FLAGS_PAGE0; in mtk_tx_map()
1537 tx_buf->mac_id = mac->id; in mtk_tx_map()
1542 frag_size -= txd_info.size; in mtk_tx_map()
1548 itx_buf->type = MTK_TYPE_SKB; in mtk_tx_map()
1549 itx_buf->data = skb; in mtk_tx_map()
1551 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_tx_map()
1553 txd_pdma->txd2 |= TX_DMA_LS0; in mtk_tx_map()
1555 txd_pdma->txd2 |= TX_DMA_LS1; in mtk_tx_map()
1558 netdev_tx_sent_queue(txq, skb->len); in mtk_tx_map()
1561 ring->next_free = mtk_qdma_phys_to_virt(ring, txd->txd2); in mtk_tx_map()
1562 atomic_sub(n_desc, &ring->free_count); in mtk_tx_map()
1569 if (MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_tx_map()
1571 mtk_w32(eth, txd->txd2, soc->reg_map->qdma.ctx_ptr); in mtk_tx_map()
1575 next_idx = NEXT_DESP_IDX(txd_to_idx(ring, txd, soc->tx.desc_size), in mtk_tx_map()
1576 ring->dma_size); in mtk_tx_map()
1584 tx_buf = mtk_desc_to_tx_buf(ring, itxd, soc->tx.desc_size); in mtk_tx_map()
1589 itxd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU; in mtk_tx_map()
1590 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) in mtk_tx_map()
1591 itxd_pdma->txd2 = TX_DMA_DESP2_DEF; in mtk_tx_map()
1593 itxd = mtk_qdma_phys_to_virt(ring, itxd->txd2); in mtk_tx_map()
1597 return -ENOMEM; in mtk_tx_map()
1606 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { in mtk_cal_txd_req()
1607 frag = &skb_shinfo(skb)->frags[i]; in mtk_cal_txd_req()
1609 eth->soc->tx.dma_max_len); in mtk_cal_txd_req()
1612 nfrags += skb_shinfo(skb)->nr_frags; in mtk_cal_txd_req()
1623 if (!eth->netdev[i]) in mtk_queue_stopped()
1625 if (netif_queue_stopped(eth->netdev[i])) in mtk_queue_stopped()
1637 if (!eth->netdev[i]) in mtk_wake_queue()
1639 netif_tx_wake_all_queues(eth->netdev[i]); in mtk_wake_queue()
1645 struct mtk_mac *mac = netdev_priv(dev); in mtk_start_xmit() local
1646 struct mtk_eth *eth = mac->hw; in mtk_start_xmit()
1647 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_start_xmit()
1648 struct net_device_stats *stats = &dev->stats; in mtk_start_xmit()
1656 spin_lock(ð->page_lock); in mtk_start_xmit()
1658 if (unlikely(test_bit(MTK_RESETTING, ð->state))) in mtk_start_xmit()
1662 if (unlikely(atomic_read(&ring->free_count) <= tx_num)) { in mtk_start_xmit()
1665 "Tx Ring full when queue awake!\n"); in mtk_start_xmit()
1666 spin_unlock(ð->page_lock); in mtk_start_xmit()
1678 if (skb_shinfo(skb)->gso_type & in mtk_start_xmit()
1681 tcp_hdr(skb)->check = htons(skb_shinfo(skb)->gso_size); in mtk_start_xmit()
1688 if (unlikely(atomic_read(&ring->free_count) <= ring->thresh)) in mtk_start_xmit()
1691 spin_unlock(ð->page_lock); in mtk_start_xmit()
1696 spin_unlock(ð->page_lock); in mtk_start_xmit()
1697 stats->tx_dropped++; in mtk_start_xmit()
1708 if (!eth->hwlro) in mtk_get_rx_ring()
1709 return ð->rx_ring[0]; in mtk_get_rx_ring()
1714 ring = ð->rx_ring[i]; in mtk_get_rx_ring()
1715 idx = NEXT_DESP_IDX(ring->calc_idx, ring->dma_size); in mtk_get_rx_ring()
1716 rxd = ring->dma + idx * eth->soc->rx.desc_size; in mtk_get_rx_ring()
1717 if (rxd->rxd2 & RX_DMA_DONE) { in mtk_get_rx_ring()
1718 ring->calc_idx_update = true; in mtk_get_rx_ring()
1731 if (!eth->hwlro) { in mtk_update_rx_cpu_idx()
1732 ring = ð->rx_ring[0]; in mtk_update_rx_cpu_idx()
1733 mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg); in mtk_update_rx_cpu_idx()
1736 ring = ð->rx_ring[i]; in mtk_update_rx_cpu_idx()
1737 if (ring->calc_idx_update) { in mtk_update_rx_cpu_idx()
1738 ring->calc_idx_update = false; in mtk_update_rx_cpu_idx()
1739 mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg); in mtk_update_rx_cpu_idx()
1759 .dev = eth->dma_dev, in mtk_create_page_pool()
1766 pp_params.dma_dir = rcu_access_pointer(eth->prog) ? DMA_BIDIRECTIONAL in mtk_create_page_pool()
1772 err = __xdp_rxq_info_reg(xdp_q, eth->dummy_dev, id, in mtk_create_page_pool()
1773 eth->rx_napi.napi_id, PAGE_SIZE); in mtk_create_page_pool()
1806 if (ring->page_pool) in mtk_rx_put_buff()
1807 page_pool_put_full_page(ring->page_pool, in mtk_rx_put_buff()
1818 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_xdp_frame_map()
1819 struct mtk_mac *mac = netdev_priv(dev); in mtk_xdp_frame_map() local
1823 txd_info->addr = dma_map_single(eth->dma_dev, data, in mtk_xdp_frame_map()
1824 txd_info->size, DMA_TO_DEVICE); in mtk_xdp_frame_map()
1825 if (unlikely(dma_mapping_error(eth->dma_dev, txd_info->addr))) in mtk_xdp_frame_map()
1826 return -ENOMEM; in mtk_xdp_frame_map()
1828 tx_buf->flags |= MTK_TX_FLAGS_SINGLE0; in mtk_xdp_frame_map()
1832 txd_info->addr = page_pool_get_dma_addr(page) + in mtk_xdp_frame_map()
1834 dma_sync_single_for_device(eth->dma_dev, txd_info->addr, in mtk_xdp_frame_map()
1835 txd_info->size, DMA_BIDIRECTIONAL); in mtk_xdp_frame_map()
1839 tx_buf->mac_id = mac->id; in mtk_xdp_frame_map()
1840 tx_buf->type = dma_map ? MTK_TYPE_XDP_NDO : MTK_TYPE_XDP_TX; in mtk_xdp_frame_map()
1841 tx_buf->data = (void *)MTK_DMA_DUMMY_DESC; in mtk_xdp_frame_map()
1844 setup_tx_buf(eth, tx_buf, txd_pdma, txd_info->addr, txd_info->size, in mtk_xdp_frame_map()
1854 const struct mtk_soc_data *soc = eth->soc; in mtk_xdp_submit_frame()
1855 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_xdp_submit_frame()
1856 struct mtk_mac *mac = netdev_priv(dev); in mtk_xdp_submit_frame() local
1858 .size = xdpf->len, in mtk_xdp_submit_frame()
1861 .qid = mac->id, in mtk_xdp_submit_frame()
1866 void *data = xdpf->data; in mtk_xdp_submit_frame()
1868 if (unlikely(test_bit(MTK_RESETTING, ð->state))) in mtk_xdp_submit_frame()
1869 return -EBUSY; in mtk_xdp_submit_frame()
1871 nr_frags = unlikely(xdp_frame_has_frags(xdpf)) ? sinfo->nr_frags : 0; in mtk_xdp_submit_frame()
1872 if (unlikely(atomic_read(&ring->free_count) <= 1 + nr_frags)) in mtk_xdp_submit_frame()
1873 return -EBUSY; in mtk_xdp_submit_frame()
1875 spin_lock(ð->page_lock); in mtk_xdp_submit_frame()
1877 txd = ring->next_free; in mtk_xdp_submit_frame()
1878 if (txd == ring->last_free) { in mtk_xdp_submit_frame()
1879 spin_unlock(ð->page_lock); in mtk_xdp_submit_frame()
1880 return -ENOMEM; in mtk_xdp_submit_frame()
1884 tx_buf = mtk_desc_to_tx_buf(ring, txd, soc->tx.desc_size); in mtk_xdp_submit_frame()
1890 data, xdpf->headroom, index, dma_map); in mtk_xdp_submit_frame()
1897 if (MTK_HAS_CAPS(soc->caps, MTK_QDMA) || (index & 0x1)) { in mtk_xdp_submit_frame()
1898 txd = mtk_qdma_phys_to_virt(ring, txd->txd2); in mtk_xdp_submit_frame()
1899 if (txd == ring->last_free) in mtk_xdp_submit_frame()
1903 soc->tx.desc_size); in mtk_xdp_submit_frame()
1909 txd_info.size = skb_frag_size(&sinfo->frags[index]); in mtk_xdp_submit_frame()
1911 txd_info.qid = mac->id; in mtk_xdp_submit_frame()
1912 data = skb_frag_address(&sinfo->frags[index]); in mtk_xdp_submit_frame()
1917 htx_buf->data = xdpf; in mtk_xdp_submit_frame()
1919 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_xdp_submit_frame()
1923 txd_pdma->txd2 |= TX_DMA_LS0; in mtk_xdp_submit_frame()
1925 txd_pdma->txd2 |= TX_DMA_LS1; in mtk_xdp_submit_frame()
1928 ring->next_free = mtk_qdma_phys_to_virt(ring, txd->txd2); in mtk_xdp_submit_frame()
1929 atomic_sub(n_desc, &ring->free_count); in mtk_xdp_submit_frame()
1936 if (MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_xdp_submit_frame()
1937 mtk_w32(eth, txd->txd2, soc->reg_map->qdma.ctx_ptr); in mtk_xdp_submit_frame()
1941 idx = txd_to_idx(ring, txd, soc->tx.desc_size); in mtk_xdp_submit_frame()
1942 mtk_w32(eth, NEXT_DESP_IDX(idx, ring->dma_size), in mtk_xdp_submit_frame()
1946 spin_unlock(ð->page_lock); in mtk_xdp_submit_frame()
1952 tx_buf = mtk_desc_to_tx_buf(ring, htxd, soc->tx.desc_size); in mtk_xdp_submit_frame()
1955 htxd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU; in mtk_xdp_submit_frame()
1956 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_xdp_submit_frame()
1959 txd_pdma->txd2 = TX_DMA_DESP2_DEF; in mtk_xdp_submit_frame()
1962 htxd = mtk_qdma_phys_to_virt(ring, htxd->txd2); in mtk_xdp_submit_frame()
1965 spin_unlock(ð->page_lock); in mtk_xdp_submit_frame()
1973 struct mtk_mac *mac = netdev_priv(dev); in mtk_xdp_xmit() local
1974 struct mtk_hw_stats *hw_stats = mac->hw_stats; in mtk_xdp_xmit()
1975 struct mtk_eth *eth = mac->hw; in mtk_xdp_xmit()
1979 return -EINVAL; in mtk_xdp_xmit()
1987 u64_stats_update_begin(&hw_stats->syncp); in mtk_xdp_xmit()
1988 hw_stats->xdp_stats.tx_xdp_xmit += nxmit; in mtk_xdp_xmit()
1989 hw_stats->xdp_stats.tx_xdp_xmit_errors += num_frame - nxmit; in mtk_xdp_xmit()
1990 u64_stats_update_end(&hw_stats->syncp); in mtk_xdp_xmit()
1998 struct mtk_mac *mac = netdev_priv(dev); in mtk_xdp_run() local
1999 struct mtk_hw_stats *hw_stats = mac->hw_stats; in mtk_xdp_run()
2000 u64 *count = &hw_stats->xdp_stats.rx_xdp_drop; in mtk_xdp_run()
2006 prog = rcu_dereference(eth->prog); in mtk_xdp_run()
2013 count = &hw_stats->xdp_stats.rx_xdp_pass; in mtk_xdp_run()
2021 count = &hw_stats->xdp_stats.rx_xdp_redirect; in mtk_xdp_run()
2027 count = &hw_stats->xdp_stats.rx_xdp_tx_errors; in mtk_xdp_run()
2032 count = &hw_stats->xdp_stats.rx_xdp_tx; in mtk_xdp_run()
2045 page_pool_put_full_page(ring->page_pool, in mtk_xdp_run()
2046 virt_to_head_page(xdp->data), true); in mtk_xdp_run()
2049 u64_stats_update_begin(&hw_stats->syncp); in mtk_xdp_run()
2051 u64_stats_update_end(&hw_stats->syncp); in mtk_xdp_run()
2077 int mac = 0; in mtk_poll_rx() local
2083 idx = NEXT_DESP_IDX(ring->calc_idx, ring->dma_size); in mtk_poll_rx()
2084 rxd = ring->dma + idx * eth->soc->rx.desc_size; in mtk_poll_rx()
2085 data = ring->data[idx]; in mtk_poll_rx()
2090 /* find out which mac the packet come from. values start at 1 */ in mtk_poll_rx()
2097 mac = val - 1; in mtk_poll_rx()
2100 mac = MTK_GMAC3_ID; in mtk_poll_rx()
2105 } else if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) && in mtk_poll_rx()
2107 mac = RX_DMA_GET_SPORT(trxd.rxd4) - 1; in mtk_poll_rx()
2110 if (unlikely(mac < 0 || mac >= MTK_MAX_DEVS || in mtk_poll_rx()
2111 !eth->netdev[mac])) in mtk_poll_rx()
2114 netdev = eth->netdev[mac]; in mtk_poll_rx()
2115 ppe_idx = eth->mac[mac]->ppe_idx; in mtk_poll_rx()
2117 if (unlikely(test_bit(MTK_RESETTING, ð->state))) in mtk_poll_rx()
2123 if (ring->page_pool) { in mtk_poll_rx()
2128 new_data = mtk_page_pool_get_buff(ring->page_pool, in mtk_poll_rx()
2132 netdev->stats.rx_dropped++; in mtk_poll_rx()
2136 dma_sync_single_for_cpu(eth->dma_dev, in mtk_poll_rx()
2138 pktlen, page_pool_get_dma_dir(ring->page_pool)); in mtk_poll_rx()
2140 xdp_init_buff(&xdp, PAGE_SIZE, &ring->xdp_q); in mtk_poll_rx()
2154 page_pool_put_full_page(ring->page_pool, in mtk_poll_rx()
2156 netdev->stats.rx_dropped++; in mtk_poll_rx()
2160 skb_reserve(skb, xdp.data - xdp.data_hard_start); in mtk_poll_rx()
2161 skb_put(skb, xdp.data_end - xdp.data); in mtk_poll_rx()
2162 metasize = xdp.data - xdp.data_meta; in mtk_poll_rx()
2167 if (ring->frag_size <= PAGE_SIZE) in mtk_poll_rx()
2168 new_data = napi_alloc_frag(ring->frag_size); in mtk_poll_rx()
2173 netdev->stats.rx_dropped++; in mtk_poll_rx()
2177 dma_addr = dma_map_single(eth->dma_dev, in mtk_poll_rx()
2178 new_data + NET_SKB_PAD + eth->ip_align, in mtk_poll_rx()
2179 ring->buf_size, DMA_FROM_DEVICE); in mtk_poll_rx()
2180 if (unlikely(dma_mapping_error(eth->dma_dev, in mtk_poll_rx()
2183 netdev->stats.rx_dropped++; in mtk_poll_rx()
2187 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) in mtk_poll_rx()
2190 dma_unmap_single(eth->dma_dev, ((u64)trxd.rxd1 | addr64), in mtk_poll_rx()
2191 ring->buf_size, DMA_FROM_DEVICE); in mtk_poll_rx()
2193 skb = build_skb(data, ring->frag_size); in mtk_poll_rx()
2195 netdev->stats.rx_dropped++; in mtk_poll_rx()
2204 skb->dev = netdev; in mtk_poll_rx()
2205 bytes += skb->len; in mtk_poll_rx()
2223 if (*rxdcsum & eth->soc->rx.dma_l4_valid) in mtk_poll_rx()
2224 skb->ip_summed = CHECKSUM_UNNECESSARY; in mtk_poll_rx()
2227 skb->protocol = eth_type_trans(skb, netdev); in mtk_poll_rx()
2236 if (port < ARRAY_SIZE(eth->dsa_meta) && in mtk_poll_rx()
2237 eth->dsa_meta[port]) in mtk_poll_rx()
2238 skb_dst_set_noref(skb, ð->dsa_meta[port]->dst); in mtk_poll_rx()
2242 mtk_ppe_check_skb(eth->ppe[ppe_idx], skb, hash); in mtk_poll_rx()
2248 ring->data[idx] = new_data; in mtk_poll_rx()
2249 rxd->rxd1 = (unsigned int)dma_addr; in mtk_poll_rx()
2251 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) { in mtk_poll_rx()
2254 rxd->rxd2); in mtk_poll_rx()
2259 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_poll_rx()
2260 rxd->rxd2 = RX_DMA_LSO; in mtk_poll_rx()
2262 rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size) | addr64; in mtk_poll_rx()
2264 ring->calc_idx = idx; in mtk_poll_rx()
2277 eth->rx_packets += done; in mtk_poll_rx()
2278 eth->rx_bytes += bytes; in mtk_poll_rx()
2279 dim_update_sample(eth->rx_events, eth->rx_packets, eth->rx_bytes, in mtk_poll_rx()
2281 net_dim(ð->rx_dim, &dim_sample); in mtk_poll_rx()
2297 mtk_poll_tx_done(struct mtk_eth *eth, struct mtk_poll_state *state, u8 mac, in mtk_poll_tx_done() argument
2302 unsigned int bytes = skb->len; in mtk_poll_tx_done()
2304 state->total++; in mtk_poll_tx_done()
2305 eth->tx_packets++; in mtk_poll_tx_done()
2306 eth->tx_bytes += bytes; in mtk_poll_tx_done()
2308 dev = eth->netdev[mac]; in mtk_poll_tx_done()
2313 if (state->txq == txq) { in mtk_poll_tx_done()
2314 state->done++; in mtk_poll_tx_done()
2315 state->bytes += bytes; in mtk_poll_tx_done()
2319 if (state->txq) in mtk_poll_tx_done()
2320 netdev_tx_completed_queue(state->txq, state->done, state->bytes); in mtk_poll_tx_done()
2322 state->txq = txq; in mtk_poll_tx_done()
2323 state->done = 1; in mtk_poll_tx_done()
2324 state->bytes = bytes; in mtk_poll_tx_done()
2330 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_poll_tx_qdma()
2331 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_poll_tx_qdma()
2337 cpu = ring->last_free_ptr; in mtk_poll_tx_qdma()
2338 dma = mtk_r32(eth, reg_map->qdma.drx_ptr); in mtk_poll_tx_qdma()
2344 u32 next_cpu = desc->txd2; in mtk_poll_tx_qdma()
2346 desc = mtk_qdma_phys_to_virt(ring, desc->txd2); in mtk_poll_tx_qdma()
2347 if ((desc->txd3 & TX_DMA_OWNER_CPU) == 0) in mtk_poll_tx_qdma()
2351 eth->soc->tx.desc_size); in mtk_poll_tx_qdma()
2352 if (!tx_buf->data) in mtk_poll_tx_qdma()
2355 if (tx_buf->data != (void *)MTK_DMA_DUMMY_DESC) { in mtk_poll_tx_qdma()
2356 if (tx_buf->type == MTK_TYPE_SKB) in mtk_poll_tx_qdma()
2357 mtk_poll_tx_done(eth, state, tx_buf->mac_id, in mtk_poll_tx_qdma()
2358 tx_buf->data); in mtk_poll_tx_qdma()
2360 budget--; in mtk_poll_tx_qdma()
2364 ring->last_free = desc; in mtk_poll_tx_qdma()
2365 atomic_inc(&ring->free_count); in mtk_poll_tx_qdma()
2371 ring->last_free_ptr = cpu; in mtk_poll_tx_qdma()
2372 mtk_w32(eth, cpu, reg_map->qdma.crx_ptr); in mtk_poll_tx_qdma()
2380 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_poll_tx_pdma()
2386 cpu = ring->cpu_idx; in mtk_poll_tx_pdma()
2391 tx_buf = &ring->buf[cpu]; in mtk_poll_tx_pdma()
2392 if (!tx_buf->data) in mtk_poll_tx_pdma()
2395 if (tx_buf->data != (void *)MTK_DMA_DUMMY_DESC) { in mtk_poll_tx_pdma()
2396 if (tx_buf->type == MTK_TYPE_SKB) in mtk_poll_tx_pdma()
2397 mtk_poll_tx_done(eth, state, 0, tx_buf->data); in mtk_poll_tx_pdma()
2398 budget--; in mtk_poll_tx_pdma()
2402 desc = ring->dma + cpu * eth->soc->tx.desc_size; in mtk_poll_tx_pdma()
2403 ring->last_free = desc; in mtk_poll_tx_pdma()
2404 atomic_inc(&ring->free_count); in mtk_poll_tx_pdma()
2406 cpu = NEXT_DESP_IDX(cpu, ring->dma_size); in mtk_poll_tx_pdma()
2410 ring->cpu_idx = cpu; in mtk_poll_tx_pdma()
2417 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_poll_tx()
2421 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_poll_tx()
2429 dim_update_sample(eth->tx_events, eth->tx_packets, eth->tx_bytes, in mtk_poll_tx()
2431 net_dim(ð->tx_dim, &dim_sample); in mtk_poll_tx()
2434 (atomic_read(&ring->free_count) > ring->thresh)) in mtk_poll_tx()
2454 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_napi_tx()
2457 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_napi_tx()
2459 mtk_w32(eth, MTK_TX_DONE_INT, reg_map->tx_irq_status); in mtk_napi_tx()
2463 dev_info(eth->dev, in mtk_napi_tx()
2464 "done tx %d, intr 0x%08x/0x%x\n", tx_done, in mtk_napi_tx()
2465 mtk_r32(eth, reg_map->tx_irq_status), in mtk_napi_tx()
2466 mtk_r32(eth, reg_map->tx_irq_mask)); in mtk_napi_tx()
2472 if (mtk_r32(eth, reg_map->tx_irq_status) & MTK_TX_DONE_INT) in mtk_napi_tx()
2484 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_napi_rx()
2492 mtk_w32(eth, eth->soc->rx.irq_done_mask, in mtk_napi_rx()
2493 reg_map->pdma.irq_status); in mtk_napi_rx()
2494 rx_done = mtk_poll_rx(napi, budget - rx_done_total, eth); in mtk_napi_rx()
2498 dev_info(eth->dev, in mtk_napi_rx()
2500 mtk_r32(eth, reg_map->pdma.irq_status), in mtk_napi_rx()
2501 mtk_r32(eth, reg_map->pdma.irq_mask)); in mtk_napi_rx()
2507 } while (mtk_r32(eth, reg_map->pdma.irq_status) & in mtk_napi_rx()
2508 eth->soc->rx.irq_done_mask); in mtk_napi_rx()
2511 mtk_rx_irq_enable(eth, eth->soc->rx.irq_done_mask); in mtk_napi_rx()
2518 const struct mtk_soc_data *soc = eth->soc; in mtk_tx_alloc()
2519 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_tx_alloc()
2520 int i, sz = soc->tx.desc_size; in mtk_tx_alloc()
2525 if (MTK_HAS_CAPS(soc->caps, MTK_QDMA)) in mtk_tx_alloc()
2528 ring_size = soc->tx.dma_size; in mtk_tx_alloc()
2530 ring->buf = kcalloc(ring_size, sizeof(*ring->buf), in mtk_tx_alloc()
2532 if (!ring->buf) in mtk_tx_alloc()
2535 if (MTK_HAS_CAPS(soc->caps, MTK_SRAM)) { in mtk_tx_alloc()
2536 ring->dma = eth->sram_base + soc->tx.fq_dma_size * sz; in mtk_tx_alloc()
2537 ring->phys = eth->phy_scratch_ring + soc->tx.fq_dma_size * (dma_addr_t)sz; in mtk_tx_alloc()
2539 ring->dma = dma_alloc_coherent(eth->dma_dev, ring_size * sz, in mtk_tx_alloc()
2540 &ring->phys, GFP_KERNEL); in mtk_tx_alloc()
2543 if (!ring->dma) in mtk_tx_alloc()
2548 u32 next_ptr = ring->phys + next * sz; in mtk_tx_alloc()
2550 txd = ring->dma + i * sz; in mtk_tx_alloc()
2551 txd->txd2 = next_ptr; in mtk_tx_alloc()
2552 txd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU; in mtk_tx_alloc()
2553 txd->txd4 = 0; in mtk_tx_alloc()
2555 txd->txd5 = 0; in mtk_tx_alloc()
2556 txd->txd6 = 0; in mtk_tx_alloc()
2557 txd->txd7 = 0; in mtk_tx_alloc()
2558 txd->txd8 = 0; in mtk_tx_alloc()
2562 /* On MT7688 (PDMA only) this driver uses the ring->dma structs in mtk_tx_alloc()
2564 * descriptors in ring->dma_pdma. in mtk_tx_alloc()
2566 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_tx_alloc()
2567 ring->dma_pdma = dma_alloc_coherent(eth->dma_dev, ring_size * sz, in mtk_tx_alloc()
2568 &ring->phys_pdma, GFP_KERNEL); in mtk_tx_alloc()
2569 if (!ring->dma_pdma) in mtk_tx_alloc()
2573 ring->dma_pdma[i].txd2 = TX_DMA_DESP2_DEF; in mtk_tx_alloc()
2574 ring->dma_pdma[i].txd4 = 0; in mtk_tx_alloc()
2578 ring->dma_size = ring_size; in mtk_tx_alloc()
2579 atomic_set(&ring->free_count, ring_size - 2); in mtk_tx_alloc()
2580 ring->next_free = ring->dma; in mtk_tx_alloc()
2581 ring->last_free = (void *)txd; in mtk_tx_alloc()
2582 ring->last_free_ptr = (u32)(ring->phys + ((ring_size - 1) * sz)); in mtk_tx_alloc()
2583 ring->thresh = MAX_SKB_FRAGS; in mtk_tx_alloc()
2590 if (MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_tx_alloc()
2591 mtk_w32(eth, ring->phys, soc->reg_map->qdma.ctx_ptr); in mtk_tx_alloc()
2592 mtk_w32(eth, ring->phys, soc->reg_map->qdma.dtx_ptr); in mtk_tx_alloc()
2594 ring->phys + ((ring_size - 1) * sz), in mtk_tx_alloc()
2595 soc->reg_map->qdma.crx_ptr); in mtk_tx_alloc()
2596 mtk_w32(eth, ring->last_free_ptr, soc->reg_map->qdma.drx_ptr); in mtk_tx_alloc()
2600 mtk_w32(eth, val, soc->reg_map->qdma.qtx_cfg + ofs); in mtk_tx_alloc()
2609 mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs); in mtk_tx_alloc()
2613 mtk_w32(eth, val, soc->reg_map->qdma.tx_sch_rate); in mtk_tx_alloc()
2615 mtk_w32(eth, val, soc->reg_map->qdma.tx_sch_rate + 4); in mtk_tx_alloc()
2617 mtk_w32(eth, ring->phys_pdma, MT7628_TX_BASE_PTR0); in mtk_tx_alloc()
2620 mtk_w32(eth, MT7628_PST_DTX_IDX0, soc->reg_map->pdma.rst_idx); in mtk_tx_alloc()
2626 return -ENOMEM; in mtk_tx_alloc()
2631 const struct mtk_soc_data *soc = eth->soc; in mtk_tx_clean()
2632 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_tx_clean()
2635 if (ring->buf) { in mtk_tx_clean()
2636 for (i = 0; i < ring->dma_size; i++) in mtk_tx_clean()
2637 mtk_tx_unmap(eth, &ring->buf[i], NULL, false); in mtk_tx_clean()
2638 kfree(ring->buf); in mtk_tx_clean()
2639 ring->buf = NULL; in mtk_tx_clean()
2641 if (!MTK_HAS_CAPS(soc->caps, MTK_SRAM) && ring->dma) { in mtk_tx_clean()
2642 dma_free_coherent(eth->dma_dev, in mtk_tx_clean()
2643 ring->dma_size * soc->tx.desc_size, in mtk_tx_clean()
2644 ring->dma, ring->phys); in mtk_tx_clean()
2645 ring->dma = NULL; in mtk_tx_clean()
2648 if (ring->dma_pdma) { in mtk_tx_clean()
2649 dma_free_coherent(eth->dma_dev, in mtk_tx_clean()
2650 ring->dma_size * soc->tx.desc_size, in mtk_tx_clean()
2651 ring->dma_pdma, ring->phys_pdma); in mtk_tx_clean()
2652 ring->dma_pdma = NULL; in mtk_tx_clean()
2658 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_rx_alloc()
2659 const struct mtk_soc_data *soc = eth->soc; in mtk_rx_alloc()
2664 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_rx_alloc()
2667 tx_ring_size = soc->tx.dma_size; in mtk_rx_alloc()
2671 return -EINVAL; in mtk_rx_alloc()
2672 ring = ð->rx_ring_qdma; in mtk_rx_alloc()
2674 ring = ð->rx_ring[ring_no]; in mtk_rx_alloc()
2682 rx_dma_size = soc->rx.dma_size; in mtk_rx_alloc()
2685 ring->frag_size = mtk_max_frag_size(rx_data_len); in mtk_rx_alloc()
2686 ring->buf_size = mtk_max_buf_size(ring->frag_size); in mtk_rx_alloc()
2687 ring->data = kcalloc(rx_dma_size, sizeof(*ring->data), in mtk_rx_alloc()
2689 if (!ring->data) in mtk_rx_alloc()
2690 return -ENOMEM; in mtk_rx_alloc()
2695 pp = mtk_create_page_pool(eth, &ring->xdp_q, ring_no, in mtk_rx_alloc()
2700 ring->page_pool = pp; in mtk_rx_alloc()
2703 if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM) || in mtk_rx_alloc()
2705 ring->dma = dma_alloc_coherent(eth->dma_dev, in mtk_rx_alloc()
2706 rx_dma_size * eth->soc->rx.desc_size, in mtk_rx_alloc()
2707 &ring->phys, GFP_KERNEL); in mtk_rx_alloc()
2709 struct mtk_tx_ring *tx_ring = ð->tx_ring; in mtk_rx_alloc()
2711 ring->dma = tx_ring->dma + tx_ring_size * in mtk_rx_alloc()
2712 eth->soc->tx.desc_size * (ring_no + 1); in mtk_rx_alloc()
2713 ring->phys = tx_ring->phys + tx_ring_size * in mtk_rx_alloc()
2714 eth->soc->tx.desc_size * (ring_no + 1); in mtk_rx_alloc()
2717 if (!ring->dma) in mtk_rx_alloc()
2718 return -ENOMEM; in mtk_rx_alloc()
2725 rxd = ring->dma + i * eth->soc->rx.desc_size; in mtk_rx_alloc()
2726 if (ring->page_pool) { in mtk_rx_alloc()
2727 data = mtk_page_pool_get_buff(ring->page_pool, in mtk_rx_alloc()
2730 return -ENOMEM; in mtk_rx_alloc()
2732 if (ring->frag_size <= PAGE_SIZE) in mtk_rx_alloc()
2733 data = netdev_alloc_frag(ring->frag_size); in mtk_rx_alloc()
2738 return -ENOMEM; in mtk_rx_alloc()
2740 dma_addr = dma_map_single(eth->dma_dev, in mtk_rx_alloc()
2741 data + NET_SKB_PAD + eth->ip_align, in mtk_rx_alloc()
2742 ring->buf_size, DMA_FROM_DEVICE); in mtk_rx_alloc()
2743 if (unlikely(dma_mapping_error(eth->dma_dev, in mtk_rx_alloc()
2746 return -ENOMEM; in mtk_rx_alloc()
2749 rxd->rxd1 = (unsigned int)dma_addr; in mtk_rx_alloc()
2750 ring->data[i] = data; in mtk_rx_alloc()
2752 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_rx_alloc()
2753 rxd->rxd2 = RX_DMA_LSO; in mtk_rx_alloc()
2755 rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size); in mtk_rx_alloc()
2757 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) in mtk_rx_alloc()
2758 rxd->rxd2 |= RX_DMA_PREP_ADDR64(dma_addr); in mtk_rx_alloc()
2760 rxd->rxd3 = 0; in mtk_rx_alloc()
2761 rxd->rxd4 = 0; in mtk_rx_alloc()
2763 rxd->rxd5 = 0; in mtk_rx_alloc()
2764 rxd->rxd6 = 0; in mtk_rx_alloc()
2765 rxd->rxd7 = 0; in mtk_rx_alloc()
2766 rxd->rxd8 = 0; in mtk_rx_alloc()
2770 ring->dma_size = rx_dma_size; in mtk_rx_alloc()
2771 ring->calc_idx_update = false; in mtk_rx_alloc()
2772 ring->calc_idx = rx_dma_size - 1; in mtk_rx_alloc()
2774 ring->crx_idx_reg = reg_map->qdma.qcrx_ptr + in mtk_rx_alloc()
2777 ring->crx_idx_reg = reg_map->pdma.pcrx_ptr + in mtk_rx_alloc()
2785 mtk_w32(eth, ring->phys, in mtk_rx_alloc()
2786 reg_map->qdma.rx_ptr + ring_no * MTK_QRX_OFFSET); in mtk_rx_alloc()
2788 reg_map->qdma.rx_cnt_cfg + ring_no * MTK_QRX_OFFSET); in mtk_rx_alloc()
2790 reg_map->qdma.rst_idx); in mtk_rx_alloc()
2792 mtk_w32(eth, ring->phys, in mtk_rx_alloc()
2793 reg_map->pdma.rx_ptr + ring_no * MTK_QRX_OFFSET); in mtk_rx_alloc()
2795 reg_map->pdma.rx_cnt_cfg + ring_no * MTK_QRX_OFFSET); in mtk_rx_alloc()
2797 reg_map->pdma.rst_idx); in mtk_rx_alloc()
2799 mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg); in mtk_rx_alloc()
2809 if (ring->data && ring->dma) { in mtk_rx_clean()
2810 for (i = 0; i < ring->dma_size; i++) { in mtk_rx_clean()
2813 if (!ring->data[i]) in mtk_rx_clean()
2816 rxd = ring->dma + i * eth->soc->rx.desc_size; in mtk_rx_clean()
2817 if (!rxd->rxd1) in mtk_rx_clean()
2820 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) in mtk_rx_clean()
2821 addr64 = RX_DMA_GET_ADDR64(rxd->rxd2); in mtk_rx_clean()
2823 dma_unmap_single(eth->dma_dev, ((u64)rxd->rxd1 | addr64), in mtk_rx_clean()
2824 ring->buf_size, DMA_FROM_DEVICE); in mtk_rx_clean()
2825 mtk_rx_put_buff(ring, ring->data[i], false); in mtk_rx_clean()
2827 kfree(ring->data); in mtk_rx_clean()
2828 ring->data = NULL; in mtk_rx_clean()
2831 if (!in_sram && ring->dma) { in mtk_rx_clean()
2832 dma_free_coherent(eth->dma_dev, in mtk_rx_clean()
2833 ring->dma_size * eth->soc->rx.desc_size, in mtk_rx_clean()
2834 ring->dma, ring->phys); in mtk_rx_clean()
2835 ring->dma = NULL; in mtk_rx_clean()
2838 if (ring->page_pool) { in mtk_rx_clean()
2839 if (xdp_rxq_info_is_reg(&ring->xdp_q)) in mtk_rx_clean()
2840 xdp_rxq_info_unreg(&ring->xdp_q); in mtk_rx_clean()
2841 page_pool_destroy(ring->page_pool); in mtk_rx_clean()
2842 ring->page_pool = NULL; in mtk_rx_clean()
2852 /* set LRO rings to auto-learn modes */ in mtk_hwlro_rx_init()
2884 /* auto-learn score delta setting */ in mtk_hwlro_rx_init()
2959 static int mtk_hwlro_get_ip_cnt(struct mtk_mac *mac) in mtk_hwlro_get_ip_cnt() argument
2965 if (mac->hwlro_ip[i]) in mtk_hwlro_get_ip_cnt()
2976 (struct ethtool_rx_flow_spec *)&cmd->fs; in mtk_hwlro_add_ipaddr()
2977 struct mtk_mac *mac = netdev_priv(dev); in mtk_hwlro_add_ipaddr() local
2978 struct mtk_eth *eth = mac->hw; in mtk_hwlro_add_ipaddr()
2981 if ((fsp->flow_type != TCP_V4_FLOW) || in mtk_hwlro_add_ipaddr()
2982 (!fsp->h_u.tcp_ip4_spec.ip4dst) || in mtk_hwlro_add_ipaddr()
2983 (fsp->location > 1)) in mtk_hwlro_add_ipaddr()
2984 return -EINVAL; in mtk_hwlro_add_ipaddr()
2986 mac->hwlro_ip[fsp->location] = htonl(fsp->h_u.tcp_ip4_spec.ip4dst); in mtk_hwlro_add_ipaddr()
2987 hwlro_idx = (mac->id * MTK_MAX_LRO_IP_CNT) + fsp->location; in mtk_hwlro_add_ipaddr()
2989 mac->hwlro_ip_cnt = mtk_hwlro_get_ip_cnt(mac); in mtk_hwlro_add_ipaddr()
2991 mtk_hwlro_val_ipaddr(eth, hwlro_idx, mac->hwlro_ip[fsp->location]); in mtk_hwlro_add_ipaddr()
3000 (struct ethtool_rx_flow_spec *)&cmd->fs; in mtk_hwlro_del_ipaddr()
3001 struct mtk_mac *mac = netdev_priv(dev); in mtk_hwlro_del_ipaddr() local
3002 struct mtk_eth *eth = mac->hw; in mtk_hwlro_del_ipaddr()
3005 if (fsp->location > 1) in mtk_hwlro_del_ipaddr()
3006 return -EINVAL; in mtk_hwlro_del_ipaddr()
3008 mac->hwlro_ip[fsp->location] = 0; in mtk_hwlro_del_ipaddr()
3009 hwlro_idx = (mac->id * MTK_MAX_LRO_IP_CNT) + fsp->location; in mtk_hwlro_del_ipaddr()
3011 mac->hwlro_ip_cnt = mtk_hwlro_get_ip_cnt(mac); in mtk_hwlro_del_ipaddr()
3020 struct mtk_mac *mac = netdev_priv(dev); in mtk_hwlro_netdev_disable() local
3021 struct mtk_eth *eth = mac->hw; in mtk_hwlro_netdev_disable()
3025 mac->hwlro_ip[i] = 0; in mtk_hwlro_netdev_disable()
3026 hwlro_idx = (mac->id * MTK_MAX_LRO_IP_CNT) + i; in mtk_hwlro_netdev_disable()
3031 mac->hwlro_ip_cnt = 0; in mtk_hwlro_netdev_disable()
3037 struct mtk_mac *mac = netdev_priv(dev); in mtk_hwlro_get_fdir_entry() local
3039 (struct ethtool_rx_flow_spec *)&cmd->fs; in mtk_hwlro_get_fdir_entry()
3041 if (fsp->location >= ARRAY_SIZE(mac->hwlro_ip)) in mtk_hwlro_get_fdir_entry()
3042 return -EINVAL; in mtk_hwlro_get_fdir_entry()
3045 fsp->flow_type = TCP_V4_FLOW; in mtk_hwlro_get_fdir_entry()
3046 fsp->h_u.tcp_ip4_spec.ip4dst = ntohl(mac->hwlro_ip[fsp->location]); in mtk_hwlro_get_fdir_entry()
3047 fsp->m_u.tcp_ip4_spec.ip4dst = 0; in mtk_hwlro_get_fdir_entry()
3049 fsp->h_u.tcp_ip4_spec.ip4src = 0; in mtk_hwlro_get_fdir_entry()
3050 fsp->m_u.tcp_ip4_spec.ip4src = 0xffffffff; in mtk_hwlro_get_fdir_entry()
3051 fsp->h_u.tcp_ip4_spec.psrc = 0; in mtk_hwlro_get_fdir_entry()
3052 fsp->m_u.tcp_ip4_spec.psrc = 0xffff; in mtk_hwlro_get_fdir_entry()
3053 fsp->h_u.tcp_ip4_spec.pdst = 0; in mtk_hwlro_get_fdir_entry()
3054 fsp->m_u.tcp_ip4_spec.pdst = 0xffff; in mtk_hwlro_get_fdir_entry()
3055 fsp->h_u.tcp_ip4_spec.tos = 0; in mtk_hwlro_get_fdir_entry()
3056 fsp->m_u.tcp_ip4_spec.tos = 0xff; in mtk_hwlro_get_fdir_entry()
3065 struct mtk_mac *mac = netdev_priv(dev); in mtk_hwlro_get_fdir_all() local
3070 if (cnt == cmd->rule_cnt) in mtk_hwlro_get_fdir_all()
3071 return -EMSGSIZE; in mtk_hwlro_get_fdir_all()
3073 if (mac->hwlro_ip[i]) { in mtk_hwlro_get_fdir_all()
3079 cmd->rule_cnt = cnt; in mtk_hwlro_get_fdir_all()
3088 struct mtk_mac *mac = netdev_priv(dev); in mtk_fix_features() local
3089 int ip_cnt = mtk_hwlro_get_ip_cnt(mac); in mtk_fix_features()
3103 netdev_features_t diff = dev->features ^ features; in mtk_set_features()
3118 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_dma_busy_wait()
3119 reg = eth->soc->reg_map->qdma.glo_cfg; in mtk_dma_busy_wait()
3121 reg = eth->soc->reg_map->pdma.glo_cfg; in mtk_dma_busy_wait()
3123 ret = readx_poll_timeout_atomic(__raw_readl, eth->base + reg, val, in mtk_dma_busy_wait()
3127 dev_err(eth->dev, "DMA init timeout\n"); in mtk_dma_busy_wait()
3138 return -EBUSY; in mtk_dma_init()
3140 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in mtk_dma_init()
3153 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in mtk_dma_init()
3163 if (eth->hwlro) { in mtk_dma_init()
3174 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in mtk_dma_init()
3179 FC_THRES_MIN, eth->soc->reg_map->qdma.fc_th); in mtk_dma_init()
3180 mtk_w32(eth, 0x0, eth->soc->reg_map->qdma.hred); in mtk_dma_init()
3188 const struct mtk_soc_data *soc = eth->soc; in mtk_dma_free()
3191 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_dma_free()
3195 if (!eth->netdev[i]) in mtk_dma_free()
3199 netdev_tx_reset_subqueue(eth->netdev[i], j); in mtk_dma_free()
3202 if (!MTK_HAS_CAPS(soc->caps, MTK_SRAM) && eth->scratch_ring) { in mtk_dma_free()
3203 dma_free_coherent(eth->dma_dev, in mtk_dma_free()
3204 MTK_QDMA_RING_SIZE * soc->tx.desc_size, in mtk_dma_free()
3205 eth->scratch_ring, eth->phy_scratch_ring); in mtk_dma_free()
3206 eth->scratch_ring = NULL; in mtk_dma_free()
3207 eth->phy_scratch_ring = 0; in mtk_dma_free()
3210 mtk_rx_clean(eth, ð->rx_ring[0], MTK_HAS_CAPS(soc->caps, MTK_SRAM)); in mtk_dma_free()
3211 mtk_rx_clean(eth, ð->rx_ring_qdma, false); in mtk_dma_free()
3213 if (eth->hwlro) { in mtk_dma_free()
3216 mtk_rx_clean(eth, ð->rx_ring[i], false); in mtk_dma_free()
3219 for (i = 0; i < DIV_ROUND_UP(soc->tx.fq_dma_size, MTK_FQ_DMA_LENGTH); i++) { in mtk_dma_free()
3220 kfree(eth->scratch_head[i]); in mtk_dma_free()
3221 eth->scratch_head[i] = NULL; in mtk_dma_free()
3236 struct mtk_mac *mac = netdev_priv(dev); in mtk_tx_timeout() local
3237 struct mtk_eth *eth = mac->hw; in mtk_tx_timeout()
3239 if (test_bit(MTK_RESETTING, ð->state)) in mtk_tx_timeout()
3245 eth->netdev[mac->id]->stats.tx_errors++; in mtk_tx_timeout()
3248 schedule_work(ð->pending_work); in mtk_tx_timeout()
3255 eth->rx_events++; in mtk_handle_irq_rx()
3256 if (likely(napi_schedule_prep(ð->rx_napi))) { in mtk_handle_irq_rx()
3257 mtk_rx_irq_disable(eth, eth->soc->rx.irq_done_mask); in mtk_handle_irq_rx()
3258 __napi_schedule(ð->rx_napi); in mtk_handle_irq_rx()
3268 eth->tx_events++; in mtk_handle_irq_tx()
3269 if (likely(napi_schedule_prep(ð->tx_napi))) { in mtk_handle_irq_tx()
3271 __napi_schedule(ð->tx_napi); in mtk_handle_irq_tx()
3280 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_handle_irq()
3282 if (mtk_r32(eth, reg_map->pdma.irq_mask) & in mtk_handle_irq()
3283 eth->soc->rx.irq_done_mask) { in mtk_handle_irq()
3284 if (mtk_r32(eth, reg_map->pdma.irq_status) & in mtk_handle_irq()
3285 eth->soc->rx.irq_done_mask) in mtk_handle_irq()
3288 if (mtk_r32(eth, reg_map->tx_irq_mask) & MTK_TX_DONE_INT) { in mtk_handle_irq()
3289 if (mtk_r32(eth, reg_map->tx_irq_status) & MTK_TX_DONE_INT) in mtk_handle_irq()
3299 struct mtk_mac *mac = netdev_priv(dev); in mtk_poll_controller() local
3300 struct mtk_eth *eth = mac->hw; in mtk_poll_controller()
3303 mtk_rx_irq_disable(eth, eth->soc->rx.irq_done_mask); in mtk_poll_controller()
3304 mtk_handle_irq_rx(eth->irq[2], dev); in mtk_poll_controller()
3306 mtk_rx_irq_enable(eth, eth->soc->rx.irq_done_mask); in mtk_poll_controller()
3313 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_start_dma()
3322 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in mtk_start_dma()
3323 val = mtk_r32(eth, reg_map->qdma.glo_cfg); in mtk_start_dma()
3334 mtk_w32(eth, val, reg_map->qdma.glo_cfg); in mtk_start_dma()
3339 reg_map->pdma.glo_cfg); in mtk_start_dma()
3343 reg_map->pdma.glo_cfg); in mtk_start_dma()
3353 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_gdm_config()
3366 if (eth->netdev[id] && netdev_uses_dsa(eth->netdev[id])) in mtk_gdm_config()
3377 dev->dsa_ptr->tag_ops->proto == DSA_TAG_PROTO_MTK; in mtk_uses_dsa()
3385 struct mtk_mac *mac = container_of(n, struct mtk_mac, device_notifier); in mtk_device_event() local
3386 struct mtk_eth *eth = mac->hw; in mtk_device_event()
3397 if (netdev_priv(ldev) == mac) in mtk_device_event()
3410 if (s.base.speed == 0 || s.base.speed == ((__u32)-1)) in mtk_device_event()
3414 if (dp->index >= MTK_QDMA_NUM_QUEUES) in mtk_device_event()
3417 if (mac->speed > 0 && mac->speed <= s.base.speed) in mtk_device_event()
3420 mtk_set_queue_speed(eth, dp->index + 3, s.base.speed); in mtk_device_event()
3427 struct mtk_mac *mac = netdev_priv(dev); in mtk_open() local
3428 struct mtk_eth *eth = mac->hw; in mtk_open()
3432 ppe_num = eth->soc->ppe_num; in mtk_open()
3434 err = phylink_of_phy_connect(mac->phylink, mac->of_node, 0); in mtk_open()
3442 if (!refcount_read(ð->dma_refcnt)) { in mtk_open()
3443 const struct mtk_soc_data *soc = eth->soc; in mtk_open()
3449 phylink_disconnect_phy(mac->phylink); in mtk_open()
3453 for (i = 0; i < ARRAY_SIZE(eth->ppe); i++) in mtk_open()
3454 mtk_ppe_start(eth->ppe[i]); in mtk_open()
3457 if (!eth->netdev[i]) in mtk_open()
3460 target_mac = netdev_priv(eth->netdev[i]); in mtk_open()
3461 if (!soc->offload_version) { in mtk_open()
3462 target_mac->ppe_idx = 0; in mtk_open()
3464 } else if (ppe_num >= 3 && target_mac->id == 2) { in mtk_open()
3465 target_mac->ppe_idx = 2; in mtk_open()
3466 gdm_config = soc->reg_map->gdma_to_ppe[2]; in mtk_open()
3467 } else if (ppe_num >= 2 && target_mac->id == 1) { in mtk_open()
3468 target_mac->ppe_idx = 1; in mtk_open()
3469 gdm_config = soc->reg_map->gdma_to_ppe[1]; in mtk_open()
3471 target_mac->ppe_idx = 0; in mtk_open()
3472 gdm_config = soc->reg_map->gdma_to_ppe[0]; in mtk_open()
3474 mtk_gdm_config(eth, target_mac->id, gdm_config); in mtk_open()
3477 napi_enable(ð->tx_napi); in mtk_open()
3478 napi_enable(ð->rx_napi); in mtk_open()
3480 mtk_rx_irq_enable(eth, soc->rx.irq_done_mask); in mtk_open()
3481 refcount_set(ð->dma_refcnt, 1); in mtk_open()
3483 refcount_inc(ð->dma_refcnt); in mtk_open()
3486 phylink_start(mac->phylink); in mtk_open()
3492 if (mtk_uses_dsa(dev) && !eth->prog) { in mtk_open()
3493 for (i = 0; i < ARRAY_SIZE(eth->dsa_meta); i++) { in mtk_open()
3494 struct metadata_dst *md_dst = eth->dsa_meta[i]; in mtk_open()
3502 return -ENOMEM; in mtk_open()
3504 md_dst->u.port_info.port_id = i; in mtk_open()
3505 eth->dsa_meta[i] = md_dst; in mtk_open()
3509 * disabled if at least one MAC does not use DSA. in mtk_open()
3528 spin_lock_bh(ð->page_lock); in mtk_stop_dma()
3532 spin_unlock_bh(ð->page_lock); in mtk_stop_dma()
3547 struct mtk_mac *mac = netdev_priv(dev); in mtk_stop() local
3548 struct mtk_eth *eth = mac->hw; in mtk_stop()
3551 phylink_stop(mac->phylink); in mtk_stop()
3555 phylink_disconnect_phy(mac->phylink); in mtk_stop()
3558 if (!refcount_dec_and_test(ð->dma_refcnt)) in mtk_stop()
3565 mtk_rx_irq_disable(eth, eth->soc->rx.irq_done_mask); in mtk_stop()
3566 napi_disable(ð->tx_napi); in mtk_stop()
3567 napi_disable(ð->rx_napi); in mtk_stop()
3569 cancel_work_sync(ð->rx_dim.work); in mtk_stop()
3570 cancel_work_sync(ð->tx_dim.work); in mtk_stop()
3572 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_stop()
3573 mtk_stop_dma(eth, eth->soc->reg_map->qdma.glo_cfg); in mtk_stop()
3574 mtk_stop_dma(eth, eth->soc->reg_map->pdma.glo_cfg); in mtk_stop()
3578 for (i = 0; i < ARRAY_SIZE(eth->ppe); i++) in mtk_stop()
3579 mtk_ppe_stop(eth->ppe[i]); in mtk_stop()
3587 struct mtk_mac *mac = netdev_priv(dev); in mtk_xdp_setup() local
3588 struct mtk_eth *eth = mac->hw; in mtk_xdp_setup()
3592 if (eth->hwlro) { in mtk_xdp_setup()
3594 return -EOPNOTSUPP; in mtk_xdp_setup()
3597 if (dev->mtu > MTK_PP_MAX_BUF_SIZE) { in mtk_xdp_setup()
3599 return -EOPNOTSUPP; in mtk_xdp_setup()
3602 need_update = !!eth->prog != !!prog; in mtk_xdp_setup()
3606 old_prog = rcu_replace_pointer(eth->prog, prog, lockdep_rtnl_is_held()); in mtk_xdp_setup()
3618 switch (xdp->command) { in mtk_xdp()
3620 return mtk_xdp_setup(dev, xdp->prog, xdp->extack); in mtk_xdp()
3622 return -EINVAL; in mtk_xdp()
3628 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, in ethsys_reset()
3633 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, in ethsys_reset()
3641 int clk; in mtk_clk_disable() local
3643 for (clk = MTK_CLK_MAX - 1; clk >= 0; clk--) in mtk_clk_disable()
3644 clk_disable_unprepare(eth->clks[clk]); in mtk_clk_disable()
3649 int clk, ret; in mtk_clk_enable() local
3651 for (clk = 0; clk < MTK_CLK_MAX ; clk++) { in mtk_clk_enable()
3652 ret = clk_prepare_enable(eth->clks[clk]); in mtk_clk_enable()
3660 while (--clk >= 0) in mtk_clk_enable()
3661 clk_disable_unprepare(eth->clks[clk]); in mtk_clk_enable()
3670 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_dim_rx()
3674 cur_profile = net_dim_get_rx_moderation(eth->rx_dim.mode, in mtk_dim_rx()
3675 dim->profile_ix); in mtk_dim_rx()
3676 spin_lock_bh(ð->dim_lock); in mtk_dim_rx()
3678 val = mtk_r32(eth, reg_map->pdma.delay_irq); in mtk_dim_rx()
3688 mtk_w32(eth, val, reg_map->pdma.delay_irq); in mtk_dim_rx()
3689 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_dim_rx()
3690 mtk_w32(eth, val, reg_map->qdma.delay_irq); in mtk_dim_rx()
3692 spin_unlock_bh(ð->dim_lock); in mtk_dim_rx()
3694 dim->state = DIM_START_MEASURE; in mtk_dim_rx()
3701 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_dim_tx()
3705 cur_profile = net_dim_get_tx_moderation(eth->tx_dim.mode, in mtk_dim_tx()
3706 dim->profile_ix); in mtk_dim_tx()
3707 spin_lock_bh(ð->dim_lock); in mtk_dim_tx()
3709 val = mtk_r32(eth, reg_map->pdma.delay_irq); in mtk_dim_tx()
3719 mtk_w32(eth, val, reg_map->pdma.delay_irq); in mtk_dim_tx()
3720 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_dim_tx()
3721 mtk_w32(eth, val, reg_map->qdma.delay_irq); in mtk_dim_tx()
3723 spin_unlock_bh(ð->dim_lock); in mtk_dim_tx()
3725 dim->state = DIM_START_MEASURE; in mtk_dim_tx()
3728 static void mtk_set_mcr_max_rx(struct mtk_mac *mac, u32 val) in mtk_set_mcr_max_rx() argument
3730 struct mtk_eth *eth = mac->hw; in mtk_set_mcr_max_rx()
3733 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_set_mcr_max_rx()
3736 mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); in mtk_set_mcr_max_rx()
3749 mtk_w32(mac->hw, mcr_new, MTK_MAC_MCR(mac->id)); in mtk_set_mcr_max_rx()
3757 regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, 0); in mtk_hw_reset()
3762 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) in mtk_hw_reset()
3765 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) in mtk_hw_reset()
3772 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) in mtk_hw_reset()
3781 regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, in mtk_hw_reset()
3784 regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, in mtk_hw_reset()
3792 regmap_read(eth->ethsys, ETHSYS_RSTCTRL, &val); in mtk_hw_reset_read()
3800 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, RSTCTRL_FE, in mtk_hw_warm_reset()
3804 dev_err(eth->dev, "warm reset failed\n"); in mtk_hw_warm_reset()
3811 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) in mtk_hw_warm_reset()
3813 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) in mtk_hw_warm_reset()
3819 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) in mtk_hw_warm_reset()
3825 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, rst_mask, rst_mask); in mtk_hw_warm_reset()
3830 dev_err(eth->dev, "warm reset stage0 failed %08x (%08x)\n", in mtk_hw_warm_reset()
3834 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, rst_mask, ~rst_mask); in mtk_hw_warm_reset()
3839 dev_err(eth->dev, "warm reset stage1 failed %08x (%08x)\n", in mtk_hw_warm_reset()
3845 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_hw_check_dma_hang()
3853 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_hw_check_dma_hang()
3857 wdidx = mtk_r32(eth, reg_map->wdma_base[0] + 0xc); in mtk_hw_check_dma_hang()
3859 val = mtk_r32(eth, reg_map->wdma_base[0] + 0x204); in mtk_hw_check_dma_hang()
3862 val = mtk_r32(eth, reg_map->wdma_base[0] + 0x230); in mtk_hw_check_dma_hang()
3865 oq_free = (!(mtk_r32(eth, reg_map->pse_oq_sta) & GENMASK(24, 16)) && in mtk_hw_check_dma_hang()
3866 !(mtk_r32(eth, reg_map->pse_oq_sta + 0x4) & GENMASK(8, 0)) && in mtk_hw_check_dma_hang()
3867 !(mtk_r32(eth, reg_map->pse_oq_sta + 0x10) & GENMASK(24, 16))); in mtk_hw_check_dma_hang()
3869 if (wdidx == eth->reset.wdidx && wtx_busy && cdm_full && oq_free) { in mtk_hw_check_dma_hang()
3870 if (++eth->reset.wdma_hang_count > 2) { in mtk_hw_check_dma_hang()
3871 eth->reset.wdma_hang_count = 0; in mtk_hw_check_dma_hang()
3878 qfsm_hang = !!mtk_r32(eth, reg_map->qdma.qtx_cfg + 0x234); in mtk_hw_check_dma_hang()
3879 qfwd_hang = !mtk_r32(eth, reg_map->qdma.qtx_cfg + 0x308); in mtk_hw_check_dma_hang()
3885 gdm1_fc = mtk_r32(eth, reg_map->gdm1_cnt + 0x24); in mtk_hw_check_dma_hang()
3886 gdm2_fc = mtk_r32(eth, reg_map->gdm1_cnt + 0x64); in mtk_hw_check_dma_hang()
3891 if (++eth->reset.qdma_hang_count > 2) { in mtk_hw_check_dma_hang()
3892 eth->reset.qdma_hang_count = 0; in mtk_hw_check_dma_hang()
3899 oq_hang = !!(mtk_r32(eth, reg_map->pse_oq_sta) & GENMASK(8, 0)); in mtk_hw_check_dma_hang()
3901 adma_busy = !(mtk_r32(eth, reg_map->pdma.adma_rx_dbg0) & GENMASK(4, 0)) && in mtk_hw_check_dma_hang()
3902 !(mtk_r32(eth, reg_map->pdma.adma_rx_dbg0) & BIT(6)); in mtk_hw_check_dma_hang()
3905 if (++eth->reset.adma_hang_count > 2) { in mtk_hw_check_dma_hang()
3906 eth->reset.adma_hang_count = 0; in mtk_hw_check_dma_hang()
3912 eth->reset.wdma_hang_count = 0; in mtk_hw_check_dma_hang()
3913 eth->reset.qdma_hang_count = 0; in mtk_hw_check_dma_hang()
3914 eth->reset.adma_hang_count = 0; in mtk_hw_check_dma_hang()
3916 eth->reset.wdidx = wdidx; in mtk_hw_check_dma_hang()
3927 if (test_bit(MTK_RESETTING, ð->state)) in mtk_hw_reset_monitor_work()
3932 schedule_work(ð->pending_work); in mtk_hw_reset_monitor_work()
3935 schedule_delayed_work(ð->reset.monitor_work, in mtk_hw_reset_monitor_work()
3943 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_hw_init()
3946 if (!reset && test_and_set_bit(MTK_HW_INIT, ð->state)) in mtk_hw_init()
3950 pm_runtime_enable(eth->dev); in mtk_hw_init()
3951 pm_runtime_get_sync(eth->dev); in mtk_hw_init()
3958 if (eth->ethsys) in mtk_hw_init()
3959 regmap_update_bits(eth->ethsys, ETHSYS_DMA_AG_MAP, dma_mask, in mtk_hw_init()
3960 of_dma_is_coherent(eth->dma_dev->of_node) * dma_mask); in mtk_hw_init()
3962 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { in mtk_hw_init()
3963 ret = device_reset(eth->dev); in mtk_hw_init()
3965 dev_err(eth->dev, "MAC reset failed!\n"); in mtk_hw_init()
3970 mtk_dim_rx(ð->rx_dim.work); in mtk_hw_init()
3971 mtk_dim_tx(ð->tx_dim.work); in mtk_hw_init()
3988 if (reset && !MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_hw_init()
3997 if (eth->pctl) { in mtk_hw_init()
3999 regmap_write(eth->pctl, GPIO_DRV_SEL10, 0xa00); in mtk_hw_init()
4002 regmap_write(eth->pctl, GPIO_OD33_CTRL8, 0x5); in mtk_hw_init()
4005 regmap_write(eth->pctl, GPIO_BIAS_CTRL, 0x0); in mtk_hw_init()
4013 struct net_device *dev = eth->netdev[i]; in mtk_hw_init()
4020 dev->mtu + MTK_RX_ETH_HLEN); in mtk_hw_init()
4036 mtk_dim_rx(ð->rx_dim.work); in mtk_hw_init()
4037 mtk_dim_tx(ð->tx_dim.work); in mtk_hw_init()
4044 mtk_w32(eth, MTK_TX_DONE_INT, reg_map->pdma.int_grp); in mtk_hw_init()
4045 mtk_w32(eth, eth->soc->rx.irq_done_mask, reg_map->pdma.int_grp + 4); in mtk_hw_init()
4046 mtk_w32(eth, MTK_TX_DONE_INT, reg_map->qdma.int_grp); in mtk_hw_init()
4047 mtk_w32(eth, eth->soc->rx.irq_done_mask, reg_map->qdma.int_grp + 4); in mtk_hw_init()
4059 * WDMA Tx in mtk_hw_init()
4082 mtk_r32(eth, reg_map->gdm1_cnt + 0x100 + i); in mtk_hw_init()
4084 /* PSE should not drop port8 and port9 packets from WDMA Tx */ in mtk_hw_init()
4126 pm_runtime_put_sync(eth->dev); in mtk_hw_init()
4127 pm_runtime_disable(eth->dev); in mtk_hw_init()
4135 if (!test_and_clear_bit(MTK_HW_INIT, ð->state)) in mtk_hw_deinit()
4140 pm_runtime_put_sync(eth->dev); in mtk_hw_deinit()
4141 pm_runtime_disable(eth->dev); in mtk_hw_deinit()
4148 struct mtk_mac *mac = netdev_priv(dev); in mtk_uninit() local
4149 struct mtk_eth *eth = mac->hw; in mtk_uninit()
4151 phylink_disconnect_phy(mac->phylink); in mtk_uninit()
4159 struct mtk_mac *mac = netdev_priv(dev); in mtk_change_mtu() local
4160 struct mtk_eth *eth = mac->hw; in mtk_change_mtu()
4162 if (rcu_access_pointer(eth->prog) && in mtk_change_mtu()
4165 return -EINVAL; in mtk_change_mtu()
4168 mtk_set_mcr_max_rx(mac, length); in mtk_change_mtu()
4169 WRITE_ONCE(dev->mtu, new_mtu); in mtk_change_mtu()
4176 struct mtk_mac *mac = netdev_priv(dev); in mtk_do_ioctl() local
4182 return phylink_mii_ioctl(mac->phylink, ifr, cmd); in mtk_do_ioctl()
4187 return -EOPNOTSUPP; in mtk_do_ioctl()
4200 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) in mtk_prepare_for_reset()
4202 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) in mtk_prepare_for_reset()
4208 for (i = 0; i < ARRAY_SIZE(eth->ppe); i++) in mtk_prepare_for_reset()
4209 mtk_ppe_prepare_reset(eth->ppe[i]); in mtk_prepare_for_reset()
4229 set_bit(MTK_RESETTING, ð->state); in mtk_pending_work()
4240 if (!eth->netdev[i] || !netif_running(eth->netdev[i])) in mtk_pending_work()
4243 mtk_stop(eth->netdev[i]); in mtk_pending_work()
4249 if (eth->dev->pins) in mtk_pending_work()
4250 pinctrl_select_state(eth->dev->pins->p, in mtk_pending_work()
4251 eth->dev->pins->default_state); in mtk_pending_work()
4256 if (!eth->netdev[i] || !test_bit(i, &restart)) in mtk_pending_work()
4259 if (mtk_open(eth->netdev[i])) { in mtk_pending_work()
4260 netif_alert(eth, ifup, eth->netdev[i], in mtk_pending_work()
4262 dev_close(eth->netdev[i]); in mtk_pending_work()
4271 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) in mtk_pending_work()
4273 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) in mtk_pending_work()
4279 clear_bit(MTK_RESETTING, ð->state); in mtk_pending_work()
4291 if (!eth->netdev[i]) in mtk_free_dev()
4293 free_netdev(eth->netdev[i]); in mtk_free_dev()
4296 for (i = 0; i < ARRAY_SIZE(eth->dsa_meta); i++) { in mtk_free_dev()
4297 if (!eth->dsa_meta[i]) in mtk_free_dev()
4299 metadata_dst_free(eth->dsa_meta[i]); in mtk_free_dev()
4310 struct mtk_mac *mac; in mtk_unreg_dev() local
4311 if (!eth->netdev[i]) in mtk_unreg_dev()
4313 mac = netdev_priv(eth->netdev[i]); in mtk_unreg_dev()
4314 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_unreg_dev()
4315 unregister_netdevice_notifier(&mac->device_notifier); in mtk_unreg_dev()
4316 unregister_netdev(eth->netdev[i]); in mtk_unreg_dev()
4327 mtk_pcs_lynxi_destroy(eth->sgmii_pcs[i]); in mtk_sgmii_destroy()
4335 cancel_work_sync(ð->pending_work); in mtk_cleanup()
4336 cancel_delayed_work_sync(ð->reset.monitor_work); in mtk_cleanup()
4344 struct mtk_mac *mac = netdev_priv(ndev); in mtk_get_link_ksettings() local
4346 if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) in mtk_get_link_ksettings()
4347 return -EBUSY; in mtk_get_link_ksettings()
4349 return phylink_ethtool_ksettings_get(mac->phylink, cmd); in mtk_get_link_ksettings()
4355 struct mtk_mac *mac = netdev_priv(ndev); in mtk_set_link_ksettings() local
4357 if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) in mtk_set_link_ksettings()
4358 return -EBUSY; in mtk_set_link_ksettings()
4360 return phylink_ethtool_ksettings_set(mac->phylink, cmd); in mtk_set_link_ksettings()
4366 struct mtk_mac *mac = netdev_priv(dev); in mtk_get_drvinfo() local
4368 strscpy(info->driver, mac->hw->dev->driver->name, sizeof(info->driver)); in mtk_get_drvinfo()
4369 strscpy(info->bus_info, dev_name(mac->hw->dev), sizeof(info->bus_info)); in mtk_get_drvinfo()
4370 info->n_stats = ARRAY_SIZE(mtk_ethtool_stats); in mtk_get_drvinfo()
4375 struct mtk_mac *mac = netdev_priv(dev); in mtk_get_msglevel() local
4377 return mac->hw->msg_enable; in mtk_get_msglevel()
4382 struct mtk_mac *mac = netdev_priv(dev); in mtk_set_msglevel() local
4384 mac->hw->msg_enable = value; in mtk_set_msglevel()
4389 struct mtk_mac *mac = netdev_priv(dev); in mtk_nway_reset() local
4391 if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) in mtk_nway_reset()
4392 return -EBUSY; in mtk_nway_reset()
4394 if (!mac->phylink) in mtk_nway_reset()
4395 return -ENOTSUPP; in mtk_nway_reset()
4397 return phylink_ethtool_nway_reset(mac->phylink); in mtk_nway_reset()
4406 struct mtk_mac *mac = netdev_priv(dev); in mtk_get_strings() local
4410 if (mtk_page_pool_enabled(mac->hw)) in mtk_get_strings()
4424 struct mtk_mac *mac = netdev_priv(dev); in mtk_get_sset_count() local
4426 if (mtk_page_pool_enabled(mac->hw)) in mtk_get_sset_count()
4431 return -EOPNOTSUPP; in mtk_get_sset_count()
4440 for (i = 0; i < ARRAY_SIZE(eth->rx_ring); i++) { in mtk_ethtool_pp_stats()
4441 struct mtk_rx_ring *ring = ð->rx_ring[i]; in mtk_ethtool_pp_stats()
4443 if (!ring->page_pool) in mtk_ethtool_pp_stats()
4446 page_pool_get_stats(ring->page_pool, &stats); in mtk_ethtool_pp_stats()
4454 struct mtk_mac *mac = netdev_priv(dev); in mtk_get_ethtool_stats() local
4455 struct mtk_hw_stats *hwstats = mac->hw_stats; in mtk_get_ethtool_stats()
4460 if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) in mtk_get_ethtool_stats()
4464 if (spin_trylock_bh(&hwstats->stats_lock)) { in mtk_get_ethtool_stats()
4465 mtk_stats_update_mac(mac); in mtk_get_ethtool_stats()
4466 spin_unlock_bh(&hwstats->stats_lock); in mtk_get_ethtool_stats()
4474 start = u64_stats_fetch_begin(&hwstats->syncp); in mtk_get_ethtool_stats()
4478 if (mtk_page_pool_enabled(mac->hw)) in mtk_get_ethtool_stats()
4479 mtk_ethtool_pp_stats(mac->hw, data_dst); in mtk_get_ethtool_stats()
4480 } while (u64_stats_fetch_retry(&hwstats->syncp, start)); in mtk_get_ethtool_stats()
4486 int ret = -EOPNOTSUPP; in mtk_get_rxnfc()
4488 switch (cmd->cmd) { in mtk_get_rxnfc()
4490 if (dev->hw_features & NETIF_F_LRO) { in mtk_get_rxnfc()
4491 cmd->data = MTK_MAX_RX_RING_NUM; in mtk_get_rxnfc()
4496 if (dev->hw_features & NETIF_F_LRO) { in mtk_get_rxnfc()
4497 struct mtk_mac *mac = netdev_priv(dev); in mtk_get_rxnfc() local
4499 cmd->rule_cnt = mac->hwlro_ip_cnt; in mtk_get_rxnfc()
4504 if (dev->hw_features & NETIF_F_LRO) in mtk_get_rxnfc()
4508 if (dev->hw_features & NETIF_F_LRO) in mtk_get_rxnfc()
4521 int ret = -EOPNOTSUPP; in mtk_set_rxnfc()
4523 switch (cmd->cmd) { in mtk_set_rxnfc()
4525 if (dev->hw_features & NETIF_F_LRO) in mtk_set_rxnfc()
4529 if (dev->hw_features & NETIF_F_LRO) in mtk_set_rxnfc()
4541 struct mtk_mac *mac = netdev_priv(dev); in mtk_get_pauseparam() local
4543 phylink_ethtool_get_pauseparam(mac->phylink, pause); in mtk_get_pauseparam()
4548 struct mtk_mac *mac = netdev_priv(dev); in mtk_set_pauseparam() local
4550 return phylink_ethtool_set_pauseparam(mac->phylink, pause); in mtk_set_pauseparam()
4555 struct mtk_mac *mac = netdev_priv(dev); in mtk_get_eee() local
4557 return phylink_ethtool_get_eee(mac->phylink, eee); in mtk_get_eee()
4562 struct mtk_mac *mac = netdev_priv(dev); in mtk_set_eee() local
4564 return phylink_ethtool_set_eee(mac->phylink, eee); in mtk_set_eee()
4570 struct mtk_mac *mac = netdev_priv(dev); in mtk_select_queue() local
4576 queue = mac->id; in mtk_select_queue()
4578 if (queue >= dev->num_tx_queues) in mtk_select_queue()
4630 struct mtk_mac *mac; in mtk_add_mac() local
4636 dev_err(eth->dev, "missing mac id\n"); in mtk_add_mac()
4637 return -EINVAL; in mtk_add_mac()
4642 dev_err(eth->dev, "%d is not a valid mac id\n", id); in mtk_add_mac()
4643 return -EINVAL; in mtk_add_mac()
4646 if (eth->netdev[id]) { in mtk_add_mac()
4647 dev_err(eth->dev, "duplicate mac id found: %d\n", id); in mtk_add_mac()
4648 return -EINVAL; in mtk_add_mac()
4651 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_add_mac()
4654 eth->netdev[id] = alloc_etherdev_mqs(sizeof(*mac), txqs, 1); in mtk_add_mac()
4655 if (!eth->netdev[id]) { in mtk_add_mac()
4656 dev_err(eth->dev, "alloc_etherdev failed\n"); in mtk_add_mac()
4657 return -ENOMEM; in mtk_add_mac()
4659 mac = netdev_priv(eth->netdev[id]); in mtk_add_mac()
4660 eth->mac[id] = mac; in mtk_add_mac()
4661 mac->id = id; in mtk_add_mac()
4662 mac->hw = eth; in mtk_add_mac()
4663 mac->of_node = np; in mtk_add_mac()
4665 err = of_get_ethdev_address(mac->of_node, eth->netdev[id]); in mtk_add_mac()
4666 if (err == -EPROBE_DEFER) in mtk_add_mac()
4670 /* If the mac address is invalid, use random mac address */ in mtk_add_mac()
4671 eth_hw_addr_random(eth->netdev[id]); in mtk_add_mac()
4672 dev_err(eth->dev, "generated random MAC address %pM\n", in mtk_add_mac()
4673 eth->netdev[id]->dev_addr); in mtk_add_mac()
4676 memset(mac->hwlro_ip, 0, sizeof(mac->hwlro_ip)); in mtk_add_mac()
4677 mac->hwlro_ip_cnt = 0; in mtk_add_mac()
4679 mac->hw_stats = devm_kzalloc(eth->dev, in mtk_add_mac()
4680 sizeof(*mac->hw_stats), in mtk_add_mac()
4682 if (!mac->hw_stats) { in mtk_add_mac()
4683 dev_err(eth->dev, "failed to allocate counter memory\n"); in mtk_add_mac()
4684 err = -ENOMEM; in mtk_add_mac()
4687 spin_lock_init(&mac->hw_stats->stats_lock); in mtk_add_mac()
4688 u64_stats_init(&mac->hw_stats->syncp); in mtk_add_mac()
4691 mac->hw_stats->reg_offset = id * 0x80; in mtk_add_mac()
4693 mac->hw_stats->reg_offset = id * 0x40; in mtk_add_mac()
4698 dev_err(eth->dev, "incorrect phy-mode\n"); in mtk_add_mac()
4702 /* mac config is not set */ in mtk_add_mac()
4703 mac->interface = PHY_INTERFACE_MODE_NA; in mtk_add_mac()
4704 mac->speed = SPEED_UNKNOWN; in mtk_add_mac()
4706 mac->phylink_config.dev = ð->netdev[id]->dev; in mtk_add_mac()
4707 mac->phylink_config.type = PHYLINK_NETDEV; in mtk_add_mac()
4708 mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | in mtk_add_mac()
4710 mac->phylink_config.lpi_capabilities = MAC_100FD | MAC_1000FD | in mtk_add_mac()
4712 mac->phylink_config.lpi_timer_default = 1000; in mtk_add_mac()
4714 /* MT7623 gmac0 is now missing its speed-specific PLL configuration in mtk_add_mac()
4715 * in its .mac_config method (since state->speed is not valid there. in mtk_add_mac()
4718 if (!mac->hw->soc->disable_pll_modes || mac->id != 0) { in mtk_add_mac()
4720 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4722 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4724 if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_RGMII)) in mtk_add_mac()
4725 phy_interface_set_rgmii(mac->phylink_config.supported_interfaces); in mtk_add_mac()
4728 if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_TRGMII) && !mac->id) in mtk_add_mac()
4730 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4733 if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_GMAC1_TRGMII) && in mtk_add_mac()
4734 MTK_HAS_CAPS(mac->hw->soc->caps, MTK_TRGMII_MT7621_CLK)) { in mtk_add_mac()
4735 regmap_read(eth->ethsys, ETHSYS_SYSCFG, &val); in mtk_add_mac()
4738 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4741 if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_SGMII)) { in mtk_add_mac()
4743 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4745 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4747 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4750 if (mtk_is_netsys_v3_or_greater(mac->hw) && in mtk_add_mac()
4751 MTK_HAS_CAPS(mac->hw->soc->caps, MTK_ESW) && in mtk_add_mac()
4753 mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | in mtk_add_mac()
4756 phy_interface_zero(mac->phylink_config.supported_interfaces); in mtk_add_mac()
4758 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4761 phylink = phylink_create(&mac->phylink_config, in mtk_add_mac()
4762 of_fwnode_handle(mac->of_node), in mtk_add_mac()
4769 mac->phylink = phylink; in mtk_add_mac()
4771 SET_NETDEV_DEV(eth->netdev[id], eth->dev); in mtk_add_mac()
4772 eth->netdev[id]->watchdog_timeo = 5 * HZ; in mtk_add_mac()
4773 eth->netdev[id]->netdev_ops = &mtk_netdev_ops; in mtk_add_mac()
4774 eth->netdev[id]->base_addr = (unsigned long)eth->base; in mtk_add_mac()
4776 eth->netdev[id]->hw_features = eth->soc->hw_features; in mtk_add_mac()
4777 if (eth->hwlro) in mtk_add_mac()
4778 eth->netdev[id]->hw_features |= NETIF_F_LRO; in mtk_add_mac()
4780 eth->netdev[id]->vlan_features = eth->soc->hw_features & in mtk_add_mac()
4782 eth->netdev[id]->features |= eth->soc->hw_features; in mtk_add_mac()
4783 eth->netdev[id]->ethtool_ops = &mtk_ethtool_ops; in mtk_add_mac()
4785 eth->netdev[id]->irq = eth->irq[0]; in mtk_add_mac()
4786 eth->netdev[id]->dev.of_node = np; in mtk_add_mac()
4788 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_add_mac()
4789 eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH - MTK_RX_ETH_HLEN; in mtk_add_mac()
4791 eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH_2K - MTK_RX_ETH_HLEN; in mtk_add_mac()
4793 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in mtk_add_mac()
4794 mac->device_notifier.notifier_call = mtk_device_event; in mtk_add_mac()
4795 register_netdevice_notifier(&mac->device_notifier); in mtk_add_mac()
4799 eth->netdev[id]->xdp_features = NETDEV_XDP_ACT_BASIC | in mtk_add_mac()
4807 free_netdev(eth->netdev[id]); in mtk_add_mac()
4820 dev = eth->netdev[i]; in mtk_eth_set_dma_device()
4822 if (!dev || !(dev->flags & IFF_UP)) in mtk_eth_set_dma_device()
4825 list_add_tail(&dev->close_list, &dev_list); in mtk_eth_set_dma_device()
4830 eth->dma_dev = dma_dev; in mtk_eth_set_dma_device()
4833 list_del_init(&dev->close_list); in mtk_eth_set_dma_device()
4848 np = of_parse_phandle(eth->dev->of_node, "mediatek,sgmiisys", i); in mtk_sgmii_init()
4862 eth->sgmii_pcs[i] = mtk_pcs_lynxi_create(eth->dev, regmap, in mtk_sgmii_init()
4863 eth->soc->ana_rgc3, in mtk_sgmii_init()
4877 eth = devm_kzalloc(&pdev->dev, sizeof(*eth), GFP_KERNEL); in mtk_probe()
4879 return -ENOMEM; in mtk_probe()
4881 eth->soc = of_device_get_match_data(&pdev->dev); in mtk_probe()
4883 eth->dev = &pdev->dev; in mtk_probe()
4884 eth->dma_dev = &pdev->dev; in mtk_probe()
4885 eth->base = devm_platform_ioremap_resource(pdev, 0); in mtk_probe()
4886 if (IS_ERR(eth->base)) in mtk_probe()
4887 return PTR_ERR(eth->base); in mtk_probe()
4889 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_probe()
4890 eth->ip_align = NET_IP_ALIGN; in mtk_probe()
4892 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM)) { in mtk_probe()
4898 eth->sram_base = (void __force *)devm_platform_ioremap_resource(pdev, 1); in mtk_probe()
4899 if (IS_ERR(eth->sram_base)) in mtk_probe()
4900 return PTR_ERR(eth->sram_base); in mtk_probe()
4902 eth->sram_base = (void __force *)eth->base + MTK_ETH_SRAM_OFFSET; in mtk_probe()
4906 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) { in mtk_probe()
4907 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(36)); in mtk_probe()
4909 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); in mtk_probe()
4912 dev_err(&pdev->dev, "Wrong DMA config\n"); in mtk_probe()
4913 return -EINVAL; in mtk_probe()
4917 spin_lock_init(ð->page_lock); in mtk_probe()
4918 spin_lock_init(ð->tx_irq_lock); in mtk_probe()
4919 spin_lock_init(ð->rx_irq_lock); in mtk_probe()
4920 spin_lock_init(ð->dim_lock); in mtk_probe()
4922 eth->rx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; in mtk_probe()
4923 INIT_WORK(ð->rx_dim.work, mtk_dim_rx); in mtk_probe()
4924 INIT_DELAYED_WORK(ð->reset.monitor_work, mtk_hw_reset_monitor_work); in mtk_probe()
4926 eth->tx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; in mtk_probe()
4927 INIT_WORK(ð->tx_dim.work, mtk_dim_tx); in mtk_probe()
4929 if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { in mtk_probe()
4930 eth->ethsys = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in mtk_probe()
4932 if (IS_ERR(eth->ethsys)) { in mtk_probe()
4933 dev_err(&pdev->dev, "no ethsys regmap found\n"); in mtk_probe()
4934 return PTR_ERR(eth->ethsys); in mtk_probe()
4938 if (MTK_HAS_CAPS(eth->soc->caps, MTK_INFRA)) { in mtk_probe()
4939 eth->infra = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in mtk_probe()
4941 if (IS_ERR(eth->infra)) { in mtk_probe()
4942 dev_err(&pdev->dev, "no infracfg regmap found\n"); in mtk_probe()
4943 return PTR_ERR(eth->infra); in mtk_probe()
4947 if (of_dma_is_coherent(pdev->dev.of_node)) { in mtk_probe()
4950 cci = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in mtk_probe()
4951 "cci-control-port"); in mtk_probe()
4957 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) { in mtk_probe()
4964 if (eth->soc->required_pctl) { in mtk_probe()
4965 eth->pctl = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in mtk_probe()
4967 if (IS_ERR(eth->pctl)) { in mtk_probe()
4968 dev_err(&pdev->dev, "no pctl regmap found\n"); in mtk_probe()
4969 err = PTR_ERR(eth->pctl); in mtk_probe()
4977 err = -EINVAL; in mtk_probe()
4980 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM)) { in mtk_probe()
4984 err = -EINVAL; in mtk_probe()
4987 eth->phy_scratch_ring = res_sram->start; in mtk_probe()
4989 eth->phy_scratch_ring = res->start + MTK_ETH_SRAM_OFFSET; in mtk_probe()
4994 if (eth->soc->offload_version) { in mtk_probe()
5000 if (i >= ARRAY_SIZE(eth->soc->reg_map->wdma_base)) in mtk_probe()
5003 np = of_parse_phandle(pdev->dev.of_node, in mtk_probe()
5008 wdma_base = eth->soc->reg_map->wdma_base[i]; in mtk_probe()
5009 wdma_phy = res ? res->start + wdma_base : 0; in mtk_probe()
5010 mtk_wed_add_hw(np, eth, eth->base + wdma_base, in mtk_probe()
5016 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_INT) && i > 0) in mtk_probe()
5017 eth->irq[i] = eth->irq[0]; in mtk_probe()
5019 eth->irq[i] = platform_get_irq(pdev, i); in mtk_probe()
5020 if (eth->irq[i] < 0) { in mtk_probe()
5021 dev_err(&pdev->dev, "no IRQ%d resource found\n", i); in mtk_probe()
5022 err = -ENXIO; in mtk_probe()
5026 for (i = 0; i < ARRAY_SIZE(eth->clks); i++) { in mtk_probe()
5027 eth->clks[i] = devm_clk_get(eth->dev, in mtk_probe()
5029 if (IS_ERR(eth->clks[i])) { in mtk_probe()
5030 if (PTR_ERR(eth->clks[i]) == -EPROBE_DEFER) { in mtk_probe()
5031 err = -EPROBE_DEFER; in mtk_probe()
5034 if (eth->soc->required_clks & BIT(i)) { in mtk_probe()
5035 dev_err(&pdev->dev, "clock %s not found\n", in mtk_probe()
5037 err = -EINVAL; in mtk_probe()
5040 eth->clks[i] = NULL; in mtk_probe()
5044 eth->msg_enable = netif_msg_init(mtk_msg_level, MTK_DEFAULT_MSG_ENABLE); in mtk_probe()
5045 INIT_WORK(ð->pending_work, mtk_pending_work); in mtk_probe()
5051 eth->hwlro = MTK_HAS_CAPS(eth->soc->caps, MTK_HWLRO); in mtk_probe()
5053 for_each_child_of_node(pdev->dev.of_node, mac_np) { in mtk_probe()
5055 "mediatek,eth-mac")) in mtk_probe()
5068 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_INT)) { in mtk_probe()
5069 err = devm_request_irq(eth->dev, eth->irq[0], in mtk_probe()
5071 dev_name(eth->dev), eth); in mtk_probe()
5073 err = devm_request_irq(eth->dev, eth->irq[1], in mtk_probe()
5075 dev_name(eth->dev), eth); in mtk_probe()
5079 err = devm_request_irq(eth->dev, eth->irq[2], in mtk_probe()
5081 dev_name(eth->dev), eth); in mtk_probe()
5087 if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { in mtk_probe()
5093 if (eth->soc->offload_version) { in mtk_probe()
5094 u8 ppe_num = eth->soc->ppe_num; in mtk_probe()
5096 ppe_num = min_t(u8, ARRAY_SIZE(eth->ppe), ppe_num); in mtk_probe()
5098 u32 ppe_addr = eth->soc->reg_map->ppe_base; in mtk_probe()
5101 eth->ppe[i] = mtk_ppe_init(eth, eth->base + ppe_addr, i); in mtk_probe()
5103 if (!eth->ppe[i]) { in mtk_probe()
5104 err = -ENOMEM; in mtk_probe()
5115 if (!eth->netdev[i]) in mtk_probe()
5118 err = register_netdev(eth->netdev[i]); in mtk_probe()
5120 dev_err(eth->dev, "error bringing up device\n"); in mtk_probe()
5123 netif_info(eth, probe, eth->netdev[i], in mtk_probe()
5125 eth->netdev[i]->base_addr, eth->irq[0]); in mtk_probe()
5131 eth->dummy_dev = alloc_netdev_dummy(0); in mtk_probe()
5132 if (!eth->dummy_dev) { in mtk_probe()
5133 err = -ENOMEM; in mtk_probe()
5134 dev_err(eth->dev, "failed to allocated dummy device\n"); in mtk_probe()
5137 netif_napi_add(eth->dummy_dev, ð->tx_napi, mtk_napi_tx); in mtk_probe()
5138 netif_napi_add(eth->dummy_dev, ð->rx_napi, mtk_napi_rx); in mtk_probe()
5141 schedule_delayed_work(ð->reset.monitor_work, in mtk_probe()
5166 struct mtk_mac *mac; in mtk_remove() local
5171 if (!eth->netdev[i]) in mtk_remove()
5173 mtk_stop(eth->netdev[i]); in mtk_remove()
5174 mac = netdev_priv(eth->netdev[i]); in mtk_remove()
5175 phylink_disconnect_phy(mac->phylink); in mtk_remove()
5181 netif_napi_del(ð->tx_napi); in mtk_remove()
5182 netif_napi_del(ð->rx_napi); in mtk_remove()
5184 free_netdev(eth->dummy_dev); in mtk_remove()
5195 .tx = {
5223 .tx = {
5253 .tx = {
5282 .tx = {
5308 .tx = {
5338 .tx = {
5368 .tx = {
5398 .tx = {
5422 .tx = {
5439 { .compatible = "mediatek,mt2701-eth", .data = &mt2701_data },
5440 { .compatible = "mediatek,mt7621-eth", .data = &mt7621_data },
5441 { .compatible = "mediatek,mt7622-eth", .data = &mt7622_data },
5442 { .compatible = "mediatek,mt7623-eth", .data = &mt7623_data },
5443 { .compatible = "mediatek,mt7629-eth", .data = &mt7629_data },
5444 { .compatible = "mediatek,mt7981-eth", .data = &mt7981_data },
5445 { .compatible = "mediatek,mt7986-eth", .data = &mt7986_data },
5446 { .compatible = "mediatek,mt7988-eth", .data = &mt7988_data },
5447 { .compatible = "ralink,rt5350-eth", .data = &rt5350_data },