Lines Matching +full:diff +full:- +full:channels
1 // SPDX-License-Identifier: GPL-2.0-only
109 #define AD4030_TCYC_ADJUSTED_NS (AD4030_TCYC_NS - AD4030_TCNVL_NS)
112 #define AD4632_TCYC_ADJUSTED_NS (AD4632_TCYC_NS - AD4030_TCNVL_NS)
138 const struct iio_chan_spec channels[AD4030_MAX_IIO_CHANNEL_NB]; member
141 /* Number of hardware channels */
166 s32 diff; member
170 s32 diff[2]; member
177 * For a chip with 2 hardware channel this will be used to create 2 common-mode
178 * channels:
179 * - voltage4
180 * - voltage5
181 * As the common-mode channels are after the differential ones, we compute the
183 * - _idx is the scan_index (the order in the output buffer)
184 * - _ch is the hardware channel number this common-mode channel is related
185 * - _idx - _ch gives us the number of channel in the chip
186 * - _idx - _ch * 2 is the starting number of the common-mode channels, since
187 * for each differential channel there is a common-mode channel
188 * - _idx - _ch * 2 + _ch gives the channel number for this specific common-mode
197 .channel = ((_idx) - (_ch)) * 2 + (_ch), \
209 * channels:
210 * - voltage0-voltage1
211 * - voltage2-voltage3
244 st->tx_data[0] = AD4030_REG_ACCESS; in ad4030_enter_config_mode()
247 .tx_buf = st->tx_data, in ad4030_enter_config_mode()
253 return spi_sync_transfer(st->spi, &xfer, 1); in ad4030_enter_config_mode()
258 st->tx_data[0] = 0; in ad4030_exit_config_mode()
259 st->tx_data[1] = AD4030_REG_EXIT_CFG_MODE; in ad4030_exit_config_mode()
260 st->tx_data[2] = AD4030_REG_EXIT_CFG_MODE_EXIT_MSK; in ad4030_exit_config_mode()
263 .tx_buf = st->tx_data, in ad4030_exit_config_mode()
269 return spi_sync_transfer(st->spi, &xfer, 1); in ad4030_exit_config_mode()
278 .tx_buf = st->tx_data, in ad4030_spi_read()
279 .rx_buf = st->rx_data.raw, in ad4030_spi_read()
285 if (xfer.len > sizeof(st->tx_data) || in ad4030_spi_read()
286 xfer.len > sizeof(st->rx_data.raw)) in ad4030_spi_read()
287 return -EINVAL; in ad4030_spi_read()
293 memset(st->tx_data, 0, sizeof(st->tx_data)); in ad4030_spi_read()
294 memcpy(st->tx_data, reg, reg_size); in ad4030_spi_read()
296 ret = spi_sync_transfer(st->spi, &xfer, 1); in ad4030_spi_read()
300 memcpy(val, &st->rx_data.raw[reg_size], val_size); in ad4030_spi_read()
314 .tx_buf = st->tx_data, in ad4030_spi_write()
320 if (count > sizeof(st->tx_data)) in ad4030_spi_write()
321 return -EINVAL; in ad4030_spi_write()
327 memcpy(st->tx_data, data, count); in ad4030_spi_write()
329 ret = spi_sync_transfer(st->spi, &xfer, 1); in ad4030_spi_write()
393 if (chan->differential) { in ad4030_get_chan_scale()
395 st->chip->channels); in ad4030_get_chan_scale()
396 *val = (st->vref_uv * 2) / MILLI; in ad4030_get_chan_scale()
397 *val2 = scan_type->realbits; in ad4030_get_chan_scale()
401 *val = st->vref_uv / MILLI; in ad4030_get_chan_scale()
402 *val2 = chan->scan_type.realbits; in ad4030_get_chan_scale()
415 ret = regmap_bulk_read(st->regmap, AD4030_REG_GAIN_CHAN(chan->address), in ad4030_get_chan_calibscale()
416 st->rx_data.raw, AD4030_REG_GAIN_BYTES_NB); in ad4030_get_chan_calibscale()
420 gain = get_unaligned_be16(st->rx_data.raw); in ad4030_get_chan_calibscale()
430 /* Returns the offset where 1 LSB = (VREF/2^precision_bits - 1)/gain */
438 ret = regmap_bulk_read(st->regmap, in ad4030_get_chan_calibbias()
439 AD4030_REG_OFFSET_CHAN(chan->address), in ad4030_get_chan_calibbias()
440 st->rx_data.raw, AD4030_REG_OFFSET_BYTES_NB); in ad4030_get_chan_calibbias()
444 switch (st->chip->precision_bits) { in ad4030_get_chan_calibbias()
446 *val = sign_extend32(get_unaligned_be16(st->rx_data.raw), 15); in ad4030_get_chan_calibbias()
450 *val = sign_extend32(get_unaligned_be24(st->rx_data.raw), 23); in ad4030_get_chan_calibbias()
454 return -EINVAL; in ad4030_get_chan_calibbias()
467 return -EINVAL; in ad4030_set_chan_calibscale()
472 return -EINVAL; in ad4030_set_chan_calibscale()
476 st->tx_data); in ad4030_set_chan_calibscale()
478 return regmap_bulk_write(st->regmap, in ad4030_set_chan_calibscale()
479 AD4030_REG_GAIN_CHAN(chan->address), in ad4030_set_chan_calibscale()
480 st->tx_data, AD4030_REG_GAIN_BYTES_NB); in ad4030_set_chan_calibscale()
489 if (offset < st->offset_avail[0] || offset > st->offset_avail[2]) in ad4030_set_chan_calibbias()
490 return -EINVAL; in ad4030_set_chan_calibbias()
492 st->tx_data[2] = 0; in ad4030_set_chan_calibbias()
494 switch (st->chip->precision_bits) { in ad4030_set_chan_calibbias()
496 put_unaligned_be16(offset, st->tx_data); in ad4030_set_chan_calibbias()
500 put_unaligned_be24(offset, st->tx_data); in ad4030_set_chan_calibbias()
504 return -EINVAL; in ad4030_set_chan_calibbias()
507 return regmap_bulk_write(st->regmap, in ad4030_set_chan_calibbias()
508 AD4030_REG_OFFSET_CHAN(chan->address), in ad4030_set_chan_calibbias()
509 st->tx_data, AD4030_REG_OFFSET_BYTES_NB); in ad4030_set_chan_calibbias()
516 unsigned int last_avg_idx = ARRAY_SIZE(ad4030_average_modes) - 1; in ad4030_set_avg_frame_len()
520 return -EINVAL; in ad4030_set_avg_frame_len()
522 ret = regmap_write(st->regmap, AD4030_REG_AVG, in ad4030_set_avg_frame_len()
528 st->avg_log2 = avg_log2; in ad4030_set_avg_frame_len()
536 return mask & (st->chip->num_voltage_inputs == 1 ? in ad4030_is_common_byte_asked()
545 if (st->avg_log2 > 0) { in ad4030_set_mode()
546 st->mode = AD4030_OUT_DATA_MD_30_AVERAGED_DIFF; in ad4030_set_mode()
548 switch (st->chip->precision_bits) { in ad4030_set_mode()
550 st->mode = AD4030_OUT_DATA_MD_16_DIFF_8_COM; in ad4030_set_mode()
554 st->mode = AD4030_OUT_DATA_MD_24_DIFF_8_COM; in ad4030_set_mode()
558 return -EINVAL; in ad4030_set_mode()
561 st->mode = AD4030_OUT_DATA_MD_DIFF; in ad4030_set_mode()
564 st->current_scan_type = iio_get_current_scan_type(indio_dev, in ad4030_set_mode()
565 st->chip->channels); in ad4030_set_mode()
566 if (IS_ERR(st->current_scan_type)) in ad4030_set_mode()
567 return PTR_ERR(st->current_scan_type); in ad4030_set_mode()
569 return regmap_update_bits(st->regmap, AD4030_REG_MODES, in ad4030_set_mode()
571 st->mode); in ad4030_set_mode()
617 BITS_TO_BYTES(st->current_scan_type->realbits); in ad4030_conversion()
619 BITS_TO_BYTES(st->current_scan_type->storagebits); in ad4030_conversion()
621 unsigned long cnv_nb = BIT(st->avg_log2); in ad4030_conversion()
628 bytes_to_read += (st->mode == AD4030_OUT_DATA_MD_24_DIFF_8_COM || in ad4030_conversion()
629 st->mode == AD4030_OUT_DATA_MD_16_DIFF_8_COM) ? 1 : 0; in ad4030_conversion()
630 /* Mulitiply by the number of hardware channels */ in ad4030_conversion()
631 bytes_to_read *= st->chip->num_voltage_inputs; in ad4030_conversion()
634 gpiod_set_value_cansleep(st->cnv_gpio, 1); in ad4030_conversion()
636 gpiod_set_value_cansleep(st->cnv_gpio, 0); in ad4030_conversion()
637 ndelay(st->chip->tcyc_ns); in ad4030_conversion()
640 ret = spi_read(st->spi, st->rx_data.raw, bytes_to_read); in ad4030_conversion()
644 if (st->chip->num_voltage_inputs == 2) in ad4030_conversion()
645 ad4030_extract_interleaved(st->rx_data.raw, in ad4030_conversion()
646 &st->rx_data.dual.diff[0], in ad4030_conversion()
647 &st->rx_data.dual.diff[1]); in ad4030_conversion()
649 if (st->mode != AD4030_OUT_DATA_MD_16_DIFF_8_COM && in ad4030_conversion()
650 st->mode != AD4030_OUT_DATA_MD_24_DIFF_8_COM) in ad4030_conversion()
653 if (st->chip->num_voltage_inputs == 1) { in ad4030_conversion()
654 st->rx_data.single.common = st->rx_data.raw[diff_realbytes]; in ad4030_conversion()
658 for (i = 0; i < st->chip->num_voltage_inputs; i++) in ad4030_conversion()
659 st->rx_data.dual.common[i] = in ad4030_conversion()
660 st->rx_data.raw[diff_storagebytes * i + diff_realbytes]; in ad4030_conversion()
671 ret = ad4030_set_mode(indio_dev, BIT(chan->scan_index)); in ad4030_single_conversion()
675 st->current_scan_type = iio_get_current_scan_type(indio_dev, in ad4030_single_conversion()
676 st->chip->channels); in ad4030_single_conversion()
677 if (IS_ERR(st->current_scan_type)) in ad4030_single_conversion()
678 return PTR_ERR(st->current_scan_type); in ad4030_single_conversion()
684 if (chan->differential) in ad4030_single_conversion()
685 if (st->chip->num_voltage_inputs == 1) in ad4030_single_conversion()
686 *val = st->rx_data.single.diff; in ad4030_single_conversion()
688 *val = st->rx_data.dual.diff[chan->address]; in ad4030_single_conversion()
690 if (st->chip->num_voltage_inputs == 1) in ad4030_single_conversion()
691 *val = st->rx_data.single.common; in ad4030_single_conversion()
693 *val = st->rx_data.dual.common[chan->address]; in ad4030_single_conversion()
701 struct iio_dev *indio_dev = pf->indio_dev; in ad4030_trigger_handler()
709 iio_push_to_buffers_with_timestamp(indio_dev, st->rx_data.raw, in ad4030_trigger_handler()
710 pf->timestamp); in ad4030_trigger_handler()
713 iio_trigger_notify_done(indio_dev->trig); in ad4030_trigger_handler()
733 *vals = st->offset_avail; in ad4030_read_avail()
749 return -EINVAL; in ad4030_read_avail()
770 *val = BIT(st->avg_log2); in ad4030_read_raw_dispatch()
774 return -EINVAL; in ad4030_read_raw_dispatch()
788 return -EBUSY; in ad4030_read_raw()
807 return -EINVAL; in ad4030_write_raw_dispatch()
814 return -EINVAL; in ad4030_write_raw_dispatch()
825 return -EBUSY; in ad4030_write_raw()
841 return -EBUSY; in ad4030_reg_access()
844 ret = regmap_read(st->regmap, reg, readval); in ad4030_reg_access()
846 ret = regmap_write(st->regmap, reg, writeval); in ad4030_reg_access()
857 if (chan->differential) in ad4030_read_label()
858 return sprintf(label, "differential%lu\n", chan->address); in ad4030_read_label()
859 return sprintf(label, "common-mode%lu\n", chan->address); in ad4030_read_label()
867 return st->avg_log2 ? AD4030_SCAN_TYPE_AVG : AD4030_SCAN_TYPE_NORMAL; in ad4030_get_current_scan_type()
881 return ad4030_set_mode(indio_dev, *indio_dev->active_scan_mask); in ad4030_buffer_preenable()
889 /* Asking for both common channels and averaging */ in ad4030_validate_scan_mask()
890 if (st->avg_log2 && ad4030_is_common_byte_asked(st, *scan_mask)) in ad4030_validate_scan_mask()
903 struct device *dev = &st->spi->dev; in ad4030_regulators_get()
904 static const char * const ids[] = { "vdd-5v", "vdd-1v8" }; in ad4030_regulators_get()
911 st->vio_uv = devm_regulator_get_enable_read_voltage(dev, "vio"); in ad4030_regulators_get()
912 if (st->vio_uv < 0) in ad4030_regulators_get()
913 return dev_err_probe(dev, st->vio_uv, in ad4030_regulators_get()
916 st->vref_uv = devm_regulator_get_enable_read_voltage(dev, "ref"); in ad4030_regulators_get()
917 if (st->vref_uv < 0) { in ad4030_regulators_get()
918 if (st->vref_uv != -ENODEV) in ad4030_regulators_get()
919 return dev_err_probe(dev, st->vref_uv, in ad4030_regulators_get()
923 st->vref_uv = devm_regulator_get_enable_read_voltage(dev, in ad4030_regulators_get()
925 if (st->vref_uv < 0) in ad4030_regulators_get()
926 return dev_err_probe(dev, st->vref_uv, in ad4030_regulators_get()
935 struct device *dev = &st->spi->dev; in ad4030_reset()
949 return regmap_write(st->regmap, AD4030_REG_INTERFACE_CONFIG_A, in ad4030_reset()
958 ret = regmap_read(st->regmap, AD4030_REG_CHIP_GRADE, &grade); in ad4030_detect_chip_info()
963 if (grade != st->chip->grade) in ad4030_detect_chip_info()
964 dev_warn(&st->spi->dev, "Unknown grade(0x%x) for %s\n", grade, in ad4030_detect_chip_info()
965 st->chip->name); in ad4030_detect_chip_info()
975 st->offset_avail[0] = (int)BIT(st->chip->precision_bits - 1) * -1; in ad4030_config()
976 st->offset_avail[1] = 1; in ad4030_config()
977 st->offset_avail[2] = BIT(st->chip->precision_bits - 1) - 1; in ad4030_config()
979 if (st->chip->num_voltage_inputs > 1) in ad4030_config()
986 ret = regmap_write(st->regmap, AD4030_REG_MODES, reg_modes); in ad4030_config()
990 if (st->vio_uv < AD4030_VIO_THRESHOLD_UV) in ad4030_config()
991 return regmap_write(st->regmap, AD4030_REG_IO, in ad4030_config()
999 struct device *dev = &spi->dev; in ad4030_probe()
1006 return -ENOMEM; in ad4030_probe()
1009 st->spi = spi; in ad4030_probe()
1011 st->regmap = devm_regmap_init(dev, &ad4030_regmap_bus, st, in ad4030_probe()
1013 if (IS_ERR(st->regmap)) in ad4030_probe()
1014 return dev_err_probe(dev, PTR_ERR(st->regmap), in ad4030_probe()
1017 st->chip = spi_get_device_match_data(spi); in ad4030_probe()
1018 if (!st->chip) in ad4030_probe()
1019 return -EINVAL; in ad4030_probe()
1043 st->cnv_gpio = devm_gpiod_get(dev, "cnv", GPIOD_OUT_LOW); in ad4030_probe()
1044 if (IS_ERR(st->cnv_gpio)) in ad4030_probe()
1045 return dev_err_probe(dev, PTR_ERR(st->cnv_gpio), in ad4030_probe()
1049 * One hardware channel is split in two software channels when using in ad4030_probe()
1052 indio_dev->num_channels = 2 * st->chip->num_voltage_inputs + 1; in ad4030_probe()
1053 indio_dev->name = st->chip->name; in ad4030_probe()
1054 indio_dev->modes = INDIO_DIRECT_MODE; in ad4030_probe()
1055 indio_dev->info = &ad4030_iio_info; in ad4030_probe()
1056 indio_dev->channels = st->chip->channels; in ad4030_probe()
1057 indio_dev->available_scan_masks = st->chip->available_masks; in ad4030_probe()
1073 /* Differential and common-mode voltage */
1121 .name = "ad4030-24",
1123 .channels = {
1135 .name = "ad4630-16",
1137 .channels = {
1151 .name = "ad4630-24",
1153 .channels = {
1167 .name = "ad4632-16",
1169 .channels = {
1183 .name = "ad4632-24",
1185 .channels = {
1199 { "ad4030-24", (kernel_ulong_t)&ad4030_24_chip_info },
1200 { "ad4630-16", (kernel_ulong_t)&ad4630_16_chip_info },
1201 { "ad4630-24", (kernel_ulong_t)&ad4630_24_chip_info },
1202 { "ad4632-16", (kernel_ulong_t)&ad4632_16_chip_info },
1203 { "ad4632-24", (kernel_ulong_t)&ad4632_24_chip_info },
1209 { .compatible = "adi,ad4030-24", .data = &ad4030_24_chip_info },
1210 { .compatible = "adi,ad4630-16", .data = &ad4630_16_chip_info },
1211 { .compatible = "adi,ad4630-24", .data = &ad4630_24_chip_info },
1212 { .compatible = "adi,ad4632-16", .data = &ad4632_16_chip_info },
1213 { .compatible = "adi,ad4632-24", .data = &ad4632_24_chip_info },