Lines Matching +full:1 +full:st

75 #define     AD4030_REG_IO_MASK_IO2X		BIT(1)
83 /* Sequence starting with "1 0 1" to enable reg access */
93 * This accounts for 1 sample per channel plus one s64 for the timestamp,
195 .indexed = 1, \
225 .indexed = 1, \
228 .channel2 = (_idx) * 2 + 1, \
231 .has_ext_scan_type = 1, \
237 1, 2, 4, 8, 16, 32, 64, 128,
242 static int ad4030_enter_config_mode(struct ad4030_state *st) in ad4030_enter_config_mode() argument
244 st->tx_data[0] = AD4030_REG_ACCESS; in ad4030_enter_config_mode()
247 .tx_buf = st->tx_data, in ad4030_enter_config_mode()
249 .len = 1, in ad4030_enter_config_mode()
253 return spi_sync_transfer(st->spi, &xfer, 1); in ad4030_enter_config_mode()
256 static int ad4030_exit_config_mode(struct ad4030_state *st) in ad4030_exit_config_mode() argument
258 st->tx_data[0] = 0; in ad4030_exit_config_mode()
259 st->tx_data[1] = AD4030_REG_EXIT_CFG_MODE; in ad4030_exit_config_mode()
260 st->tx_data[2] = AD4030_REG_EXIT_CFG_MODE_EXIT_MSK; in ad4030_exit_config_mode()
263 .tx_buf = st->tx_data, in ad4030_exit_config_mode()
269 return spi_sync_transfer(st->spi, &xfer, 1); in ad4030_exit_config_mode()
276 struct ad4030_state *st = context; in ad4030_spi_read() local
278 .tx_buf = st->tx_data, in ad4030_spi_read()
279 .rx_buf = st->rx_data.raw, in ad4030_spi_read()
285 if (xfer.len > sizeof(st->tx_data) || in ad4030_spi_read()
286 xfer.len > sizeof(st->rx_data.raw)) in ad4030_spi_read()
289 ret = ad4030_enter_config_mode(st); in ad4030_spi_read()
293 memset(st->tx_data, 0, sizeof(st->tx_data)); in ad4030_spi_read()
294 memcpy(st->tx_data, reg, reg_size); in ad4030_spi_read()
296 ret = spi_sync_transfer(st->spi, &xfer, 1); in ad4030_spi_read()
300 memcpy(val, &st->rx_data.raw[reg_size], val_size); in ad4030_spi_read()
302 return ad4030_exit_config_mode(st); in ad4030_spi_read()
308 struct ad4030_state *st = context; in ad4030_spi_write() local
311 ((u8 *)data)[1] == 0 && in ad4030_spi_write()
314 .tx_buf = st->tx_data, in ad4030_spi_write()
320 if (count > sizeof(st->tx_data)) in ad4030_spi_write()
323 ret = ad4030_enter_config_mode(st); in ad4030_spi_write()
327 memcpy(st->tx_data, data, count); in ad4030_spi_write()
329 ret = spi_sync_transfer(st->spi, &xfer, 1); in ad4030_spi_write()
343 return ad4030_exit_config_mode(st); in ad4030_spi_write()
390 struct ad4030_state *st = iio_priv(indio_dev); in ad4030_get_chan_scale() local
395 st->chip->channels); in ad4030_get_chan_scale()
396 *val = (st->vref_uv * 2) / MILLI; in ad4030_get_chan_scale()
401 *val = st->vref_uv / MILLI; in ad4030_get_chan_scale()
411 struct ad4030_state *st = iio_priv(indio_dev); in ad4030_get_chan_calibscale() local
415 ret = regmap_bulk_read(st->regmap, AD4030_REG_GAIN_CHAN(chan->address), in ad4030_get_chan_calibscale()
416 st->rx_data.raw, AD4030_REG_GAIN_BYTES_NB); in ad4030_get_chan_calibscale()
420 gain = get_unaligned_be16(st->rx_data.raw); in ad4030_get_chan_calibscale()
430 /* Returns the offset where 1 LSB = (VREF/2^precision_bits - 1)/gain */
435 struct ad4030_state *st = iio_priv(indio_dev); in ad4030_get_chan_calibbias() local
438 ret = regmap_bulk_read(st->regmap, in ad4030_get_chan_calibbias()
440 st->rx_data.raw, AD4030_REG_OFFSET_BYTES_NB); in ad4030_get_chan_calibbias()
444 switch (st->chip->precision_bits) { in ad4030_get_chan_calibbias()
446 *val = sign_extend32(get_unaligned_be16(st->rx_data.raw), 15); in ad4030_get_chan_calibbias()
450 *val = sign_extend32(get_unaligned_be24(st->rx_data.raw), 23); in ad4030_get_chan_calibbias()
463 struct ad4030_state *st = iio_priv(indio_dev); in ad4030_set_chan_calibscale() local
476 st->tx_data); in ad4030_set_chan_calibscale()
478 return regmap_bulk_write(st->regmap, in ad4030_set_chan_calibscale()
480 st->tx_data, AD4030_REG_GAIN_BYTES_NB); in ad4030_set_chan_calibscale()
487 struct ad4030_state *st = iio_priv(indio_dev); in ad4030_set_chan_calibbias() local
489 if (offset < st->offset_avail[0] || offset > st->offset_avail[2]) in ad4030_set_chan_calibbias()
492 st->tx_data[2] = 0; in ad4030_set_chan_calibbias()
494 switch (st->chip->precision_bits) { in ad4030_set_chan_calibbias()
496 put_unaligned_be16(offset, st->tx_data); in ad4030_set_chan_calibbias()
500 put_unaligned_be24(offset, st->tx_data); in ad4030_set_chan_calibbias()
507 return regmap_bulk_write(st->regmap, in ad4030_set_chan_calibbias()
509 st->tx_data, AD4030_REG_OFFSET_BYTES_NB); in ad4030_set_chan_calibbias()
514 struct ad4030_state *st = iio_priv(dev); in ad4030_set_avg_frame_len() local
516 unsigned int last_avg_idx = ARRAY_SIZE(ad4030_average_modes) - 1; in ad4030_set_avg_frame_len()
522 ret = regmap_write(st->regmap, AD4030_REG_AVG, in ad4030_set_avg_frame_len()
528 st->avg_log2 = avg_log2; in ad4030_set_avg_frame_len()
533 static bool ad4030_is_common_byte_asked(struct ad4030_state *st, in ad4030_is_common_byte_asked() argument
536 return mask & (st->chip->num_voltage_inputs == 1 ? in ad4030_is_common_byte_asked()
543 struct ad4030_state *st = iio_priv(indio_dev); in ad4030_set_mode() local
545 if (st->avg_log2 > 0) { in ad4030_set_mode()
546 st->mode = AD4030_OUT_DATA_MD_30_AVERAGED_DIFF; in ad4030_set_mode()
547 } else if (ad4030_is_common_byte_asked(st, mask)) { in ad4030_set_mode()
548 switch (st->chip->precision_bits) { in ad4030_set_mode()
550 st->mode = AD4030_OUT_DATA_MD_16_DIFF_8_COM; in ad4030_set_mode()
554 st->mode = AD4030_OUT_DATA_MD_24_DIFF_8_COM; in ad4030_set_mode()
561 st->mode = AD4030_OUT_DATA_MD_DIFF; in ad4030_set_mode()
564 st->current_scan_type = iio_get_current_scan_type(indio_dev, in ad4030_set_mode()
565 st->chip->channels); in ad4030_set_mode()
566 if (IS_ERR(st->current_scan_type)) in ad4030_set_mode()
567 return PTR_ERR(st->current_scan_type); in ad4030_set_mode()
569 return regmap_update_bits(st->regmap, AD4030_REG_MODES, in ad4030_set_mode()
571 st->mode); in ad4030_set_mode()
576 * 1 bit for first number, 1 bit for the second, and so on...
587 l1 = src[i * 2 + 1]; in ad4030_extract_interleaved()
588 h1 = h0 << 1; in ad4030_extract_interleaved()
589 l0 = l1 >> 1; in ad4030_extract_interleaved()
615 struct ad4030_state *st = iio_priv(indio_dev); in ad4030_conversion() local
617 BITS_TO_BYTES(st->current_scan_type->realbits); in ad4030_conversion()
619 BITS_TO_BYTES(st->current_scan_type->storagebits); in ad4030_conversion()
621 unsigned long cnv_nb = BIT(st->avg_log2); in ad4030_conversion()
628 bytes_to_read += (st->mode == AD4030_OUT_DATA_MD_24_DIFF_8_COM || in ad4030_conversion()
629 st->mode == AD4030_OUT_DATA_MD_16_DIFF_8_COM) ? 1 : 0; in ad4030_conversion()
631 bytes_to_read *= st->chip->num_voltage_inputs; in ad4030_conversion()
634 gpiod_set_value_cansleep(st->cnv_gpio, 1); in ad4030_conversion()
636 gpiod_set_value_cansleep(st->cnv_gpio, 0); in ad4030_conversion()
637 ndelay(st->chip->tcyc_ns); in ad4030_conversion()
640 ret = spi_read(st->spi, st->rx_data.raw, bytes_to_read); in ad4030_conversion()
644 if (st->chip->num_voltage_inputs == 2) in ad4030_conversion()
645 ad4030_extract_interleaved(st->rx_data.raw, in ad4030_conversion()
646 &st->rx_data.dual.diff[0], in ad4030_conversion()
647 &st->rx_data.dual.diff[1]); in ad4030_conversion()
649 if (st->mode != AD4030_OUT_DATA_MD_16_DIFF_8_COM && in ad4030_conversion()
650 st->mode != AD4030_OUT_DATA_MD_24_DIFF_8_COM) in ad4030_conversion()
653 if (st->chip->num_voltage_inputs == 1) { in ad4030_conversion()
654 st->rx_data.single.common = st->rx_data.raw[diff_realbytes]; in ad4030_conversion()
658 for (i = 0; i < st->chip->num_voltage_inputs; i++) in ad4030_conversion()
659 st->rx_data.dual.common[i] = in ad4030_conversion()
660 st->rx_data.raw[diff_storagebytes * i + diff_realbytes]; in ad4030_conversion()
668 struct ad4030_state *st = iio_priv(indio_dev); in ad4030_single_conversion() local
675 st->current_scan_type = iio_get_current_scan_type(indio_dev, in ad4030_single_conversion()
676 st->chip->channels); in ad4030_single_conversion()
677 if (IS_ERR(st->current_scan_type)) in ad4030_single_conversion()
678 return PTR_ERR(st->current_scan_type); in ad4030_single_conversion()
685 if (st->chip->num_voltage_inputs == 1) in ad4030_single_conversion()
686 *val = st->rx_data.single.diff; in ad4030_single_conversion()
688 *val = st->rx_data.dual.diff[chan->address]; in ad4030_single_conversion()
690 if (st->chip->num_voltage_inputs == 1) in ad4030_single_conversion()
691 *val = st->rx_data.single.common; in ad4030_single_conversion()
693 *val = st->rx_data.dual.common[chan->address]; in ad4030_single_conversion()
702 struct ad4030_state *st = iio_priv(indio_dev); in ad4030_trigger_handler() local
709 iio_push_to_buffers_with_timestamp(indio_dev, st->rx_data.raw, in ad4030_trigger_handler()
721 { 1, 999969482 },
729 struct ad4030_state *st = iio_priv(indio_dev); in ad4030_read_avail() local
733 *vals = st->offset_avail; in ad4030_read_avail()
757 struct ad4030_state *st = iio_priv(indio_dev); in ad4030_read_raw_dispatch() local
770 *val = BIT(st->avg_log2); in ad4030_read_raw_dispatch()
837 const struct ad4030_state *st = iio_priv(indio_dev); in ad4030_reg_access() local
844 ret = regmap_read(st->regmap, reg, readval); in ad4030_reg_access()
846 ret = regmap_write(st->regmap, reg, writeval); in ad4030_reg_access()
865 struct ad4030_state *st = iio_priv(indio_dev); in ad4030_get_current_scan_type() local
867 return st->avg_log2 ? AD4030_SCAN_TYPE_AVG : AD4030_SCAN_TYPE_NORMAL; in ad4030_get_current_scan_type()
887 struct ad4030_state *st = iio_priv(indio_dev); in ad4030_validate_scan_mask() local
890 if (st->avg_log2 && ad4030_is_common_byte_asked(st, *scan_mask)) in ad4030_validate_scan_mask()
901 static int ad4030_regulators_get(struct ad4030_state *st) in ad4030_regulators_get() argument
903 struct device *dev = &st->spi->dev; in ad4030_regulators_get()
904 static const char * const ids[] = { "vdd-5v", "vdd-1v8" }; in ad4030_regulators_get()
911 st->vio_uv = devm_regulator_get_enable_read_voltage(dev, "vio"); in ad4030_regulators_get()
912 if (st->vio_uv < 0) in ad4030_regulators_get()
913 return dev_err_probe(dev, st->vio_uv, in ad4030_regulators_get()
916 st->vref_uv = devm_regulator_get_enable_read_voltage(dev, "ref"); in ad4030_regulators_get()
917 if (st->vref_uv < 0) { in ad4030_regulators_get()
918 if (st->vref_uv != -ENODEV) in ad4030_regulators_get()
919 return dev_err_probe(dev, st->vref_uv, in ad4030_regulators_get()
923 st->vref_uv = devm_regulator_get_enable_read_voltage(dev, in ad4030_regulators_get()
925 if (st->vref_uv < 0) in ad4030_regulators_get()
926 return dev_err_probe(dev, st->vref_uv, in ad4030_regulators_get()
933 static int ad4030_reset(struct ad4030_state *st) in ad4030_reset() argument
935 struct device *dev = &st->spi->dev; in ad4030_reset()
949 return regmap_write(st->regmap, AD4030_REG_INTERFACE_CONFIG_A, in ad4030_reset()
953 static int ad4030_detect_chip_info(const struct ad4030_state *st) in ad4030_detect_chip_info() argument
958 ret = regmap_read(st->regmap, AD4030_REG_CHIP_GRADE, &grade); in ad4030_detect_chip_info()
963 if (grade != st->chip->grade) in ad4030_detect_chip_info()
964 dev_warn(&st->spi->dev, "Unknown grade(0x%x) for %s\n", grade, in ad4030_detect_chip_info()
965 st->chip->name); in ad4030_detect_chip_info()
970 static int ad4030_config(struct ad4030_state *st) in ad4030_config() argument
975 st->offset_avail[0] = (int)BIT(st->chip->precision_bits - 1) * -1; in ad4030_config()
976 st->offset_avail[1] = 1; in ad4030_config()
977 st->offset_avail[2] = BIT(st->chip->precision_bits - 1) - 1; in ad4030_config()
979 if (st->chip->num_voltage_inputs > 1) in ad4030_config()
986 ret = regmap_write(st->regmap, AD4030_REG_MODES, reg_modes); in ad4030_config()
990 if (st->vio_uv < AD4030_VIO_THRESHOLD_UV) in ad4030_config()
991 return regmap_write(st->regmap, AD4030_REG_IO, in ad4030_config()
1001 struct ad4030_state *st; in ad4030_probe() local
1004 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); in ad4030_probe()
1008 st = iio_priv(indio_dev); in ad4030_probe()
1009 st->spi = spi; in ad4030_probe()
1011 st->regmap = devm_regmap_init(dev, &ad4030_regmap_bus, st, in ad4030_probe()
1013 if (IS_ERR(st->regmap)) in ad4030_probe()
1014 return dev_err_probe(dev, PTR_ERR(st->regmap), in ad4030_probe()
1017 st->chip = spi_get_device_match_data(spi); in ad4030_probe()
1018 if (!st->chip) in ad4030_probe()
1021 ret = ad4030_regulators_get(st); in ad4030_probe()
1031 ret = ad4030_reset(st); in ad4030_probe()
1035 ret = ad4030_detect_chip_info(st); in ad4030_probe()
1039 ret = ad4030_config(st); in ad4030_probe()
1043 st->cnv_gpio = devm_gpiod_get(dev, "cnv", GPIOD_OUT_LOW); in ad4030_probe()
1044 if (IS_ERR(st->cnv_gpio)) in ad4030_probe()
1045 return dev_err_probe(dev, PTR_ERR(st->cnv_gpio), in ad4030_probe()
1052 indio_dev->num_channels = 2 * st->chip->num_voltage_inputs + 1; in ad4030_probe()
1053 indio_dev->name = st->chip->name; in ad4030_probe()
1056 indio_dev->channels = st->chip->channels; in ad4030_probe()
1057 indio_dev->available_scan_masks = st->chip->available_masks; in ad4030_probe()
1074 GENMASK(1, 0),
1080 BIT(1) | BIT(0),
1125 AD4030_CHAN_CMO(1, 0),
1130 .num_voltage_inputs = 1,
1139 AD4030_CHAN_DIFF(1, ad4030_16_scan_types),
1141 AD4030_CHAN_CMO(3, 1),
1155 AD4030_CHAN_DIFF(1, ad4030_24_scan_types),
1157 AD4030_CHAN_CMO(3, 1),
1171 AD4030_CHAN_DIFF(1, ad4030_16_scan_types),
1173 AD4030_CHAN_CMO(3, 1),
1187 AD4030_CHAN_DIFF(1, ad4030_24_scan_types),
1189 AD4030_CHAN_CMO(3, 1),