hwtracing/coresight/coresight-tmc.h

56  * TMC AXICTL format for SoC-400
63  * TMC AXICTL format for SoC-600, as above except:
123 /* TMC ETR Capability bit definitions */
129  * retained when TMC leaves Disabled state, allowing us to continue
137 /* Coresight SoC-600 TMC-ETR unadvertised capabilities */
141 /* TMC metadata region for ETR and ETF configurations */
162 	ETR_MODE_ETR_SG,	/* Uses in-built TMC ETR SG mechanism */
176  * @hwaddr	: Address to be programmed in the TMC:DBA{LO,HI}
212  * struct tmc_drvdata - specifics associated to an TMC component
216  * @miscdev:	specifics to handle "/dev/xyz.tmc" entry.
225  * @etr_buf:	details of buffer used in TMC-ETR
227  * @size:	trace buffer size for this TMC (common for all modes).
229  *		TMC-ETR on AXI bus.
230  * @config_type: TMC variant, must be of type @tmc_config_type.
233  * @etr_caps:	Bitmask of capabilities of the TMC ETR, inferred from the
243  * @crash_mdata: Reserved memory for storing tmc crash metadata.
257 		char		*buf;		/* TMC ETB */
258 		struct etr_buf	*etr_buf;	/* TMC ETR */
298  * struct tmc_sg_table - Generic SG table for TMC