Lines Matching +full:18 +full:bpp
57 int bpp) in intel_vdsc_set_min_max_qp() argument
63 intel_lookup_range_min_qp(bpc, buf, bpp, vdsc_cfg->native_420); in intel_vdsc_set_min_max_qp()
65 intel_lookup_range_max_qp(bpc, buf, bpp, vdsc_cfg->native_420); in intel_vdsc_set_min_max_qp()
69 get_range_bpg_offset(int bpp_low, int offset_low, int bpp_high, int offset_high, int bpp) in get_range_bpg_offset() argument
71 return offset_low + DIV_ROUND_UP((offset_high - offset_low) * (bpp - bpp_low), in get_range_bpg_offset()
87 int bpp = fxp_q4_to_int(vdsc_cfg->bits_per_pixel); in calculate_rc_params() local
102 uncompressed_bpg_rate - 3 * bpp); in calculate_rc_params()
126 if (bpp >= 12) in calculate_rc_params()
128 else if (bpp >= 10) in calculate_rc_params()
129 vdsc_cfg->initial_offset = 5632 - DIV_ROUND_UP(((bpp - 10) * 3584), 2); in calculate_rc_params()
130 else if (bpp >= 8) in calculate_rc_params()
131 vdsc_cfg->initial_offset = 6144 - DIV_ROUND_UP(((bpp - 8) * 512), 2); in calculate_rc_params()
136 vdsc_cfg->initial_xmit_delay = DIV_ROUND_UP(DSC_RC_MODEL_SIZE_CONST, 2 * bpp); in calculate_rc_params()
158 * For 420 format since bits_per_pixel (bpp) is set to target bpp * 2, in calculate_rc_params()
159 * QP table values for target bpp 4.0 to 4.4375 (rounded to 4.0) are in calculate_rc_params()
160 * actually for bpp 8 to 8.875 (rounded to 4.0 * 2 i.e 8). in calculate_rc_params()
161 * Similarly values for target bpp 4.5 to 4.8375 (rounded to 4.5) in calculate_rc_params()
162 * are for bpp 9 to 9.875 (rounded to 4.5 * 2 i.e 9), and so on. in calculate_rc_params()
164 bpp_i = bpp - 8; in calculate_rc_params()
171 if (bpp <= 8) in calculate_rc_params()
173 else if (bpp <= 10) in calculate_rc_params()
175 10, ofs_und5[buf_i], bpp); in calculate_rc_params()
176 else if (bpp <= 12) in calculate_rc_params()
178 12, ofs_und6[buf_i], bpp); in calculate_rc_params()
179 else if (bpp <= 16) in calculate_rc_params()
181 16, ofs_und8[buf_i], bpp); in calculate_rc_params()
189 /* fractional bpp part * 10000 (for precision up to 4 decimal places) */ in calculate_rc_params()
207 * So 6.0 bpp to 6.4375 will have index 0, 6.5 to 6.9375 will have index 1, in calculate_rc_params()
211 bpp_i = ((bpp - 6) + (fractional_bits < 5000 ? 0 : 1)); in calculate_rc_params()
219 if (bpp <= 6) in calculate_rc_params()
221 else if (bpp <= 8) in calculate_rc_params()
223 8, ofs_und8[buf_i], bpp); in calculate_rc_params()
224 else if (bpp <= 12) in calculate_rc_params()
226 12, ofs_und12[buf_i], bpp); in calculate_rc_params()
227 else if (bpp <= 15) in calculate_rc_params()
229 15, ofs_und15[buf_i], bpp); in calculate_rc_params()
301 * we need to double the current bpp. in intel_dsc_compute_params()
318 * upto uncompressed bpp-1, hence add calculations for all the rc in intel_dsc_compute_params()
535 /* PPS 18 */ in intel_dsc_pps_configure()
538 intel_dsc_pps_write(crtc_state, 18, pps_val); in intel_dsc_pps_configure()
951 /* PPS 18 */ in intel_dsc_get_pps_config()
952 pps_temp = intel_dsc_pps_read_and_verify(crtc_state, 18); in intel_dsc_get_pps_config()
1000 "dsc-dss: compressed-bpp:" FXP_Q4_FMT ", slice-count: %d, num_streams: %d\n", in intel_vdsc_dump_state()