25  * DOC: atomic plane helpers
27  * The functions here are used by the atomic plane helper functions to
28  * implement legacy plane updates (i.e., drm_plane->update_plane() and
29  * drm_plane->disable_plane()).  This allows plane updates to use the
30  * atomic state infrastructure and perform plane updates as separate
62 				    struct intel_plane *plane)  in intel_plane_state_reset()  argument
66 	__drm_atomic_helper_plane_state_reset(&plane_state->uapi, &plane->base);  in intel_plane_state_reset()
74 	struct intel_plane *plane;  in intel_plane_alloc()  local
76 	plane = kzalloc(sizeof(*plane), GFP_KERNEL);  in intel_plane_alloc()
77 	if (!plane)  in intel_plane_alloc()
82 		kfree(plane);  in intel_plane_alloc()
86 	intel_plane_state_reset(plane_state, plane);  in intel_plane_alloc()
88 	plane->base.state = &plane_state->uapi;  in intel_plane_alloc()
90 	return plane;  in intel_plane_alloc()
93 void intel_plane_free(struct intel_plane *plane)  in intel_plane_free()  argument
95 	intel_plane_destroy_state(&plane->base, plane->base.state);  in intel_plane_free()
96 	kfree(plane);  in intel_plane_free()
100  * intel_plane_destroy - destroy a plane
101  * @plane: plane to destroy
106 void intel_plane_destroy(struct drm_plane *plane)  in intel_plane_destroy()  argument
108 	drm_plane_cleanup(plane);  in intel_plane_destroy()
109 	kfree(to_intel_plane(plane));  in intel_plane_destroy()
113  * intel_plane_duplicate_state - duplicate plane state
114  * @plane: drm plane
116  * Allocates and returns a copy of the plane state (both common and
117  * Intel-specific) for the specified plane.
119  * Returns: The newly allocated plane state, or NULL on failure.
122 intel_plane_duplicate_state(struct drm_plane *plane)  in intel_plane_duplicate_state()  argument
126 	intel_state = to_intel_plane_state(plane->state);  in intel_plane_duplicate_state()
132 	__drm_atomic_helper_plane_duplicate_state(plane, &intel_state->uapi);  in intel_plane_duplicate_state()
147  * intel_plane_destroy_state - destroy plane state
148  * @plane: drm plane
151  * Destroys the plane state (both common and Intel-specific) for the
152  * specified plane.
155 intel_plane_destroy_state(struct drm_plane *plane,  in intel_plane_destroy_state()  argument
160 	drm_WARN_ON(plane->dev, plane_state->ggtt_vma);  in intel_plane_destroy_state()
161 	drm_WARN_ON(plane->dev, plane_state->dpt_vma);  in intel_plane_destroy_state()
169 bool intel_plane_needs_physical(struct intel_plane *plane)  in intel_plane_needs_physical()  argument
171 	struct intel_display *display = to_intel_display(plane);  in intel_plane_needs_physical()
173 	return plane->id == PLANE_CURSOR &&  in intel_plane_needs_physical()
177 bool intel_plane_can_async_flip(struct intel_plane *plane, u64 modifier)  in intel_plane_can_async_flip()  argument
179 	return plane->can_async_flip && plane->can_async_flip(modifier);  in intel_plane_can_async_flip()
205 	 * Note we don't check for plane visibility here as  in intel_plane_pixel_rate()
239 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in intel_plane_relative_data_rate()  local
244 	if (plane->id == PLANE_CURSOR)  in intel_plane_relative_data_rate()
252 	 * the 90/270 degree plane rotation cases (to match the  in intel_plane_relative_data_rate()
258 	/* UV plane does 1/2 pixel sub-sampling */  in intel_plane_relative_data_rate()
265 		skl_plane_relative_data_rate(crtc_state, plane, width, height,  in intel_plane_relative_data_rate()
276 			       struct intel_plane *plane,  in intel_plane_calc_min_cdclk()  argument
279 	struct intel_display *display = to_intel_display(plane);  in intel_plane_calc_min_cdclk()
281 		intel_atomic_get_new_plane_state(state, plane);  in intel_plane_calc_min_cdclk()
287 	if (!plane_state->uapi.visible || !plane->min_cdclk)  in intel_plane_calc_min_cdclk()
293 	new_crtc_state->min_cdclk[plane->id] =  in intel_plane_calc_min_cdclk()
294 		plane->min_cdclk(new_crtc_state, plane_state);  in intel_plane_calc_min_cdclk()
298 	 * the min cdclk for the plane doesn't increase.  in intel_plane_calc_min_cdclk()
300 	 * Ie. we only ever increase the cdclk due to plane  in intel_plane_calc_min_cdclk()
304 	if (new_crtc_state->min_cdclk[plane->id] <=  in intel_plane_calc_min_cdclk()
305 	    old_crtc_state->min_cdclk[plane->id])  in intel_plane_calc_min_cdclk()
316 	 * Ie. we only ever increase the cdclk due to plane  in intel_plane_calc_min_cdclk()
320 	if (new_crtc_state->min_cdclk[plane->id] <=  in intel_plane_calc_min_cdclk()
325 		    "[PLANE:%d:%s] min cdclk (%d kHz) > [CRTC:%d:%s] min cdclk (%d kHz)\n",  in intel_plane_calc_min_cdclk()
326 		    plane->base.base.id, plane->base.name,  in intel_plane_calc_min_cdclk()
327 		    new_crtc_state->min_cdclk[plane->id],  in intel_plane_calc_min_cdclk()
358 		/* Incase helper fails, mark whole plane region as damage */  in intel_plane_copy_uapi_plane_damage()
372 	 * indicates the plane is logically enabled on the uapi level.  in intel_plane_copy_uapi_to_hw_state()
407 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in intel_plane_set_invisible()  local
409 	crtc_state->active_planes &= ~BIT(plane->id);  in intel_plane_set_invisible()
410 	crtc_state->scaled_planes &= ~BIT(plane->id);  in intel_plane_set_invisible()
411 	crtc_state->nv12_planes &= ~BIT(plane->id);  in intel_plane_set_invisible()
412 	crtc_state->c8_planes &= ~BIT(plane->id);  in intel_plane_set_invisible()
413 	crtc_state->async_flip_planes &= ~BIT(plane->id);  in intel_plane_set_invisible()
414 	crtc_state->data_rate[plane->id] = 0;  in intel_plane_set_invisible()
415 	crtc_state->data_rate_y[plane->id] = 0;  in intel_plane_set_invisible()
416 	crtc_state->rel_data_rate[plane->id] = 0;  in intel_plane_set_invisible()
417 	crtc_state->rel_data_rate_y[plane->id] = 0;  in intel_plane_set_invisible()
418 	crtc_state->min_cdclk[plane->id] = 0;  in intel_plane_set_invisible()
433 static bool intel_plane_do_async_flip(struct intel_plane *plane,  in intel_plane_do_async_flip()  argument
437 	struct intel_display *display = to_intel_display(plane);  in intel_plane_do_async_flip()
439 	if (!plane->async_flip)  in intel_plane_do_async_flip()
465 	struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);  in i9xx_must_disable_cxsr()  local
472 	if (plane->id == PLANE_CURSOR)  in i9xx_must_disable_cxsr()
479 	/* Must disable CxSR around plane enable/disable */  in i9xx_must_disable_cxsr()
487 	 * Most plane control register updates are blocked while in CxSR.  in i9xx_must_disable_cxsr()
489 	 * Tiling mode is one exception where the primary plane can  in i9xx_must_disable_cxsr()
494 	if (plane->id == PLANE_PRIMARY) {  in i9xx_must_disable_cxsr()
506 	struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);  in ilk_must_disable_cxsr()  local
511 	if (plane->id == PLANE_CURSOR)  in ilk_must_disable_cxsr()
521 	 *  plane will be internally buffered and delayed while Big FIFO  in ilk_must_disable_cxsr()
533 	 * plane, not only sprite plane.  in ilk_must_disable_cxsr()
564 	struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);  in intel_plane_atomic_calc_changes()  local
571 	if (DISPLAY_VER(display) >= 9 && plane->id != PLANE_CURSOR) {  in intel_plane_atomic_calc_changes()
590 	 * per-plane wm computation to the .check_plane() hook, and  in intel_plane_atomic_calc_changes()
605 		       "[CRTC:%d:%s] with [PLANE:%d:%s] visible %i -> %i, off %i, on %i, ms %i\n",  in intel_plane_atomic_calc_changes()
607 		       plane->base.base.id, plane->base.name,  in intel_plane_atomic_calc_changes()
612 		new_crtc_state->fb_bits |= plane->frontbuffer_bit;  in intel_plane_atomic_calc_changes()
622 	if (intel_plane_do_async_flip(plane, old_crtc_state, new_crtc_state)) {  in intel_plane_atomic_calc_changes()
624 		new_crtc_state->async_flip_planes |= BIT(plane->id);  in intel_plane_atomic_calc_changes()
625 	} else if (plane->need_async_flip_toggle_wa &&  in intel_plane_atomic_calc_changes()
635 		new_crtc_state->async_flip_planes |= BIT(plane->id);  in intel_plane_atomic_calc_changes()
646 	struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);  in intel_plane_atomic_check_with_state()  local
651 	new_crtc_state->enabled_planes &= ~BIT(plane->id);  in intel_plane_atomic_check_with_state()
656 	ret = plane->check_plane(new_crtc_state, new_plane_state);  in intel_plane_atomic_check_with_state()
661 		new_crtc_state->enabled_planes |= BIT(plane->id);  in intel_plane_atomic_check_with_state()
665 		new_crtc_state->active_planes |= BIT(plane->id);  in intel_plane_atomic_check_with_state()
669 		new_crtc_state->scaled_planes |= BIT(plane->id);  in intel_plane_atomic_check_with_state()
673 		new_crtc_state->nv12_planes |= BIT(plane->id);  in intel_plane_atomic_check_with_state()
677 		new_crtc_state->c8_planes |= BIT(plane->id);  in intel_plane_atomic_check_with_state()
680 		new_crtc_state->update_planes |= BIT(plane->id);  in intel_plane_atomic_check_with_state()
684 		new_crtc_state->data_rate_y[plane->id] =  in intel_plane_atomic_check_with_state()
686 		new_crtc_state->data_rate[plane->id] =  in intel_plane_atomic_check_with_state()
689 		new_crtc_state->rel_data_rate_y[plane->id] =  in intel_plane_atomic_check_with_state()
692 		new_crtc_state->rel_data_rate[plane->id] =  in intel_plane_atomic_check_with_state()
696 		new_crtc_state->data_rate[plane->id] =  in intel_plane_atomic_check_with_state()
699 		new_crtc_state->rel_data_rate[plane->id] =  in intel_plane_atomic_check_with_state()
712 	struct intel_plane *plane;  in intel_crtc_get_plane()  local
714 	for_each_intel_plane_on_crtc(display->drm, crtc, plane) {  in intel_crtc_get_plane()
715 		if (plane->id == plane_id)  in intel_crtc_get_plane()
716 			return plane;  in intel_crtc_get_plane()
723 			     struct intel_plane *plane)  in intel_plane_atomic_check()  argument
727 		intel_atomic_get_new_plane_state(state, plane);  in intel_plane_atomic_check()
729 		intel_atomic_get_old_plane_state(state, plane);  in intel_plane_atomic_check()
732 	struct intel_crtc *crtc = intel_crtc_for_pipe(display, plane->pipe);  in intel_plane_atomic_check()
742 			intel_crtc_get_plane(primary_crtc, plane->id);  in intel_plane_atomic_check()
781 	struct intel_plane *plane;  in skl_next_plane_to_commit()  local
787 	for_each_new_intel_plane_in_state(state, plane, plane_state, i) {  in skl_next_plane_to_commit()
788 		enum plane_id plane_id = plane->id;  in skl_next_plane_to_commit()
790 		if (crtc->pipe != plane->pipe ||  in skl_next_plane_to_commit()
804 		return plane;  in skl_next_plane_to_commit()
814 			      struct intel_plane *plane,  in intel_plane_update_noarm()  argument
822 	if (plane->fbc)  in intel_plane_update_noarm()
823 		intel_fbc_dirty_rect_update_noarm(dsb, plane);  in intel_plane_update_noarm()
825 	if (plane->update_noarm)  in intel_plane_update_noarm()
826 		plane->update_noarm(dsb, plane, crtc_state, plane_state);  in intel_plane_update_noarm()
830 			    struct intel_plane *plane,  in intel_plane_async_flip()  argument
837 	trace_intel_plane_async_flip(plane, crtc, async_flip);  in intel_plane_async_flip()
838 	plane->async_flip(dsb, plane, crtc_state, plane_state, async_flip);  in intel_plane_async_flip()
842 			    struct intel_plane *plane,  in intel_plane_update_arm()  argument
848 	if (crtc_state->do_async_flip && plane->async_flip) {  in intel_plane_update_arm()
849 		intel_plane_async_flip(dsb, plane, crtc_state, plane_state, true);  in intel_plane_update_arm()
854 	plane->update_arm(dsb, plane, crtc_state, plane_state);  in intel_plane_update_arm()
858 			     struct intel_plane *plane,  in intel_plane_disable_arm()  argument
863 	trace_intel_plane_disable_arm(plane, crtc);  in intel_plane_disable_arm()
864 	plane->disable_arm(dsb, plane, crtc_state);  in intel_plane_disable_arm()
875 	struct intel_plane *plane;  in intel_crtc_planes_update_noarm()  local
885 	for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) {  in intel_crtc_planes_update_noarm()
886 		if (crtc->pipe != plane->pipe ||  in intel_crtc_planes_update_noarm()
887 		    !(update_mask & BIT(plane->id)))  in intel_crtc_planes_update_noarm()
893 			intel_plane_update_noarm(dsb, plane,  in intel_crtc_planes_update_noarm()
909 	struct intel_plane *plane;  in skl_crtc_planes_update_arm()  local
916 	while ((plane = skl_next_plane_to_commit(state, crtc, ddb, ddb_y, &update_mask))) {  in skl_crtc_planes_update_arm()
918 			intel_atomic_get_new_plane_state(state, plane);  in skl_crtc_planes_update_arm()
926 			intel_plane_update_arm(dsb, plane, new_crtc_state, new_plane_state);  in skl_crtc_planes_update_arm()
928 			intel_plane_disable_arm(dsb, plane, new_crtc_state);  in skl_crtc_planes_update_arm()
940 	struct intel_plane *plane;  in i9xx_crtc_planes_update_arm()  local
943 	for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) {  in i9xx_crtc_planes_update_arm()
944 		if (crtc->pipe != plane->pipe ||  in i9xx_crtc_planes_update_arm()
945 		    !(update_mask & BIT(plane->id)))  in i9xx_crtc_planes_update_arm()
953 			intel_plane_update_arm(dsb, plane, new_crtc_state, new_plane_state);  in i9xx_crtc_planes_update_arm()
955 			intel_plane_disable_arm(dsb, plane, new_crtc_state);  in i9xx_crtc_planes_update_arm()
977 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in intel_atomic_plane_check_clipping()  local
997 			    "[PLANE:%d:%s] invalid scaling "DRM_RECT_FP_FMT " -> " DRM_RECT_FMT "\n",  in intel_atomic_plane_check_clipping()
998 			    plane->base.base.id, plane->base.name,  in intel_atomic_plane_check_clipping()
1014 			    "[PLANE:%d:%s] plane (" DRM_RECT_FMT ") must cover entire CRTC (" DRM_RECT_FMT ")\n",  in intel_atomic_plane_check_clipping()
1015 			    plane->base.base.id, plane->base.name,  in intel_atomic_plane_check_clipping()
1020 	/* final plane coordinates will be relative to the plane's pipe */  in intel_atomic_plane_check_clipping()
1029 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in intel_plane_check_src_coordinates()  local
1086 			    "[PLANE:%d:%s] src x/w (%u, %u) must be a multiple of %u (rotated: %s)\n",  in intel_plane_check_src_coordinates()
1087 			    plane->base.base.id, plane->base.name,  in intel_plane_check_src_coordinates()
1094 			    "[PLANE:%d:%s] src y/h (%u, %u) must be a multiple of %u (rotated: %s)\n",  in intel_plane_check_src_coordinates()
1095 			    plane->base.base.id, plane->base.name,  in intel_plane_check_src_coordinates()
1139  * intel_prepare_plane_fb - Prepare fb for usage on plane
1140  * @_plane: drm plane to prepare for
1141  * @_new_plane_state: the plane state being prepared
1143  * Prepares a framebuffer for usage on a display plane.  Generally this
1155 	struct intel_plane *plane = to_intel_plane(_plane);  in intel_prepare_plane_fb()  local
1156 	struct intel_display *display = to_intel_display(plane);  in intel_prepare_plane_fb()
1162 		intel_atomic_get_old_plane_state(state, plane);  in intel_prepare_plane_fb()
1198 	ret = drm_gem_plane_helper_prepare_fb(&plane->base, &new_plane_state->uapi);  in intel_prepare_plane_fb()
1229  * intel_cleanup_plane_fb - Cleans up an fb after plane use
1230  * @plane: drm plane to clean up for
1233  * Cleans up a framebuffer that has just been removed from a plane.
1236 intel_cleanup_plane_fb(struct drm_plane *plane,  in intel_cleanup_plane_fb()  argument
1239 	struct intel_display *display = to_intel_display(plane->dev);  in intel_cleanup_plane_fb()
1259 void intel_plane_helper_add(struct intel_plane *plane)  in intel_plane_helper_add()  argument
1261 	drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs);  in intel_plane_helper_add()
1280 	struct intel_plane *uv_plane = to_intel_plane(uv_plane_state->uapi.plane);  in link_nv12_planes()
1281 	struct intel_plane *y_plane = to_intel_plane(y_plane_state->uapi.plane);  in link_nv12_planes()
1283 	drm_dbg_kms(display->drm, "UV plane [PLANE:%d:%s] using Y plane [PLANE:%d:%s]\n",  in link_nv12_planes()
1299 	/* Copy parameters to Y plane */  in link_nv12_planes()
1316 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in unlink_nv12_plane()  local
1327 	crtc_state->enabled_planes &= ~BIT(plane->id);  in unlink_nv12_plane()
1328 	crtc_state->active_planes &= ~BIT(plane->id);  in unlink_nv12_plane()
1329 	crtc_state->update_planes |= BIT(plane->id);  in unlink_nv12_plane()
1330 	crtc_state->data_rate[plane->id] = 0;  in unlink_nv12_plane()
1331 	crtc_state->rel_data_rate[plane->id] = 0;  in unlink_nv12_plane()
1341 	struct intel_plane *plane;  in icl_check_nv12_planes()  local
1348 	 * Destroy all old plane links and make the Y plane invisible  in icl_check_nv12_planes()
1351 	for_each_new_intel_plane_in_state(state, plane, plane_state, i) {  in icl_check_nv12_planes()
1352 		if (plane->pipe != crtc->pipe)  in icl_check_nv12_planes()
1362 	for_each_new_intel_plane_in_state(state, plane, plane_state, i) {  in icl_check_nv12_planes()
1366 		if (plane->pipe != crtc->pipe)  in icl_check_nv12_planes()
1369 		if ((crtc_state->nv12_planes & BIT(plane->id)) == 0)  in icl_check_nv12_planes()
1405 	struct intel_plane *plane;  in intel_crtc_add_planes_to_state()  local
1407 	for_each_intel_plane_on_crtc(display->drm, crtc, plane) {  in intel_crtc_add_planes_to_state()
1410 		if ((plane_ids_mask & BIT(plane->id)) == 0)  in intel_crtc_add_planes_to_state()
1413 		plane_state = intel_atomic_get_plane_state(state, plane);  in intel_crtc_add_planes_to_state()
1446 	struct intel_plane *plane;  in intel_joiner_affected_planes()  local
1450 	for_each_new_intel_plane_in_state(state, plane, plane_state, i) {  in intel_joiner_affected_planes()
1453 		if ((joined_pipes & BIT(plane->pipe)) == 0)  in intel_joiner_affected_planes()
1456 		affected_planes |= BIT(plane->id);  in intel_joiner_affected_planes()
1473 	 * UV<->Y plane linkage is always up to date.  in intel_joiner_add_affected_planes()
1521 	struct intel_plane *plane;  in intel_atomic_check_planes()  local
1529 	for_each_new_intel_plane_in_state(state, plane, plane_state, i) {  in intel_atomic_check_planes()
1530 		ret = intel_plane_atomic_check(state, plane);  in intel_atomic_check_planes()
1533 				       "[PLANE:%d:%s] atomic driver check failed\n",  in intel_atomic_check_planes()
1534 				       plane->base.base.id, plane->base.name);  in intel_atomic_check_planes()