amd/include/kgd_pp_interface.h

88 	AMD_VCE_LEVEL_DC_LL_LOW = 2,  /* DC, low latency queue, res <= 720 */
89 	AMD_VCE_LEVEL_DC_LL_HIGH = 3, /* DC, low latency queue, 1080 >= res > 720 */
167 	PP_SMC_POWER_PROFILE_UNKNOWN = -1,
237  * APU power is managed to system-level requirements through the PPT
247  * enum pp_power_limit_level - Used to query the power limits
255 	PP_PWR_LIMIT_MIN = -1,
262  * enum pp_power_type - Used to specify the type of the requested power
275 	XGMI_PLPD_NONE = -1,
283 	PP_PM_POLICY_NONE = -1,
457 	u32 (*get_sclk)(void *handle, bool low);
458 	u32 (*get_mclk)(void *handle, bool low);
784 	/* Energy (15.259uJ (2^-16) units) */
808 	/*PCIE accumulated bandwidth (GB/sec) */
811 	/*PCIE instantaneous bandwidth (GB/sec) */
857 	/* Energy (15.259uJ (2^-16) units) */
881 	/*PCIE accumulated bandwidth (GB/sec) */
884 	/*PCIE instantaneous bandwidth (GB/sec) */
934 	/* Energy (15.259uJ (2^-16) units) */
965 	/*PCIE accumulated bandwidth (GB/sec) */
968 	/*PCIE instantaneous bandwidth (GB/sec) */
1028 	/* Energy (15.259uJ (2^-16) units) */
1059 	/*PCIE accumulated bandwidth (GB/sec) */
1062 	/*PCIE instantaneous bandwidth (GB/sec) */
1127 	/* Energy (15.259uJ (2^-16) units) */
1158 	/*PCIE accumulated bandwidth (GB/sec) */
1161 	/*PCIE instantaneous bandwidth (GB/sec) */
1427 	/* Temperature (unit: centi-Celsius) */
1476 	/* Average Temperature (unit: centi-Celsius) */
1507 	/* time filtered GFX busy % [0-100] */
1509 	/* time filtered VCN busy % [0-100] */
1511 	/* time filtered IPU per-column busy % [0-100] */
1513 	/* time filtered per-core C0 residency % [0-100]*/
1515 	/* time filtered DRAM read bandwidth [MB/sec] */
1517 	/* time filtered DRAM write bandwidth [MB/sec] */
1519 	/* time filtered IPU read bandwidth [MB/sec] */
1521 	/* time filtered IPU write bandwidth [MB/sec] */