Lines Matching +full:gfx +full:- +full:mem
2 * Copyright 2018-2024 Advanced Micro Devices, Inc. All rights reserved.
254 pos = tmr_offset + tmr_size - DISCOVERY_TMR_OFFSET; in amdgpu_discovery_read_binary_from_sysmem()
256 /* This region is read-only and reserved from system use */ in amdgpu_discovery_read_binary_from_sysmem()
257 discv_regn = memremap(pos, adev->mman.discovery_tmr_size, MEMREMAP_WC); in amdgpu_discovery_read_binary_from_sysmem()
259 memcpy(binary, discv_regn, adev->mman.discovery_tmr_size); in amdgpu_discovery_read_binary_from_sysmem()
264 return -ENOENT; in amdgpu_discovery_read_binary_from_sysmem()
279 * but generally it should be in the 60-100ms range. Normally this starts in amdgpu_discovery_read_binary_from_mem()
297 uint64_t pos = vram_size - DISCOVERY_TMR_OFFSET; in amdgpu_discovery_read_binary_from_mem()
299 adev->mman.discovery_tmr_size, false); in amdgpu_discovery_read_binary_from_mem()
314 r = request_firmware(&fw, fw_name, adev->dev); in amdgpu_discovery_read_binary_from_file()
316 dev_err(adev->dev, "can't load firmware \"%s\"\n", in amdgpu_discovery_read_binary_from_file()
321 memcpy((u8 *)binary, (u8 *)fw->data, fw->size); in amdgpu_discovery_read_binary_from_file()
349 return (le32_to_cpu(bhdr->binary_signature) == BINARY_SIGNATURE); in amdgpu_discovery_verify_binary_signature()
360 switch (adev->pdev->revision) { in amdgpu_discovery_harvest_config_quirk()
368 adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN1; in amdgpu_discovery_harvest_config_quirk()
369 adev->vcn.inst_mask &= ~AMDGPU_VCN_HARVEST_VCN1; in amdgpu_discovery_harvest_config_quirk()
384 info = &bhdr->table_list[NPS_INFO]; in amdgpu_discovery_verify_npsinfo()
385 offset = le16_to_cpu(info->offset); in amdgpu_discovery_verify_npsinfo()
386 checksum = le16_to_cpu(info->checksum); in amdgpu_discovery_verify_npsinfo()
389 (struct nps_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_verify_npsinfo()
391 if (le32_to_cpu(nhdr->table_id) != NPS_INFO_TABLE_ID) { in amdgpu_discovery_verify_npsinfo()
392 dev_dbg(adev->dev, "invalid ip discovery nps info table id\n"); in amdgpu_discovery_verify_npsinfo()
393 return -EINVAL; in amdgpu_discovery_verify_npsinfo()
396 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_verify_npsinfo()
397 le32_to_cpu(nhdr->size_bytes), in amdgpu_discovery_verify_npsinfo()
399 dev_dbg(adev->dev, "invalid nps info data table checksum\n"); in amdgpu_discovery_verify_npsinfo()
400 return -EINVAL; in amdgpu_discovery_verify_npsinfo()
411 switch (adev->asic_type) { in amdgpu_discovery_get_fw_name()
417 if (adev->apu_flags & AMD_APU_IS_RAVEN2) in amdgpu_discovery_get_fw_name()
419 else if (adev->apu_flags & AMD_APU_IS_PICASSO) in amdgpu_discovery_get_fw_name()
444 adev->mman.discovery_tmr_size = DISCOVERY_TMR_SIZE; in amdgpu_discovery_init()
445 adev->mman.discovery_bin = kzalloc(adev->mman.discovery_tmr_size, GFP_KERNEL); in amdgpu_discovery_init()
446 if (!adev->mman.discovery_bin) in amdgpu_discovery_init()
447 return -ENOMEM; in amdgpu_discovery_init()
452 dev_info(adev->dev, "use ip discovery information from file"); in amdgpu_discovery_init()
453 r = amdgpu_discovery_read_binary_from_file(adev, adev->mman.discovery_bin, fw_name); in amdgpu_discovery_init()
456 dev_err(adev->dev, "failed to read ip discovery binary from file\n"); in amdgpu_discovery_init()
457 r = -EINVAL; in amdgpu_discovery_init()
463 adev, adev->mman.discovery_bin); in amdgpu_discovery_init()
469 if (!amdgpu_discovery_verify_binary_signature(adev->mman.discovery_bin)) { in amdgpu_discovery_init()
470 dev_err(adev->dev, in amdgpu_discovery_init()
472 r = -EINVAL; in amdgpu_discovery_init()
476 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_init()
479 sizeof(bhdr->binary_checksum); in amdgpu_discovery_init()
480 size = le16_to_cpu(bhdr->binary_size) - offset; in amdgpu_discovery_init()
481 checksum = le16_to_cpu(bhdr->binary_checksum); in amdgpu_discovery_init()
483 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
485 dev_err(adev->dev, "invalid ip discovery binary checksum\n"); in amdgpu_discovery_init()
486 r = -EINVAL; in amdgpu_discovery_init()
490 info = &bhdr->table_list[IP_DISCOVERY]; in amdgpu_discovery_init()
491 offset = le16_to_cpu(info->offset); in amdgpu_discovery_init()
492 checksum = le16_to_cpu(info->checksum); in amdgpu_discovery_init()
496 (struct ip_discovery_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
497 if (le32_to_cpu(ihdr->signature) != DISCOVERY_TABLE_SIGNATURE) { in amdgpu_discovery_init()
498 dev_err(adev->dev, "invalid ip discovery data table signature\n"); in amdgpu_discovery_init()
499 r = -EINVAL; in amdgpu_discovery_init()
503 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
504 le16_to_cpu(ihdr->size), checksum)) { in amdgpu_discovery_init()
505 dev_err(adev->dev, "invalid ip discovery data table checksum\n"); in amdgpu_discovery_init()
506 r = -EINVAL; in amdgpu_discovery_init()
511 info = &bhdr->table_list[GC]; in amdgpu_discovery_init()
512 offset = le16_to_cpu(info->offset); in amdgpu_discovery_init()
513 checksum = le16_to_cpu(info->checksum); in amdgpu_discovery_init()
517 (struct gpu_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
519 if (le32_to_cpu(ghdr->table_id) != GC_TABLE_ID) { in amdgpu_discovery_init()
520 dev_err(adev->dev, "invalid ip discovery gc table id\n"); in amdgpu_discovery_init()
521 r = -EINVAL; in amdgpu_discovery_init()
525 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
526 le32_to_cpu(ghdr->size), checksum)) { in amdgpu_discovery_init()
527 dev_err(adev->dev, "invalid gc data table checksum\n"); in amdgpu_discovery_init()
528 r = -EINVAL; in amdgpu_discovery_init()
533 info = &bhdr->table_list[HARVEST_INFO]; in amdgpu_discovery_init()
534 offset = le16_to_cpu(info->offset); in amdgpu_discovery_init()
535 checksum = le16_to_cpu(info->checksum); in amdgpu_discovery_init()
539 (struct harvest_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
541 if (le32_to_cpu(hhdr->signature) != HARVEST_TABLE_SIGNATURE) { in amdgpu_discovery_init()
542 dev_err(adev->dev, "invalid ip discovery harvest table signature\n"); in amdgpu_discovery_init()
543 r = -EINVAL; in amdgpu_discovery_init()
547 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
549 dev_err(adev->dev, "invalid harvest data table checksum\n"); in amdgpu_discovery_init()
550 r = -EINVAL; in amdgpu_discovery_init()
555 info = &bhdr->table_list[VCN_INFO]; in amdgpu_discovery_init()
556 offset = le16_to_cpu(info->offset); in amdgpu_discovery_init()
557 checksum = le16_to_cpu(info->checksum); in amdgpu_discovery_init()
561 (struct vcn_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
563 if (le32_to_cpu(vhdr->table_id) != VCN_INFO_TABLE_ID) { in amdgpu_discovery_init()
564 dev_err(adev->dev, "invalid ip discovery vcn table id\n"); in amdgpu_discovery_init()
565 r = -EINVAL; in amdgpu_discovery_init()
569 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
570 le32_to_cpu(vhdr->size_bytes), checksum)) { in amdgpu_discovery_init()
571 dev_err(adev->dev, "invalid vcn data table checksum\n"); in amdgpu_discovery_init()
572 r = -EINVAL; in amdgpu_discovery_init()
577 info = &bhdr->table_list[MALL_INFO]; in amdgpu_discovery_init()
578 offset = le16_to_cpu(info->offset); in amdgpu_discovery_init()
579 checksum = le16_to_cpu(info->checksum); in amdgpu_discovery_init()
583 (struct mall_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
585 if (le32_to_cpu(mhdr->table_id) != MALL_INFO_TABLE_ID) { in amdgpu_discovery_init()
586 dev_err(adev->dev, "invalid ip discovery mall table id\n"); in amdgpu_discovery_init()
587 r = -EINVAL; in amdgpu_discovery_init()
591 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
592 le32_to_cpu(mhdr->size_bytes), checksum)) { in amdgpu_discovery_init()
593 dev_err(adev->dev, "invalid mall data table checksum\n"); in amdgpu_discovery_init()
594 r = -EINVAL; in amdgpu_discovery_init()
602 kfree(adev->mman.discovery_bin); in amdgpu_discovery_init()
603 adev->mman.discovery_bin = NULL; in amdgpu_discovery_init()
615 kfree(adev->mman.discovery_bin); in amdgpu_discovery_fini()
616 adev->mman.discovery_bin = NULL; in amdgpu_discovery_fini()
623 dev_err(adev->dev, in amdgpu_discovery_validate_ip()
626 return -EINVAL; in amdgpu_discovery_validate_ip()
629 dev_err(adev->dev, in amdgpu_discovery_validate_ip()
632 return -EINVAL; in amdgpu_discovery_validate_ip()
650 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_read_harvest_bit_per_ip()
651 ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + in amdgpu_discovery_read_harvest_bit_per_ip()
652 le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset)); in amdgpu_discovery_read_harvest_bit_per_ip()
653 num_dies = le16_to_cpu(ihdr->num_dies); in amdgpu_discovery_read_harvest_bit_per_ip()
657 die_offset = le16_to_cpu(ihdr->die_info[i].die_offset); in amdgpu_discovery_read_harvest_bit_per_ip()
658 dhdr = (struct die_header *)(adev->mman.discovery_bin + die_offset); in amdgpu_discovery_read_harvest_bit_per_ip()
659 num_ips = le16_to_cpu(dhdr->num_ips); in amdgpu_discovery_read_harvest_bit_per_ip()
663 ip = (struct ip *)(adev->mman.discovery_bin + in amdgpu_discovery_read_harvest_bit_per_ip()
665 inst = ip->number_instance; in amdgpu_discovery_read_harvest_bit_per_ip()
666 hw_id = le16_to_cpu(ip->hw_id); in amdgpu_discovery_read_harvest_bit_per_ip()
670 if (ip->harvest == 1) { in amdgpu_discovery_read_harvest_bit_per_ip()
675 adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN0; in amdgpu_discovery_read_harvest_bit_per_ip()
676 adev->vcn.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
678 adev->jpeg.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
681 adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN1; in amdgpu_discovery_read_harvest_bit_per_ip()
682 adev->vcn.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
684 adev->jpeg.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
689 adev->harvest_ip_mask |= AMD_HARVEST_IP_DMU_MASK; in amdgpu_discovery_read_harvest_bit_per_ip()
697 ip->num_base_address); in amdgpu_discovery_read_harvest_bit_per_ip()
712 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_read_from_harvest_table()
713 offset = le16_to_cpu(bhdr->table_list[HARVEST_INFO].offset); in amdgpu_discovery_read_from_harvest_table()
716 dev_err(adev->dev, "invalid harvest table offset\n"); in amdgpu_discovery_read_from_harvest_table()
720 harvest_info = (struct harvest_table *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_read_from_harvest_table()
723 if (le16_to_cpu(harvest_info->list[i].hw_id) == 0) in amdgpu_discovery_read_from_harvest_table()
726 switch (le16_to_cpu(harvest_info->list[i].hw_id)) { in amdgpu_discovery_read_from_harvest_table()
729 adev->vcn.harvest_config |= in amdgpu_discovery_read_from_harvest_table()
730 (1 << harvest_info->list[i].number_instance); in amdgpu_discovery_read_from_harvest_table()
731 adev->jpeg.harvest_config |= in amdgpu_discovery_read_from_harvest_table()
732 (1 << harvest_info->list[i].number_instance); in amdgpu_discovery_read_from_harvest_table()
734 adev->vcn.inst_mask &= in amdgpu_discovery_read_from_harvest_table()
735 ~(1U << harvest_info->list[i].number_instance); in amdgpu_discovery_read_from_harvest_table()
736 adev->jpeg.inst_mask &= in amdgpu_discovery_read_from_harvest_table()
737 ~(1U << harvest_info->list[i].number_instance); in amdgpu_discovery_read_from_harvest_table()
740 adev->harvest_ip_mask |= AMD_HARVEST_IP_DMU_MASK; in amdgpu_discovery_read_from_harvest_table()
744 1 << (le16_to_cpu(harvest_info->list[i].number_instance)); in amdgpu_discovery_read_from_harvest_table()
748 adev->gfx.xcc_mask &= in amdgpu_discovery_read_from_harvest_table()
749 ~(1U << harvest_info->list[i].number_instance); in amdgpu_discovery_read_from_harvest_table()
752 adev->sdma.sdma_mask &= in amdgpu_discovery_read_from_harvest_table()
753 ~(1U << harvest_info->list[i].number_instance); in amdgpu_discovery_read_from_harvest_table()
757 adev->isp.harvest_config |= in amdgpu_discovery_read_from_harvest_table()
758 ~(1U << harvest_info->list[i].number_instance); in amdgpu_discovery_read_from_harvest_table()
766 adev->umc.active_mask = ((1 << adev->umc.node_inst_num) - 1) & in amdgpu_discovery_read_from_harvest_table()
794 /* -------------------------------------------------- */
803 return sysfs_emit(buf, "%d\n", ip_hw_instance->hw_id); in hw_id_show()
808 return sysfs_emit(buf, "%d\n", ip_hw_instance->num_instance); in num_instance_show()
813 return sysfs_emit(buf, "%d\n", ip_hw_instance->major); in major_show()
818 return sysfs_emit(buf, "%d\n", ip_hw_instance->minor); in minor_show()
823 return sysfs_emit(buf, "%d\n", ip_hw_instance->revision); in revision_show()
828 return sysfs_emit(buf, "0x%01X\n", ip_hw_instance->harvest); in harvest_show()
833 return sysfs_emit(buf, "%d\n", ip_hw_instance->num_base_addresses); in num_base_addresses_show()
841 for (res = at = ii = 0; ii < ip_hw_instance->num_base_addresses; ii++) { in base_addr_show()
847 ip_hw_instance->base_addr[ii]); in base_addr_show()
880 if (!ip_hw_attr->show) in ip_hw_instance_attr_show()
881 return -EIO; in ip_hw_instance_attr_show()
883 return ip_hw_attr->show(ip_hw_instance, buf); in ip_hw_instance_attr_show()
903 /* -------------------------------------------------- */
911 if (!list_empty(&ip_hw_id->hw_id_kset.list)) in ip_hw_id_release()
912 DRM_ERROR("ip_hw_id->hw_id_kset is not empty"); in ip_hw_id_release()
921 /* -------------------------------------------------- */
935 return sysfs_emit(buf, "%d\n", ip_die_entry->num_ips); in num_ips_show()
960 if (!ip_die_entry_attr->show) in ip_die_entry_attr_show()
961 return -EIO; in ip_die_entry_attr_show()
963 return ip_die_entry_attr->show(ip_die_entry, buf); in ip_die_entry_attr_show()
970 if (!list_empty(&ip_die_entry->ip_kset.list)) in ip_die_entry_release()
971 DRM_ERROR("ip_die_entry->ip_kset is not empty"); in ip_die_entry_release()
1006 if (!list_empty(&ip_top->die_kset.list)) in die_kobj_release()
1007 DRM_ERROR("ip_top->die_kset is not empty"); in die_kobj_release()
1014 struct amdgpu_device *adev = ip_top->adev; in ip_disc_release()
1016 adev->ip_top = NULL; in ip_disc_release()
1028 harvest = ((1 << inst) & adev->vcn.inst_mask) == 0; in amdgpu_discovery_get_harvest_info()
1031 if (adev->harvest_ip_mask & AMD_HARVEST_IP_DMU_MASK) in amdgpu_discovery_get_harvest_info()
1038 harvest = ((1 << inst) & adev->gfx.xcc_mask) == 0; in amdgpu_discovery_get_harvest_info()
1041 harvest = ((1 << inst) & adev->sdma.sdma_mask) == 0; in amdgpu_discovery_get_harvest_info()
1072 ip = (struct ip_v4 *)(adev->mman.discovery_bin + ip_offset); in amdgpu_discovery_sysfs_ips()
1073 inst = ip->instance_number; in amdgpu_discovery_sysfs_ips()
1074 hw_id = le16_to_cpu(ip->hw_id); in amdgpu_discovery_sysfs_ips()
1087 return -ENOMEM; in amdgpu_discovery_sysfs_ips()
1088 ip_hw_id->hw_id = ii; in amdgpu_discovery_sysfs_ips()
1090 kobject_set_name(&ip_hw_id->hw_id_kset.kobj, "%d", ii); in amdgpu_discovery_sysfs_ips()
1091 ip_hw_id->hw_id_kset.kobj.kset = &ip_die_entry->ip_kset; in amdgpu_discovery_sysfs_ips()
1092 ip_hw_id->hw_id_kset.kobj.ktype = &ip_hw_id_ktype; in amdgpu_discovery_sysfs_ips()
1093 res = kset_register(&ip_hw_id->hw_id_kset); in amdgpu_discovery_sysfs_ips()
1100 res = sysfs_create_link(&ip_die_entry->ip_kset.kobj, in amdgpu_discovery_sysfs_ips()
1101 &ip_hw_id->hw_id_kset.kobj, in amdgpu_discovery_sysfs_ips()
1106 kobject_name(&ip_die_entry->ip_kset.kobj)); in amdgpu_discovery_sysfs_ips()
1115 ip->num_base_address), in amdgpu_discovery_sysfs_ips()
1119 return -ENOMEM; in amdgpu_discovery_sysfs_ips()
1121 ip_hw_instance->hw_id = le16_to_cpu(ip->hw_id); /* == ii */ in amdgpu_discovery_sysfs_ips()
1122 ip_hw_instance->num_instance = ip->instance_number; in amdgpu_discovery_sysfs_ips()
1123 ip_hw_instance->major = ip->major; in amdgpu_discovery_sysfs_ips()
1124 ip_hw_instance->minor = ip->minor; in amdgpu_discovery_sysfs_ips()
1125 ip_hw_instance->revision = ip->revision; in amdgpu_discovery_sysfs_ips()
1126 ip_hw_instance->harvest = in amdgpu_discovery_sysfs_ips()
1128 adev, ip_hw_instance->hw_id, in amdgpu_discovery_sysfs_ips()
1129 ip_hw_instance->num_instance); in amdgpu_discovery_sysfs_ips()
1130 ip_hw_instance->num_base_addresses = ip->num_base_address; in amdgpu_discovery_sysfs_ips()
1132 for (kk = 0; kk < ip_hw_instance->num_base_addresses; kk++) { in amdgpu_discovery_sysfs_ips()
1134 ip_hw_instance->base_addr[kk] = in amdgpu_discovery_sysfs_ips()
1135 lower_32_bits(le64_to_cpu(ip->base_address_64[kk])) & 0x3FFFFFFF; in amdgpu_discovery_sysfs_ips()
1137 ip_hw_instance->base_addr[kk] = ip->base_address[kk]; in amdgpu_discovery_sysfs_ips()
1140 kobject_init(&ip_hw_instance->kobj, &ip_hw_instance_ktype); in amdgpu_discovery_sysfs_ips()
1141 ip_hw_instance->kobj.kset = &ip_hw_id->hw_id_kset; in amdgpu_discovery_sysfs_ips()
1142 res = kobject_add(&ip_hw_instance->kobj, NULL, in amdgpu_discovery_sysfs_ips()
1143 "%d", ip_hw_instance->num_instance); in amdgpu_discovery_sysfs_ips()
1147 ip->num_base_address); in amdgpu_discovery_sysfs_ips()
1150 ip->num_base_address); in amdgpu_discovery_sysfs_ips()
1162 struct kset *die_kset = &adev->ip_top->die_kset; in amdgpu_discovery_sysfs_recurse()
1167 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_sysfs_recurse()
1168 ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + in amdgpu_discovery_sysfs_recurse()
1169 le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset)); in amdgpu_discovery_sysfs_recurse()
1170 num_dies = le16_to_cpu(ihdr->num_dies); in amdgpu_discovery_sysfs_recurse()
1177 die_offset = le16_to_cpu(ihdr->die_info[ii].die_offset); in amdgpu_discovery_sysfs_recurse()
1178 dhdr = (struct die_header *)(adev->mman.discovery_bin + die_offset); in amdgpu_discovery_sysfs_recurse()
1179 num_ips = le16_to_cpu(dhdr->num_ips); in amdgpu_discovery_sysfs_recurse()
1184 * dhdr->die_id == ii, which was checked in in amdgpu_discovery_sysfs_recurse()
1190 return -ENOMEM; in amdgpu_discovery_sysfs_recurse()
1192 ip_die_entry->num_ips = num_ips; in amdgpu_discovery_sysfs_recurse()
1194 kobject_set_name(&ip_die_entry->ip_kset.kobj, "%d", le16_to_cpu(dhdr->die_id)); in amdgpu_discovery_sysfs_recurse()
1195 ip_die_entry->ip_kset.kobj.kset = die_kset; in amdgpu_discovery_sysfs_recurse()
1196 ip_die_entry->ip_kset.kobj.ktype = &ip_die_entry_ktype; in amdgpu_discovery_sysfs_recurse()
1197 res = kset_register(&ip_die_entry->ip_kset); in amdgpu_discovery_sysfs_recurse()
1204 amdgpu_discovery_sysfs_ips(adev, ip_die_entry, ip_offset, num_ips, !!ihdr->base_addr_64_bit); in amdgpu_discovery_sysfs_recurse()
1215 if (!adev->mman.discovery_bin) in amdgpu_discovery_sysfs_init()
1216 return -EINVAL; in amdgpu_discovery_sysfs_init()
1218 adev->ip_top = kzalloc(sizeof(*adev->ip_top), GFP_KERNEL); in amdgpu_discovery_sysfs_init()
1219 if (!adev->ip_top) in amdgpu_discovery_sysfs_init()
1220 return -ENOMEM; in amdgpu_discovery_sysfs_init()
1222 adev->ip_top->adev = adev; in amdgpu_discovery_sysfs_init()
1224 res = kobject_init_and_add(&adev->ip_top->kobj, &ip_discovery_ktype, in amdgpu_discovery_sysfs_init()
1225 &adev->dev->kobj, "ip_discovery"); in amdgpu_discovery_sysfs_init()
1231 die_kset = &adev->ip_top->die_kset; in amdgpu_discovery_sysfs_init()
1232 kobject_set_name(&die_kset->kobj, "%s", "die"); in amdgpu_discovery_sysfs_init()
1233 die_kset->kobj.parent = &adev->ip_top->kobj; in amdgpu_discovery_sysfs_init()
1234 die_kset->kobj.ktype = &die_kobj_ktype; in amdgpu_discovery_sysfs_init()
1235 res = kset_register(&adev->ip_top->die_kset); in amdgpu_discovery_sysfs_init()
1249 kobject_put(&adev->ip_top->kobj); in amdgpu_discovery_sysfs_init()
1253 /* -------------------------------------------------- */
1262 hw_id_kset = &ip_hw_id->hw_id_kset; in amdgpu_discovery_sysfs_ip_hw_free()
1263 spin_lock(&hw_id_kset->list_lock); in amdgpu_discovery_sysfs_ip_hw_free()
1264 list_for_each_prev_safe(el, tmp, &hw_id_kset->list) { in amdgpu_discovery_sysfs_ip_hw_free()
1266 spin_unlock(&hw_id_kset->list_lock); in amdgpu_discovery_sysfs_ip_hw_free()
1269 spin_lock(&hw_id_kset->list_lock); in amdgpu_discovery_sysfs_ip_hw_free()
1271 spin_unlock(&hw_id_kset->list_lock); in amdgpu_discovery_sysfs_ip_hw_free()
1272 kobject_put(&ip_hw_id->hw_id_kset.kobj); in amdgpu_discovery_sysfs_ip_hw_free()
1280 ip_kset = &ip_die_entry->ip_kset; in amdgpu_discovery_sysfs_die_free()
1281 spin_lock(&ip_kset->list_lock); in amdgpu_discovery_sysfs_die_free()
1282 list_for_each_prev_safe(el, tmp, &ip_kset->list) { in amdgpu_discovery_sysfs_die_free()
1284 spin_unlock(&ip_kset->list_lock); in amdgpu_discovery_sysfs_die_free()
1286 spin_lock(&ip_kset->list_lock); in amdgpu_discovery_sysfs_die_free()
1288 spin_unlock(&ip_kset->list_lock); in amdgpu_discovery_sysfs_die_free()
1289 kobject_put(&ip_die_entry->ip_kset.kobj); in amdgpu_discovery_sysfs_die_free()
1297 die_kset = &adev->ip_top->die_kset; in amdgpu_discovery_sysfs_fini()
1298 spin_lock(&die_kset->list_lock); in amdgpu_discovery_sysfs_fini()
1299 list_for_each_prev_safe(el, tmp, &die_kset->list) { in amdgpu_discovery_sysfs_fini()
1301 spin_unlock(&die_kset->list_lock); in amdgpu_discovery_sysfs_fini()
1303 spin_lock(&die_kset->list_lock); in amdgpu_discovery_sysfs_fini()
1305 spin_unlock(&die_kset->list_lock); in amdgpu_discovery_sysfs_fini()
1306 kobject_put(&adev->ip_top->die_kset.kobj); in amdgpu_discovery_sysfs_fini()
1307 kobject_put(&adev->ip_top->kobj); in amdgpu_discovery_sysfs_fini()
1337 adev->gfx.xcc_mask = 0; in amdgpu_discovery_reg_base_init()
1338 adev->sdma.sdma_mask = 0; in amdgpu_discovery_reg_base_init()
1339 adev->vcn.inst_mask = 0; in amdgpu_discovery_reg_base_init()
1340 adev->jpeg.inst_mask = 0; in amdgpu_discovery_reg_base_init()
1341 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_reg_base_init()
1342 ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + in amdgpu_discovery_reg_base_init()
1343 le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset)); in amdgpu_discovery_reg_base_init()
1344 num_dies = le16_to_cpu(ihdr->num_dies); in amdgpu_discovery_reg_base_init()
1349 die_offset = le16_to_cpu(ihdr->die_info[i].die_offset); in amdgpu_discovery_reg_base_init()
1350 dhdr = (struct die_header *)(adev->mman.discovery_bin + die_offset); in amdgpu_discovery_reg_base_init()
1351 num_ips = le16_to_cpu(dhdr->num_ips); in amdgpu_discovery_reg_base_init()
1354 if (le16_to_cpu(dhdr->die_id) != i) { in amdgpu_discovery_reg_base_init()
1356 le16_to_cpu(dhdr->die_id), i); in amdgpu_discovery_reg_base_init()
1357 return -EINVAL; in amdgpu_discovery_reg_base_init()
1361 le16_to_cpu(dhdr->die_id), num_ips); in amdgpu_discovery_reg_base_init()
1364 ip = (struct ip_v4 *)(adev->mman.discovery_bin + ip_offset); in amdgpu_discovery_reg_base_init()
1366 inst = ip->instance_number; in amdgpu_discovery_reg_base_init()
1367 hw_id = le16_to_cpu(ip->hw_id); in amdgpu_discovery_reg_base_init()
1371 num_base_address = ip->num_base_address; in amdgpu_discovery_reg_base_init()
1374 hw_id_names[le16_to_cpu(ip->hw_id)], in amdgpu_discovery_reg_base_init()
1375 le16_to_cpu(ip->hw_id), in amdgpu_discovery_reg_base_init()
1376 ip->instance_number, in amdgpu_discovery_reg_base_init()
1377 ip->major, ip->minor, in amdgpu_discovery_reg_base_init()
1378 ip->revision); in amdgpu_discovery_reg_base_init()
1380 if (le16_to_cpu(ip->hw_id) == VCN_HWID) { in amdgpu_discovery_reg_base_init()
1387 if (adev->vcn.num_vcn_inst < in amdgpu_discovery_reg_base_init()
1389 adev->vcn.inst[adev->vcn.num_vcn_inst].vcn_config = in amdgpu_discovery_reg_base_init()
1390 ip->revision & 0xc0; in amdgpu_discovery_reg_base_init()
1391 adev->vcn.num_vcn_inst++; in amdgpu_discovery_reg_base_init()
1392 adev->vcn.inst_mask |= in amdgpu_discovery_reg_base_init()
1393 (1U << ip->instance_number); in amdgpu_discovery_reg_base_init()
1394 adev->jpeg.inst_mask |= in amdgpu_discovery_reg_base_init()
1395 (1U << ip->instance_number); in amdgpu_discovery_reg_base_init()
1397 dev_err(adev->dev, "Too many VCN instances: %d vs %d\n", in amdgpu_discovery_reg_base_init()
1398 adev->vcn.num_vcn_inst + 1, in amdgpu_discovery_reg_base_init()
1401 ip->revision &= ~0xc0; in amdgpu_discovery_reg_base_init()
1403 if (le16_to_cpu(ip->hw_id) == SDMA0_HWID || in amdgpu_discovery_reg_base_init()
1404 le16_to_cpu(ip->hw_id) == SDMA1_HWID || in amdgpu_discovery_reg_base_init()
1405 le16_to_cpu(ip->hw_id) == SDMA2_HWID || in amdgpu_discovery_reg_base_init()
1406 le16_to_cpu(ip->hw_id) == SDMA3_HWID) { in amdgpu_discovery_reg_base_init()
1407 if (adev->sdma.num_instances < in amdgpu_discovery_reg_base_init()
1409 adev->sdma.num_instances++; in amdgpu_discovery_reg_base_init()
1410 adev->sdma.sdma_mask |= in amdgpu_discovery_reg_base_init()
1411 (1U << ip->instance_number); in amdgpu_discovery_reg_base_init()
1413 dev_err(adev->dev, "Too many SDMA instances: %d vs %d\n", in amdgpu_discovery_reg_base_init()
1414 adev->sdma.num_instances + 1, in amdgpu_discovery_reg_base_init()
1419 if (le16_to_cpu(ip->hw_id) == VPE_HWID) { in amdgpu_discovery_reg_base_init()
1420 if (adev->vpe.num_instances < AMDGPU_MAX_VPE_INSTANCES) in amdgpu_discovery_reg_base_init()
1421 adev->vpe.num_instances++; in amdgpu_discovery_reg_base_init()
1423 dev_err(adev->dev, "Too many VPE instances: %d vs %d\n", in amdgpu_discovery_reg_base_init()
1424 adev->vpe.num_instances + 1, in amdgpu_discovery_reg_base_init()
1428 if (le16_to_cpu(ip->hw_id) == UMC_HWID) { in amdgpu_discovery_reg_base_init()
1429 adev->gmc.num_umc++; in amdgpu_discovery_reg_base_init()
1430 adev->umc.node_inst_num++; in amdgpu_discovery_reg_base_init()
1433 if (le16_to_cpu(ip->hw_id) == GC_HWID) in amdgpu_discovery_reg_base_init()
1434 adev->gfx.xcc_mask |= in amdgpu_discovery_reg_base_init()
1435 (1U << ip->instance_number); in amdgpu_discovery_reg_base_init()
1437 if (!wafl_ver && le16_to_cpu(ip->hw_id) == WAFLC_HWID) in amdgpu_discovery_reg_base_init()
1438 wafl_ver = IP_VERSION_FULL(ip->major, ip->minor, in amdgpu_discovery_reg_base_init()
1439 ip->revision, 0, 0); in amdgpu_discovery_reg_base_init()
1444 * so that we don't need to convert them when accessing adev->reg_offset. in amdgpu_discovery_reg_base_init()
1446 if (ihdr->base_addr_64_bit) in amdgpu_discovery_reg_base_init()
1456 ip->base_address[k] = in amdgpu_discovery_reg_base_init()
1457 lower_32_bits(le64_to_cpu(ip->base_address_64[k])) & 0x3FFFFFFF; in amdgpu_discovery_reg_base_init()
1459 ip->base_address[k] = le32_to_cpu(ip->base_address[k]); in amdgpu_discovery_reg_base_init()
1460 DRM_DEBUG("\t0x%08x\n", ip->base_address[k]); in amdgpu_discovery_reg_base_init()
1464 if (hw_id_map[hw_ip] == le16_to_cpu(ip->hw_id) && in amdgpu_discovery_reg_base_init()
1467 hw_id_names[le16_to_cpu(ip->hw_id)]); in amdgpu_discovery_reg_base_init()
1468 adev->reg_offset[hw_ip][ip->instance_number] = in amdgpu_discovery_reg_base_init()
1469 ip->base_address; in amdgpu_discovery_reg_base_init()
1480 if (ihdr->version < 3) { in amdgpu_discovery_reg_base_init()
1484 subrev = ip->sub_revision; in amdgpu_discovery_reg_base_init()
1485 variant = ip->variant; in amdgpu_discovery_reg_base_init()
1488 adev->ip_versions[hw_ip] in amdgpu_discovery_reg_base_init()
1489 [ip->instance_number] = in amdgpu_discovery_reg_base_init()
1490 IP_VERSION_FULL(ip->major, in amdgpu_discovery_reg_base_init()
1491 ip->minor, in amdgpu_discovery_reg_base_init()
1492 ip->revision, in amdgpu_discovery_reg_base_init()
1499 if (ihdr->base_addr_64_bit) in amdgpu_discovery_reg_base_init()
1500 ip_offset += struct_size(ip, base_address_64, ip->num_base_address); in amdgpu_discovery_reg_base_init()
1502 ip_offset += struct_size(ip, base_address, ip->num_base_address); in amdgpu_discovery_reg_base_init()
1506 if (wafl_ver && !adev->ip_versions[XGMI_HWIP][0]) in amdgpu_discovery_reg_base_init()
1507 adev->ip_versions[XGMI_HWIP][0] = wafl_ver; in amdgpu_discovery_reg_base_init()
1520 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_harvest_ip()
1521 offset = le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset); in amdgpu_discovery_harvest_ip()
1522 ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + in amdgpu_discovery_harvest_ip()
1524 ihdr_ver = le16_to_cpu(ihdr->version); in amdgpu_discovery_harvest_ip()
1532 if ((adev->pdev->device == 0x731E && in amdgpu_discovery_harvest_ip()
1533 (adev->pdev->revision == 0xC6 || in amdgpu_discovery_harvest_ip()
1534 adev->pdev->revision == 0xC7)) || in amdgpu_discovery_harvest_ip()
1535 (adev->pdev->device == 0x7340 && in amdgpu_discovery_harvest_ip()
1536 adev->pdev->revision == 0xC9) || in amdgpu_discovery_harvest_ip()
1537 (adev->pdev->device == 0x7360 && in amdgpu_discovery_harvest_ip()
1538 adev->pdev->revision == 0xC7)) in amdgpu_discovery_harvest_ip()
1549 if (vcn_harvest_count == adev->vcn.num_vcn_inst) { in amdgpu_discovery_harvest_ip()
1550 adev->harvest_ip_mask |= AMD_HARVEST_IP_VCN_MASK; in amdgpu_discovery_harvest_ip()
1551 adev->harvest_ip_mask |= AMD_HARVEST_IP_JPEG_MASK; in amdgpu_discovery_harvest_ip()
1554 if (umc_harvest_count < adev->gmc.num_umc) { in amdgpu_discovery_harvest_ip()
1555 adev->gmc.num_umc -= umc_harvest_count; in amdgpu_discovery_harvest_ip()
1574 if (!adev->mman.discovery_bin) { in amdgpu_discovery_get_gfx_info()
1576 return -EINVAL; in amdgpu_discovery_get_gfx_info()
1579 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_get_gfx_info()
1580 offset = le16_to_cpu(bhdr->table_list[GC].offset); in amdgpu_discovery_get_gfx_info()
1585 gc_info = (union gc_info *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_get_gfx_info()
1587 switch (le16_to_cpu(gc_info->v1.header.version_major)) { in amdgpu_discovery_get_gfx_info()
1589 adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->v1.gc_num_se); in amdgpu_discovery_get_gfx_info()
1590 adev->gfx.config.max_cu_per_sh = 2 * (le32_to_cpu(gc_info->v1.gc_num_wgp0_per_sa) + in amdgpu_discovery_get_gfx_info()
1591 le32_to_cpu(gc_info->v1.gc_num_wgp1_per_sa)); in amdgpu_discovery_get_gfx_info()
1592 adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->v1.gc_num_sa_per_se); in amdgpu_discovery_get_gfx_info()
1593 adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->v1.gc_num_rb_per_se); in amdgpu_discovery_get_gfx_info()
1594 adev->gfx.config.max_texture_channel_caches = le32_to_cpu(gc_info->v1.gc_num_gl2c); in amdgpu_discovery_get_gfx_info()
1595 adev->gfx.config.max_gprs = le32_to_cpu(gc_info->v1.gc_num_gprs); in amdgpu_discovery_get_gfx_info()
1596 adev->gfx.config.max_gs_threads = le32_to_cpu(gc_info->v1.gc_num_max_gs_thds); in amdgpu_discovery_get_gfx_info()
1597 adev->gfx.config.gs_vgt_table_depth = le32_to_cpu(gc_info->v1.gc_gs_table_depth); in amdgpu_discovery_get_gfx_info()
1598 adev->gfx.config.gs_prim_buffer_depth = le32_to_cpu(gc_info->v1.gc_gsprim_buff_depth); in amdgpu_discovery_get_gfx_info()
1599 adev->gfx.config.double_offchip_lds_buf = le32_to_cpu(gc_info->v1.gc_double_offchip_lds_buffer); in amdgpu_discovery_get_gfx_info()
1600 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gc_info->v1.gc_wave_size); in amdgpu_discovery_get_gfx_info()
1601 adev->gfx.cu_info.max_waves_per_simd = le32_to_cpu(gc_info->v1.gc_max_waves_per_simd); in amdgpu_discovery_get_gfx_info()
1602 adev->gfx.cu_info.max_scratch_slots_per_cu = le32_to_cpu(gc_info->v1.gc_max_scratch_slots_per_cu); in amdgpu_discovery_get_gfx_info()
1603 adev->gfx.cu_info.lds_size = le32_to_cpu(gc_info->v1.gc_lds_size); in amdgpu_discovery_get_gfx_info()
1604 adev->gfx.config.num_sc_per_sh = le32_to_cpu(gc_info->v1.gc_num_sc_per_se) / in amdgpu_discovery_get_gfx_info()
1605 le32_to_cpu(gc_info->v1.gc_num_sa_per_se); in amdgpu_discovery_get_gfx_info()
1606 adev->gfx.config.num_packer_per_sc = le32_to_cpu(gc_info->v1.gc_num_packer_per_sc); in amdgpu_discovery_get_gfx_info()
1607 if (le16_to_cpu(gc_info->v1.header.version_minor) >= 1) { in amdgpu_discovery_get_gfx_info()
1608 adev->gfx.config.gc_num_tcp_per_sa = le32_to_cpu(gc_info->v1_1.gc_num_tcp_per_sa); in amdgpu_discovery_get_gfx_info()
1609 adev->gfx.config.gc_num_sdp_interface = le32_to_cpu(gc_info->v1_1.gc_num_sdp_interface); in amdgpu_discovery_get_gfx_info()
1610 adev->gfx.config.gc_num_tcps = le32_to_cpu(gc_info->v1_1.gc_num_tcps); in amdgpu_discovery_get_gfx_info()
1612 if (le16_to_cpu(gc_info->v1.header.version_minor) >= 2) { in amdgpu_discovery_get_gfx_info()
1613 adev->gfx.config.gc_num_tcp_per_wpg = le32_to_cpu(gc_info->v1_2.gc_num_tcp_per_wpg); in amdgpu_discovery_get_gfx_info()
1614 adev->gfx.config.gc_tcp_l1_size = le32_to_cpu(gc_info->v1_2.gc_tcp_l1_size); in amdgpu_discovery_get_gfx_info()
1615 adev->gfx.config.gc_num_sqc_per_wgp = le32_to_cpu(gc_info->v1_2.gc_num_sqc_per_wgp); in amdgpu_discovery_get_gfx_info()
1616 …adev->gfx.config.gc_l1_instruction_cache_size_per_sqc = le32_to_cpu(gc_info->v1_2.gc_l1_instructio… in amdgpu_discovery_get_gfx_info()
1617 …adev->gfx.config.gc_l1_data_cache_size_per_sqc = le32_to_cpu(gc_info->v1_2.gc_l1_data_cache_size_p… in amdgpu_discovery_get_gfx_info()
1618 adev->gfx.config.gc_gl1c_per_sa = le32_to_cpu(gc_info->v1_2.gc_gl1c_per_sa); in amdgpu_discovery_get_gfx_info()
1619 … adev->gfx.config.gc_gl1c_size_per_instance = le32_to_cpu(gc_info->v1_2.gc_gl1c_size_per_instance); in amdgpu_discovery_get_gfx_info()
1620 adev->gfx.config.gc_gl2c_per_gpu = le32_to_cpu(gc_info->v1_2.gc_gl2c_per_gpu); in amdgpu_discovery_get_gfx_info()
1622 if (le16_to_cpu(gc_info->v1.header.version_minor) >= 3) { in amdgpu_discovery_get_gfx_info()
1623 adev->gfx.config.gc_tcp_size_per_cu = le32_to_cpu(gc_info->v1_3.gc_tcp_size_per_cu); in amdgpu_discovery_get_gfx_info()
1624 adev->gfx.config.gc_tcp_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_tcp_cache_line_size); in amdgpu_discovery_get_gfx_info()
1625 …adev->gfx.config.gc_instruction_cache_size_per_sqc = le32_to_cpu(gc_info->v1_3.gc_instruction_cach… in amdgpu_discovery_get_gfx_info()
1626 …adev->gfx.config.gc_instruction_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_instruction_cache_l… in amdgpu_discovery_get_gfx_info()
1627 …adev->gfx.config.gc_scalar_data_cache_size_per_sqc = le32_to_cpu(gc_info->v1_3.gc_scalar_data_cach… in amdgpu_discovery_get_gfx_info()
1628 …adev->gfx.config.gc_scalar_data_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_scalar_data_cache_l… in amdgpu_discovery_get_gfx_info()
1629 adev->gfx.config.gc_tcc_size = le32_to_cpu(gc_info->v1_3.gc_tcc_size); in amdgpu_discovery_get_gfx_info()
1630 adev->gfx.config.gc_tcc_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_tcc_cache_line_size); in amdgpu_discovery_get_gfx_info()
1634 adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->v2.gc_num_se); in amdgpu_discovery_get_gfx_info()
1635 adev->gfx.config.max_cu_per_sh = le32_to_cpu(gc_info->v2.gc_num_cu_per_sh); in amdgpu_discovery_get_gfx_info()
1636 adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->v2.gc_num_sh_per_se); in amdgpu_discovery_get_gfx_info()
1637 adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->v2.gc_num_rb_per_se); in amdgpu_discovery_get_gfx_info()
1638 adev->gfx.config.max_texture_channel_caches = le32_to_cpu(gc_info->v2.gc_num_tccs); in amdgpu_discovery_get_gfx_info()
1639 adev->gfx.config.max_gprs = le32_to_cpu(gc_info->v2.gc_num_gprs); in amdgpu_discovery_get_gfx_info()
1640 adev->gfx.config.max_gs_threads = le32_to_cpu(gc_info->v2.gc_num_max_gs_thds); in amdgpu_discovery_get_gfx_info()
1641 adev->gfx.config.gs_vgt_table_depth = le32_to_cpu(gc_info->v2.gc_gs_table_depth); in amdgpu_discovery_get_gfx_info()
1642 adev->gfx.config.gs_prim_buffer_depth = le32_to_cpu(gc_info->v2.gc_gsprim_buff_depth); in amdgpu_discovery_get_gfx_info()
1643 adev->gfx.config.double_offchip_lds_buf = le32_to_cpu(gc_info->v2.gc_double_offchip_lds_buffer); in amdgpu_discovery_get_gfx_info()
1644 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gc_info->v2.gc_wave_size); in amdgpu_discovery_get_gfx_info()
1645 adev->gfx.cu_info.max_waves_per_simd = le32_to_cpu(gc_info->v2.gc_max_waves_per_simd); in amdgpu_discovery_get_gfx_info()
1646 adev->gfx.cu_info.max_scratch_slots_per_cu = le32_to_cpu(gc_info->v2.gc_max_scratch_slots_per_cu); in amdgpu_discovery_get_gfx_info()
1647 adev->gfx.cu_info.lds_size = le32_to_cpu(gc_info->v2.gc_lds_size); in amdgpu_discovery_get_gfx_info()
1648 adev->gfx.config.num_sc_per_sh = le32_to_cpu(gc_info->v2.gc_num_sc_per_se) / in amdgpu_discovery_get_gfx_info()
1649 le32_to_cpu(gc_info->v2.gc_num_sh_per_se); in amdgpu_discovery_get_gfx_info()
1650 adev->gfx.config.num_packer_per_sc = le32_to_cpu(gc_info->v2.gc_num_packer_per_sc); in amdgpu_discovery_get_gfx_info()
1651 if (le16_to_cpu(gc_info->v2.header.version_minor) == 1) { in amdgpu_discovery_get_gfx_info()
1652 adev->gfx.config.gc_num_tcp_per_sa = le32_to_cpu(gc_info->v2_1.gc_num_tcp_per_sh); in amdgpu_discovery_get_gfx_info()
1653 adev->gfx.config.gc_tcp_size_per_cu = le32_to_cpu(gc_info->v2_1.gc_tcp_size_per_cu); in amdgpu_discovery_get_gfx_info()
1654 …adev->gfx.config.gc_num_sdp_interface = le32_to_cpu(gc_info->v2_1.gc_num_sdp_interface); /* per XC… in amdgpu_discovery_get_gfx_info()
1655 adev->gfx.config.gc_num_cu_per_sqc = le32_to_cpu(gc_info->v2_1.gc_num_cu_per_sqc); in amdgpu_discovery_get_gfx_info()
1656 …adev->gfx.config.gc_l1_instruction_cache_size_per_sqc = le32_to_cpu(gc_info->v2_1.gc_instruction_c… in amdgpu_discovery_get_gfx_info()
1657 …adev->gfx.config.gc_l1_data_cache_size_per_sqc = le32_to_cpu(gc_info->v2_1.gc_scalar_data_cache_si… in amdgpu_discovery_get_gfx_info()
1658 adev->gfx.config.gc_tcc_size = le32_to_cpu(gc_info->v2_1.gc_tcc_size); /* per XCD */ in amdgpu_discovery_get_gfx_info()
1662 dev_err(adev->dev, in amdgpu_discovery_get_gfx_info()
1664 le16_to_cpu(gc_info->v1.header.version_major), in amdgpu_discovery_get_gfx_info()
1665 le16_to_cpu(gc_info->v1.header.version_minor)); in amdgpu_discovery_get_gfx_info()
1666 return -EINVAL; in amdgpu_discovery_get_gfx_info()
1684 if (!adev->mman.discovery_bin) { in amdgpu_discovery_get_mall_info()
1686 return -EINVAL; in amdgpu_discovery_get_mall_info()
1689 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_get_mall_info()
1690 offset = le16_to_cpu(bhdr->table_list[MALL_INFO].offset); in amdgpu_discovery_get_mall_info()
1695 mall_info = (union mall_info *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_get_mall_info()
1697 switch (le16_to_cpu(mall_info->v1.header.version_major)) { in amdgpu_discovery_get_mall_info()
1700 mall_size_per_umc = le32_to_cpu(mall_info->v1.mall_size_per_m); in amdgpu_discovery_get_mall_info()
1701 m_s_present = le32_to_cpu(mall_info->v1.m_s_present); in amdgpu_discovery_get_mall_info()
1702 half_use = le32_to_cpu(mall_info->v1.m_half_use); in amdgpu_discovery_get_mall_info()
1703 for (u = 0; u < adev->gmc.num_umc; u++) { in amdgpu_discovery_get_mall_info()
1711 adev->gmc.mall_size = mall_size; in amdgpu_discovery_get_mall_info()
1712 adev->gmc.m_half_use = half_use; in amdgpu_discovery_get_mall_info()
1715 mall_size_per_umc = le32_to_cpu(mall_info->v2.mall_size_per_umc); in amdgpu_discovery_get_mall_info()
1716 adev->gmc.mall_size = (uint64_t)mall_size_per_umc * adev->gmc.num_umc; in amdgpu_discovery_get_mall_info()
1719 dev_err(adev->dev, in amdgpu_discovery_get_mall_info()
1721 le16_to_cpu(mall_info->v1.header.version_major), in amdgpu_discovery_get_mall_info()
1722 le16_to_cpu(mall_info->v1.header.version_minor)); in amdgpu_discovery_get_mall_info()
1723 return -EINVAL; in amdgpu_discovery_get_mall_info()
1739 if (!adev->mman.discovery_bin) { in amdgpu_discovery_get_vcn_info()
1741 return -EINVAL; in amdgpu_discovery_get_vcn_info()
1749 if (adev->vcn.num_vcn_inst > VCN_INFO_TABLE_MAX_NUM_INSTANCES) { in amdgpu_discovery_get_vcn_info()
1750 dev_err(adev->dev, "invalid vcn instances\n"); in amdgpu_discovery_get_vcn_info()
1751 return -EINVAL; in amdgpu_discovery_get_vcn_info()
1754 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_get_vcn_info()
1755 offset = le16_to_cpu(bhdr->table_list[VCN_INFO].offset); in amdgpu_discovery_get_vcn_info()
1760 vcn_info = (union vcn_info *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_get_vcn_info()
1762 switch (le16_to_cpu(vcn_info->v1.header.version_major)) { in amdgpu_discovery_get_vcn_info()
1767 for (v = 0; v < adev->vcn.num_vcn_inst; v++) { in amdgpu_discovery_get_vcn_info()
1768 adev->vcn.inst[v].vcn_codec_disable_mask = in amdgpu_discovery_get_vcn_info()
1769 le32_to_cpu(vcn_info->v1.instance_info[v].fuse_data.all_bits); in amdgpu_discovery_get_vcn_info()
1773 dev_err(adev->dev, in amdgpu_discovery_get_vcn_info()
1775 le16_to_cpu(vcn_info->v1.header.version_major), in amdgpu_discovery_get_vcn_info()
1776 le16_to_cpu(vcn_info->v1.header.version_minor)); in amdgpu_discovery_get_vcn_info()
1777 return -EINVAL; in amdgpu_discovery_get_vcn_info()
1795 pos = vram_size - DISCOVERY_TMR_OFFSET; in amdgpu_discovery_refresh_nps_info()
1806 le32_to_cpu(nhdr->size_bytes), in amdgpu_discovery_refresh_nps_info()
1808 dev_err(adev->dev, "nps data refresh, checksum mismatch\n"); in amdgpu_discovery_refresh_nps_info()
1809 return -EINVAL; in amdgpu_discovery_refresh_nps_info()
1828 return -EINVAL; in amdgpu_discovery_get_nps_info()
1836 if (!adev->mman.discovery_bin) { in amdgpu_discovery_get_nps_info()
1837 dev_err(adev->dev, in amdgpu_discovery_get_nps_info()
1838 "fetch mem range failed, ip discovery uninitialized\n"); in amdgpu_discovery_get_nps_info()
1839 return -EINVAL; in amdgpu_discovery_get_nps_info()
1842 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_get_nps_info()
1843 offset = le16_to_cpu(bhdr->table_list[NPS_INFO].offset); in amdgpu_discovery_get_nps_info()
1846 return -ENOENT; in amdgpu_discovery_get_nps_info()
1850 return -ENOENT; in amdgpu_discovery_get_nps_info()
1853 (union nps_info *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_get_nps_info()
1856 switch (le16_to_cpu(nps_info->v1.header.version_major)) { in amdgpu_discovery_get_nps_info()
1858 mem_ranges = kvcalloc(nps_info->v1.count, in amdgpu_discovery_get_nps_info()
1862 return -ENOMEM; in amdgpu_discovery_get_nps_info()
1863 *nps_type = nps_info->v1.nps_type; in amdgpu_discovery_get_nps_info()
1864 *range_cnt = nps_info->v1.count; in amdgpu_discovery_get_nps_info()
1867 nps_info->v1.instance_info[i].base_address; in amdgpu_discovery_get_nps_info()
1869 nps_info->v1.instance_info[i].limit_address; in amdgpu_discovery_get_nps_info()
1870 mem_ranges[i].nid_mask = -1; in amdgpu_discovery_get_nps_info()
1876 dev_err(adev->dev, "Unhandled NPS info table %d.%d\n", in amdgpu_discovery_get_nps_info()
1877 le16_to_cpu(nps_info->v1.header.version_major), in amdgpu_discovery_get_nps_info()
1878 le16_to_cpu(nps_info->v1.header.version_minor)); in amdgpu_discovery_get_nps_info()
1879 return -EINVAL; in amdgpu_discovery_get_nps_info()
1933 dev_err(adev->dev, in amdgpu_discovery_set_common_ip_blocks()
1936 return -EINVAL; in amdgpu_discovery_set_common_ip_blocks()
1989 dev_err(adev->dev, "Failed to add gmc ip block(GC_HWIP:0x%x)\n", in amdgpu_discovery_set_gmc_ip_blocks()
1991 return -EINVAL; in amdgpu_discovery_set_gmc_ip_blocks()
2033 dev_err(adev->dev, in amdgpu_discovery_set_ih_ip_blocks()
2036 return -EINVAL; in amdgpu_discovery_set_ih_ip_blocks()
2097 dev_err(adev->dev, in amdgpu_discovery_set_psp_ip_blocks()
2100 return -EINVAL; in amdgpu_discovery_set_psp_ip_blocks()
2112 if (adev->asic_type == CHIP_ARCTURUS) in amdgpu_discovery_set_smu_ip_blocks()
2157 dev_err(adev->dev, in amdgpu_discovery_set_smu_ip_blocks()
2160 return -EINVAL; in amdgpu_discovery_set_smu_ip_blocks()
2175 if (adev->enable_virtual_display) { in amdgpu_discovery_set_display_ip_blocks()
2208 if (adev->ip_versions[DCE_HWIP][0] == IP_VERSION(4, 1, 0)) in amdgpu_discovery_set_display_ip_blocks()
2209 adev->ip_versions[DCE_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_display_ip_blocks()
2217 dev_err(adev->dev, in amdgpu_discovery_set_display_ip_blocks()
2220 return -EINVAL; in amdgpu_discovery_set_display_ip_blocks()
2233 dev_err(adev->dev, in amdgpu_discovery_set_display_ip_blocks()
2236 return -EINVAL; in amdgpu_discovery_set_display_ip_blocks()
2292 dev_err(adev->dev, "Failed to add gfx ip block(GC_HWIP:0x%x)\n", in amdgpu_discovery_set_gc_ip_blocks()
2294 return -EINVAL; in amdgpu_discovery_set_gc_ip_blocks()
2348 dev_err(adev->dev, in amdgpu_discovery_set_sdma_ip_blocks()
2351 return -EINVAL; in amdgpu_discovery_set_sdma_ip_blocks()
2362 /* UVD is not supported on vega20 SR-IOV */ in amdgpu_discovery_set_mm_ip_blocks()
2363 if (!(adev->asic_type == CHIP_VEGA20 && amdgpu_sriov_vf(adev))) in amdgpu_discovery_set_mm_ip_blocks()
2367 dev_err(adev->dev, in amdgpu_discovery_set_mm_ip_blocks()
2370 return -EINVAL; in amdgpu_discovery_set_mm_ip_blocks()
2375 /* VCE is not supported on vega20 SR-IOV */ in amdgpu_discovery_set_mm_ip_blocks()
2376 if (!(adev->asic_type == CHIP_VEGA20 && amdgpu_sriov_vf(adev))) in amdgpu_discovery_set_mm_ip_blocks()
2380 dev_err(adev->dev, in amdgpu_discovery_set_mm_ip_blocks()
2383 return -EINVAL; in amdgpu_discovery_set_mm_ip_blocks()
2444 dev_err(adev->dev, in amdgpu_discovery_set_mm_ip_blocks()
2447 return -EINVAL; in amdgpu_discovery_set_mm_ip_blocks()
2466 adev->enable_mes = true; in amdgpu_discovery_set_mes_ip_blocks()
2467 adev->enable_mes_kiq = true; in amdgpu_discovery_set_mes_ip_blocks()
2472 adev->enable_mes = true; in amdgpu_discovery_set_mes_ip_blocks()
2473 adev->enable_mes_kiq = true; in amdgpu_discovery_set_mes_ip_blocks()
2475 adev->enable_uni_mes = true; in amdgpu_discovery_set_mes_ip_blocks()
2518 adev->enable_umsch_mm = true; in amdgpu_discovery_set_umsch_mm_ip_blocks()
2550 switch (adev->asic_type) { in amdgpu_discovery_set_ip_blocks()
2573 return -EINVAL; in amdgpu_discovery_set_ip_blocks()
2582 switch (adev->asic_type) { in amdgpu_discovery_set_ip_blocks()
2585 adev->sdma.num_instances = 2; in amdgpu_discovery_set_ip_blocks()
2586 adev->gmc.num_umc = 4; in amdgpu_discovery_set_ip_blocks()
2587 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2588 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2589 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2590 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2591 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2592 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2593 adev->ip_versions[DF_HWIP][0] = IP_VERSION(2, 1, 0); in amdgpu_discovery_set_ip_blocks()
2594 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(6, 1, 0); in amdgpu_discovery_set_ip_blocks()
2595 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 0, 0); in amdgpu_discovery_set_ip_blocks()
2596 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2597 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2598 adev->ip_versions[THM_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2599 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2600 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 0, 1); in amdgpu_discovery_set_ip_blocks()
2601 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks()
2602 adev->ip_versions[VCE_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2603 adev->ip_versions[DCI_HWIP][0] = IP_VERSION(12, 0, 0); in amdgpu_discovery_set_ip_blocks()
2607 adev->sdma.num_instances = 2; in amdgpu_discovery_set_ip_blocks()
2608 adev->gmc.num_umc = 4; in amdgpu_discovery_set_ip_blocks()
2609 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 3, 0); in amdgpu_discovery_set_ip_blocks()
2610 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 3, 0); in amdgpu_discovery_set_ip_blocks()
2611 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2612 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2613 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2614 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2615 adev->ip_versions[DF_HWIP][0] = IP_VERSION(2, 5, 0); in amdgpu_discovery_set_ip_blocks()
2616 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(6, 2, 0); in amdgpu_discovery_set_ip_blocks()
2617 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 1, 0); in amdgpu_discovery_set_ip_blocks()
2618 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2619 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2620 adev->ip_versions[THM_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2621 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(9, 0, 1); in amdgpu_discovery_set_ip_blocks()
2622 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 2, 1); in amdgpu_discovery_set_ip_blocks()
2623 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks()
2624 adev->ip_versions[VCE_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2625 adev->ip_versions[DCI_HWIP][0] = IP_VERSION(12, 0, 1); in amdgpu_discovery_set_ip_blocks()
2629 adev->sdma.num_instances = 1; in amdgpu_discovery_set_ip_blocks()
2630 adev->vcn.num_vcn_inst = 1; in amdgpu_discovery_set_ip_blocks()
2631 adev->gmc.num_umc = 2; in amdgpu_discovery_set_ip_blocks()
2632 if (adev->apu_flags & AMD_APU_IS_RAVEN2) { in amdgpu_discovery_set_ip_blocks()
2633 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 2, 0); in amdgpu_discovery_set_ip_blocks()
2634 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 2, 0); in amdgpu_discovery_set_ip_blocks()
2635 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 1, 1); in amdgpu_discovery_set_ip_blocks()
2636 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 1, 1); in amdgpu_discovery_set_ip_blocks()
2637 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 1, 1); in amdgpu_discovery_set_ip_blocks()
2638 adev->ip_versions[DF_HWIP][0] = IP_VERSION(2, 1, 1); in amdgpu_discovery_set_ip_blocks()
2639 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 0, 1); in amdgpu_discovery_set_ip_blocks()
2640 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(7, 5, 0); in amdgpu_discovery_set_ip_blocks()
2641 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(10, 0, 1); in amdgpu_discovery_set_ip_blocks()
2642 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(10, 0, 1); in amdgpu_discovery_set_ip_blocks()
2643 adev->ip_versions[THM_HWIP][0] = IP_VERSION(10, 1, 0); in amdgpu_discovery_set_ip_blocks()
2644 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(10, 0, 1); in amdgpu_discovery_set_ip_blocks()
2645 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 2, 2); in amdgpu_discovery_set_ip_blocks()
2646 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(1, 0, 1); in amdgpu_discovery_set_ip_blocks()
2647 adev->ip_versions[DCE_HWIP][0] = IP_VERSION(1, 0, 1); in amdgpu_discovery_set_ip_blocks()
2648 adev->ip_versions[ISP_HWIP][0] = IP_VERSION(2, 0, 0); in amdgpu_discovery_set_ip_blocks()
2650 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 1, 0); in amdgpu_discovery_set_ip_blocks()
2651 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 1, 0); in amdgpu_discovery_set_ip_blocks()
2652 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 1, 0); in amdgpu_discovery_set_ip_blocks()
2653 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 1, 0); in amdgpu_discovery_set_ip_blocks()
2654 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 1, 0); in amdgpu_discovery_set_ip_blocks()
2655 adev->ip_versions[DF_HWIP][0] = IP_VERSION(2, 1, 0); in amdgpu_discovery_set_ip_blocks()
2656 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks()
2657 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks()
2658 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(10, 0, 0); in amdgpu_discovery_set_ip_blocks()
2659 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(10, 0, 0); in amdgpu_discovery_set_ip_blocks()
2660 adev->ip_versions[THM_HWIP][0] = IP_VERSION(10, 0, 0); in amdgpu_discovery_set_ip_blocks()
2661 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(10, 0, 0); in amdgpu_discovery_set_ip_blocks()
2662 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 1, 0); in amdgpu_discovery_set_ip_blocks()
2663 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(1, 0, 0); in amdgpu_discovery_set_ip_blocks()
2664 adev->ip_versions[DCE_HWIP][0] = IP_VERSION(1, 0, 0); in amdgpu_discovery_set_ip_blocks()
2665 adev->ip_versions[ISP_HWIP][0] = IP_VERSION(2, 0, 0); in amdgpu_discovery_set_ip_blocks()
2670 adev->sdma.num_instances = 2; in amdgpu_discovery_set_ip_blocks()
2671 adev->gmc.num_umc = 8; in amdgpu_discovery_set_ip_blocks()
2672 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 0); in amdgpu_discovery_set_ip_blocks()
2673 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 4, 0); in amdgpu_discovery_set_ip_blocks()
2674 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2675 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2676 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2677 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2678 adev->ip_versions[DF_HWIP][0] = IP_VERSION(3, 6, 0); in amdgpu_discovery_set_ip_blocks()
2679 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 4, 0); in amdgpu_discovery_set_ip_blocks()
2680 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 1, 1); in amdgpu_discovery_set_ip_blocks()
2681 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2682 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2683 adev->ip_versions[THM_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2684 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2685 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 4, 0); in amdgpu_discovery_set_ip_blocks()
2686 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(7, 2, 0); in amdgpu_discovery_set_ip_blocks()
2687 adev->ip_versions[UVD_HWIP][1] = IP_VERSION(7, 2, 0); in amdgpu_discovery_set_ip_blocks()
2688 adev->ip_versions[VCE_HWIP][0] = IP_VERSION(4, 1, 0); in amdgpu_discovery_set_ip_blocks()
2689 adev->ip_versions[DCI_HWIP][0] = IP_VERSION(12, 1, 0); in amdgpu_discovery_set_ip_blocks()
2693 adev->sdma.num_instances = 8; in amdgpu_discovery_set_ip_blocks()
2694 adev->vcn.num_vcn_inst = 2; in amdgpu_discovery_set_ip_blocks()
2695 adev->gmc.num_umc = 8; in amdgpu_discovery_set_ip_blocks()
2696 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 1); in amdgpu_discovery_set_ip_blocks()
2697 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 4, 1); in amdgpu_discovery_set_ip_blocks()
2698 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 2, 1); in amdgpu_discovery_set_ip_blocks()
2699 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 2, 1); in amdgpu_discovery_set_ip_blocks()
2700 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2701 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2702 adev->ip_versions[SDMA1_HWIP][1] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2703 adev->ip_versions[SDMA1_HWIP][2] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2704 adev->ip_versions[SDMA1_HWIP][3] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2705 adev->ip_versions[SDMA1_HWIP][4] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2706 adev->ip_versions[SDMA1_HWIP][5] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2707 adev->ip_versions[SDMA1_HWIP][6] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2708 adev->ip_versions[DF_HWIP][0] = IP_VERSION(3, 6, 1); in amdgpu_discovery_set_ip_blocks()
2709 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 4, 1); in amdgpu_discovery_set_ip_blocks()
2710 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 1, 2); in amdgpu_discovery_set_ip_blocks()
2711 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(11, 0, 4); in amdgpu_discovery_set_ip_blocks()
2712 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2713 adev->ip_versions[THM_HWIP][0] = IP_VERSION(11, 0, 3); in amdgpu_discovery_set_ip_blocks()
2714 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(11, 0, 3); in amdgpu_discovery_set_ip_blocks()
2715 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 4, 1); in amdgpu_discovery_set_ip_blocks()
2716 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(2, 5, 0); in amdgpu_discovery_set_ip_blocks()
2717 adev->ip_versions[UVD_HWIP][1] = IP_VERSION(2, 5, 0); in amdgpu_discovery_set_ip_blocks()
2721 adev->sdma.num_instances = 5; in amdgpu_discovery_set_ip_blocks()
2722 adev->vcn.num_vcn_inst = 2; in amdgpu_discovery_set_ip_blocks()
2723 adev->gmc.num_umc = 4; in amdgpu_discovery_set_ip_blocks()
2724 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 2); in amdgpu_discovery_set_ip_blocks()
2725 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 4, 2); in amdgpu_discovery_set_ip_blocks()
2726 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2727 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2728 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2729 adev->ip_versions[SDMA0_HWIP][1] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2730 adev->ip_versions[SDMA0_HWIP][2] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2731 adev->ip_versions[SDMA0_HWIP][3] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2732 adev->ip_versions[SDMA0_HWIP][4] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2733 adev->ip_versions[DF_HWIP][0] = IP_VERSION(3, 6, 2); in amdgpu_discovery_set_ip_blocks()
2734 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 4, 4); in amdgpu_discovery_set_ip_blocks()
2735 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 7, 0); in amdgpu_discovery_set_ip_blocks()
2736 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(13, 0, 2); in amdgpu_discovery_set_ip_blocks()
2737 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(13, 0, 2); in amdgpu_discovery_set_ip_blocks()
2738 adev->ip_versions[THM_HWIP][0] = IP_VERSION(13, 0, 2); in amdgpu_discovery_set_ip_blocks()
2739 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(13, 0, 2); in amdgpu_discovery_set_ip_blocks()
2740 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 4, 2); in amdgpu_discovery_set_ip_blocks()
2741 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(2, 6, 0); in amdgpu_discovery_set_ip_blocks()
2742 adev->ip_versions[UVD_HWIP][1] = IP_VERSION(2, 6, 0); in amdgpu_discovery_set_ip_blocks()
2743 adev->ip_versions[XGMI_HWIP][0] = IP_VERSION(6, 1, 0); in amdgpu_discovery_set_ip_blocks()
2761 adev->family = AMDGPU_FAMILY_AI; in amdgpu_discovery_set_ip_blocks()
2766 adev->family = AMDGPU_FAMILY_RV; in amdgpu_discovery_set_ip_blocks()
2777 adev->family = AMDGPU_FAMILY_NV; in amdgpu_discovery_set_ip_blocks()
2780 adev->family = AMDGPU_FAMILY_VGH; in amdgpu_discovery_set_ip_blocks()
2781 adev->apu_flags |= AMD_APU_IS_VANGOGH; in amdgpu_discovery_set_ip_blocks()
2784 adev->family = AMDGPU_FAMILY_YC; in amdgpu_discovery_set_ip_blocks()
2787 adev->family = AMDGPU_FAMILY_GC_10_3_6; in amdgpu_discovery_set_ip_blocks()
2790 adev->family = AMDGPU_FAMILY_GC_10_3_7; in amdgpu_discovery_set_ip_blocks()
2795 adev->family = AMDGPU_FAMILY_GC_11_0_0; in amdgpu_discovery_set_ip_blocks()
2799 adev->family = AMDGPU_FAMILY_GC_11_0_1; in amdgpu_discovery_set_ip_blocks()
2805 adev->family = AMDGPU_FAMILY_GC_11_5_0; in amdgpu_discovery_set_ip_blocks()
2809 adev->family = AMDGPU_FAMILY_GC_12_0_0; in amdgpu_discovery_set_ip_blocks()
2812 return -EINVAL; in amdgpu_discovery_set_ip_blocks()
2831 adev->flags |= AMD_IS_APU; in amdgpu_discovery_set_ip_blocks()
2841 adev->nbio.funcs = &nbio_v6_1_funcs; in amdgpu_discovery_set_ip_blocks()
2842 adev->nbio.hdp_flush_reg = &nbio_v6_1_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2847 adev->nbio.funcs = &nbio_v7_0_funcs; in amdgpu_discovery_set_ip_blocks()
2848 adev->nbio.hdp_flush_reg = &nbio_v7_0_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2853 adev->nbio.funcs = &nbio_v7_4_funcs; in amdgpu_discovery_set_ip_blocks()
2854 adev->nbio.hdp_flush_reg = &nbio_v7_4_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2858 adev->nbio.funcs = &nbio_v7_9_funcs; in amdgpu_discovery_set_ip_blocks()
2859 adev->nbio.hdp_flush_reg = &nbio_v7_9_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2865 adev->nbio.funcs = &nbio_v7_11_funcs; in amdgpu_discovery_set_ip_blocks()
2866 adev->nbio.hdp_flush_reg = &nbio_v7_11_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2873 adev->nbio.funcs = &nbio_v7_2_funcs; in amdgpu_discovery_set_ip_blocks()
2874 adev->nbio.hdp_flush_reg = &nbio_v7_2_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2884 adev->nbio.funcs = &nbio_v2_3_funcs; in amdgpu_discovery_set_ip_blocks()
2885 adev->nbio.hdp_flush_reg = &nbio_v2_3_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2890 adev->nbio.funcs = &nbio_v4_3_sriov_funcs; in amdgpu_discovery_set_ip_blocks()
2892 adev->nbio.funcs = &nbio_v4_3_funcs; in amdgpu_discovery_set_ip_blocks()
2893 adev->nbio.hdp_flush_reg = &nbio_v4_3_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2897 adev->nbio.funcs = &nbio_v7_7_funcs; in amdgpu_discovery_set_ip_blocks()
2898 adev->nbio.hdp_flush_reg = &nbio_v7_7_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2901 adev->nbio.funcs = &nbif_v6_3_1_funcs; in amdgpu_discovery_set_ip_blocks()
2902 adev->nbio.hdp_flush_reg = &nbif_v6_3_1_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2919 adev->hdp.funcs = &hdp_v4_0_funcs; in amdgpu_discovery_set_ip_blocks()
2927 adev->hdp.funcs = &hdp_v5_0_funcs; in amdgpu_discovery_set_ip_blocks()
2930 adev->hdp.funcs = &hdp_v5_2_funcs; in amdgpu_discovery_set_ip_blocks()
2935 adev->hdp.funcs = &hdp_v6_0_funcs; in amdgpu_discovery_set_ip_blocks()
2938 adev->hdp.funcs = &hdp_v7_0_funcs; in amdgpu_discovery_set_ip_blocks()
2948 adev->df.funcs = &df_v3_6_funcs; in amdgpu_discovery_set_ip_blocks()
2955 adev->df.funcs = &df_v1_7_funcs; in amdgpu_discovery_set_ip_blocks()
2958 adev->df.funcs = &df_v4_3_funcs; in amdgpu_discovery_set_ip_blocks()
2961 adev->df.funcs = &df_v4_6_2_funcs; in amdgpu_discovery_set_ip_blocks()
2965 adev->df.funcs = &df_v4_15_funcs; in amdgpu_discovery_set_ip_blocks()
2977 adev->smuio.funcs = &smuio_v9_0_funcs; in amdgpu_discovery_set_ip_blocks()
2985 adev->smuio.funcs = &smuio_v11_0_funcs; in amdgpu_discovery_set_ip_blocks()
2995 adev->smuio.funcs = &smuio_v11_0_6_funcs; in amdgpu_discovery_set_ip_blocks()
2998 adev->smuio.funcs = &smuio_v13_0_funcs; in amdgpu_discovery_set_ip_blocks()
3002 adev->smuio.funcs = &smuio_v13_0_3_funcs; in amdgpu_discovery_set_ip_blocks()
3003 if (adev->smuio.funcs->get_pkg_type(adev) == AMDGPU_PKG_TYPE_APU) { in amdgpu_discovery_set_ip_blocks()
3004 adev->flags |= AMD_IS_APU; in amdgpu_discovery_set_ip_blocks()
3011 adev->smuio.funcs = &smuio_v13_0_6_funcs; in amdgpu_discovery_set_ip_blocks()
3014 adev->smuio.funcs = &smuio_v14_0_2_funcs; in amdgpu_discovery_set_ip_blocks()
3025 adev->lsdma.funcs = &lsdma_v6_0_funcs; in amdgpu_discovery_set_ip_blocks()
3029 adev->lsdma.funcs = &lsdma_v7_0_funcs; in amdgpu_discovery_set_ip_blocks()
3043 /* For SR-IOV, PSP needs to be initialized before IH */ in amdgpu_discovery_set_ip_blocks()
3056 if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)) { in amdgpu_discovery_set_ip_blocks()
3063 if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)) { in amdgpu_discovery_set_ip_blocks()
3081 if ((adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT && in amdgpu_discovery_set_ip_blocks()
3083 (adev->firmware.load_type == AMDGPU_FW_LOAD_RLC_BACKDOOR_AUTO && amdgpu_dpm == 1)) { in amdgpu_discovery_set_ip_blocks()