clk/renesas/r9a09g057-cpg.c

128 						BUS_MSTOP(5, BIT(9))),
137 	DEF_MOD_CRITICAL("icu_0_pclk_i",	CLK_PLLCM33_DIV16, 0, 5, 0, 5,
140 						BUS_MSTOP(3, BIT(5))),
142 						BUS_MSTOP(5, BIT(10))),
144 						BUS_MSTOP(5, BIT(11))),
145 	DEF_MOD("gtm_2_pclk",			CLK_PLLCLN_DIV16, 4, 5, 2, 5,
166 						BUS_MSTOP(5, BIT(12))),
167 	DEF_MOD("wdt_2_clk_loco",		CLK_QEXTAL, 5, 0, 2, 16,
168 						BUS_MSTOP(5, BIT(12))),
169 	DEF_MOD("wdt_3_clkp",			CLK_PLLCLN_DIV16, 5, 1, 2, 17,
170 						BUS_MSTOP(5, BIT(13))),
171 	DEF_MOD("wdt_3_clk_loco",		CLK_QEXTAL, 5, 2, 2, 18,
172 						BUS_MSTOP(5, BIT(13))),
179 	DEF_MOD("riic_1_ckm",			CLK_PLLCLN_DIV16, 9, 5, 4, 21,
186 						BUS_MSTOP(1, BIT(5))),
193 	DEF_MOD("sdhi_0_imclk",			CLK_PLLCLN_DIV8, 10, 3, 5, 3,
195 	DEF_MOD("sdhi_0_imclk2",		CLK_PLLCLN_DIV8, 10, 4, 5, 4,
197 	DEF_MOD("sdhi_0_clk_hs",		CLK_PLLCLN_DIV2, 10, 5, 5, 5,
199 	DEF_MOD("sdhi_0_aclk",			CLK_PLLDTY_ACPU_DIV4, 10, 6, 5, 6,
201 	DEF_MOD("sdhi_1_imclk",			CLK_PLLCLN_DIV8, 10, 7, 5, 7,
203 	DEF_MOD("sdhi_1_imclk2",		CLK_PLLCLN_DIV8, 10, 8, 5, 8,
205 	DEF_MOD("sdhi_1_clk_hs",		CLK_PLLCLN_DIV2, 10, 9, 5, 9,
207 	DEF_MOD("sdhi_1_aclk",			CLK_PLLDTY_ACPU_DIV4, 10, 10, 5, 10,
209 	DEF_MOD("sdhi_2_imclk",			CLK_PLLCLN_DIV8, 10, 11, 5, 11,
211 	DEF_MOD("sdhi_2_imclk2",		CLK_PLLCLN_DIV8, 10, 12, 5, 12,
213 	DEF_MOD("sdhi_2_clk_hs",		CLK_PLLCLN_DIV2, 10, 13, 5, 13,
215 	DEF_MOD("sdhi_2_aclk",			CLK_PLLDTY_ACPU_DIV4, 10, 14, 5, 14,
223 	DEF_MOD("cru_1_aclk",			CLK_PLLDTY_ACPU_DIV2, 13, 5, 6, 21,
224 						BUS_MSTOP(9, BIT(5))),
226 						BUS_MSTOP(9, BIT(5))),
228 						BUS_MSTOP(9, BIT(5))),
248 	DEF_RST(3, 4, 1, 5),		/* DMAC_3_ARESETN */
249 	DEF_RST(3, 5, 1, 6),		/* DMAC_4_ARESETN */
260 	DEF_RST(7, 4, 3, 5),		/* GTM_7_PRESETZ */
261 	DEF_RST(7, 5, 3, 6),		/* WDT_0_RESET */
265 	DEF_RST(9, 5, 4, 6),		/* SCIF_0_RST_SYSTEM_N */
278 	DEF_RST(12, 5, 5, 22),		/* CRU_0_PRESETN */
279 	DEF_RST(12, 6, 5, 23),		/* CRU_0_ARESETN */
280 	DEF_RST(12, 7, 5, 24),		/* CRU_0_S_RESETN */
281 	DEF_RST(12, 8, 5, 25),		/* CRU_1_PRESETN */
282 	DEF_RST(12, 9, 5, 26),		/* CRU_1_ARESETN */
283 	DEF_RST(12, 10, 5, 27),		/* CRU_1_S_RESETN */
284 	DEF_RST(12, 11, 5, 28),		/* CRU_2_PRESETN */
285 	DEF_RST(12, 12, 5, 29),		/* CRU_2_ARESETN */
286 	DEF_RST(12, 13, 5, 30),		/* CRU_2_S_RESETN */
287 	DEF_RST(12, 14, 5, 31),		/* CRU_3_PRESETN */