Lines Matching full:apic
4 * Local APIC virtualization
63 * Enable local APIC timer advancement (tscdeadline mode only) with adaptive
79 static int kvm_lapic_msr_read(struct kvm_lapic *apic, u32 reg, u64 *data);
80 static int kvm_lapic_msr_write(struct kvm_lapic *apic, u32 reg, u64 data);
87 static inline void kvm_lapic_set_reg(struct kvm_lapic *apic, int reg_off, u32 val) in kvm_lapic_set_reg() argument
89 __kvm_lapic_set_reg(apic->regs, reg_off, val); in kvm_lapic_set_reg()
98 static __always_inline u64 kvm_lapic_get_reg64(struct kvm_lapic *apic, int reg) in kvm_lapic_get_reg64() argument
100 return __kvm_lapic_get_reg64(apic->regs, reg); in kvm_lapic_get_reg64()
109 static __always_inline void kvm_lapic_set_reg64(struct kvm_lapic *apic, in kvm_lapic_set_reg64() argument
112 __kvm_lapic_set_reg64(apic->regs, reg, val); in kvm_lapic_set_reg64()
122 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_pending_eoi() local
124 return apic_test_vector(vector, apic->regs + APIC_ISR) || in kvm_apic_pending_eoi()
125 apic_test_vector(vector, apic->regs + APIC_IRR); in kvm_apic_pending_eoi()
144 static inline int apic_enabled(struct kvm_lapic *apic) in apic_enabled() argument
146 return kvm_apic_sw_enabled(apic) && kvm_apic_hw_enabled(apic); in apic_enabled()
156 static inline u32 kvm_x2apic_id(struct kvm_lapic *apic) in kvm_x2apic_id() argument
158 return apic->vcpu->vcpu_id; in kvm_x2apic_id()
228 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_recalculate_phys_map() local
229 u32 x2apic_id = kvm_x2apic_id(apic); in kvm_recalculate_phys_map()
230 u32 xapic_id = kvm_xapic_id(apic); in kvm_recalculate_phys_map()
242 * Bail if a vCPU was added and/or enabled its APIC between allocating in kvm_recalculate_phys_map()
251 * Deliberately truncate the vCPU ID when detecting a mismatched APIC in kvm_recalculate_phys_map()
256 if (!apic_x2apic_mode(apic) && xapic_id != (u8)vcpu->vcpu_id) in kvm_recalculate_phys_map()
260 * Apply KVM's hotplug hack if userspace has enable 32-bit APIC IDs. in kvm_recalculate_phys_map()
267 * userspace has not enabled 32-bit x2APIC IDs. Each APIC is supposed in kvm_recalculate_phys_map()
269 * effective APIC ID, e.g. due to the x2APIC wrap or because the guest in kvm_recalculate_phys_map()
275 if (apic_x2apic_mode(apic) || x2apic_id > 0xff) in kvm_recalculate_phys_map()
276 new->phys_map[x2apic_id] = apic; in kvm_recalculate_phys_map()
278 if (!apic_x2apic_mode(apic) && !new->phys_map[xapic_id]) in kvm_recalculate_phys_map()
279 new->phys_map[xapic_id] = apic; in kvm_recalculate_phys_map()
282 * Disable the optimized map if the physical APIC ID is already in kvm_recalculate_phys_map()
286 if (apic_x2apic_mode(apic)) in kvm_recalculate_phys_map()
294 new->phys_map[physical_id] = apic; in kvm_recalculate_phys_map()
303 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_recalculate_logical_map() local
312 if (!kvm_apic_sw_enabled(apic)) in kvm_recalculate_logical_map()
315 ldr = kvm_lapic_get_reg(apic, APIC_LDR); in kvm_recalculate_logical_map()
319 if (apic_x2apic_mode(apic)) { in kvm_recalculate_logical_map()
323 if (kvm_lapic_get_reg(apic, APIC_DFR) == APIC_DFR_FLAT) in kvm_recalculate_logical_map()
347 if (apic_x2apic_mode(apic)) in kvm_recalculate_logical_map()
363 cluster[ldr] = apic; in kvm_recalculate_logical_map()
392 "Dirty APIC map without an in-kernel local APIC"); in kvm_recalculate_apic_map()
399 * or the APIC registers (if dirty). Note, on retry the map may have in kvm_recalculate_apic_map()
416 * with the highest x2APIC ID is toggling its APIC on and off. in kvm_recalculate_apic_map()
422 max_id = max(max_id, kvm_x2apic_id(vcpu->arch.apic)); in kvm_recalculate_apic_map()
477 * Write kvm->arch.apic_map before clearing apic->apic_map_dirty. in kvm_recalculate_apic_map()
490 static inline void apic_set_spiv(struct kvm_lapic *apic, u32 val) in apic_set_spiv() argument
494 kvm_lapic_set_reg(apic, APIC_SPIV, val); in apic_set_spiv()
496 if (enabled != apic->sw_enabled) { in apic_set_spiv()
497 apic->sw_enabled = enabled; in apic_set_spiv()
503 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in apic_set_spiv()
508 kvm_make_request(KVM_REQ_APF_READY, apic->vcpu); in apic_set_spiv()
509 kvm_xen_sw_enable_lapic(apic->vcpu); in apic_set_spiv()
513 static inline void kvm_apic_set_xapic_id(struct kvm_lapic *apic, u8 id) in kvm_apic_set_xapic_id() argument
515 kvm_lapic_set_reg(apic, APIC_ID, id << 24); in kvm_apic_set_xapic_id()
516 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_xapic_id()
519 static inline void kvm_apic_set_ldr(struct kvm_lapic *apic, u32 id) in kvm_apic_set_ldr() argument
521 kvm_lapic_set_reg(apic, APIC_LDR, id); in kvm_apic_set_ldr()
522 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_ldr()
525 static inline void kvm_apic_set_dfr(struct kvm_lapic *apic, u32 val) in kvm_apic_set_dfr() argument
527 kvm_lapic_set_reg(apic, APIC_DFR, val); in kvm_apic_set_dfr()
528 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_dfr()
531 static inline void kvm_apic_set_x2apic_id(struct kvm_lapic *apic, u32 id) in kvm_apic_set_x2apic_id() argument
535 WARN_ON_ONCE(id != apic->vcpu->vcpu_id); in kvm_apic_set_x2apic_id()
537 kvm_lapic_set_reg(apic, APIC_ID, id); in kvm_apic_set_x2apic_id()
538 kvm_lapic_set_reg(apic, APIC_LDR, ldr); in kvm_apic_set_x2apic_id()
539 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_x2apic_id()
542 static inline int apic_lvt_enabled(struct kvm_lapic *apic, int lvt_type) in apic_lvt_enabled() argument
544 return !(kvm_lapic_get_reg(apic, lvt_type) & APIC_LVT_MASKED); in apic_lvt_enabled()
547 static inline int apic_lvtt_oneshot(struct kvm_lapic *apic) in apic_lvtt_oneshot() argument
549 return apic->lapic_timer.timer_mode == APIC_LVT_TIMER_ONESHOT; in apic_lvtt_oneshot()
552 static inline int apic_lvtt_period(struct kvm_lapic *apic) in apic_lvtt_period() argument
554 return apic->lapic_timer.timer_mode == APIC_LVT_TIMER_PERIODIC; in apic_lvtt_period()
557 static inline int apic_lvtt_tscdeadline(struct kvm_lapic *apic) in apic_lvtt_tscdeadline() argument
559 return apic->lapic_timer.timer_mode == APIC_LVT_TIMER_TSCDEADLINE; in apic_lvtt_tscdeadline()
567 static inline bool kvm_lapic_lvt_supported(struct kvm_lapic *apic, int lvt_index) in kvm_lapic_lvt_supported() argument
569 return apic->nr_lvt_entries > lvt_index; in kvm_lapic_lvt_supported()
579 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_version() local
585 v = APIC_VERSION | ((apic->nr_lvt_entries - 1) << 16); in kvm_apic_set_version()
597 kvm_lapic_set_reg(apic, APIC_LVR, v); in kvm_apic_set_version()
603 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_after_set_mcg_cap() local
606 if (!lapic_in_kernel(vcpu) || nr_lvt_entries == apic->nr_lvt_entries) in kvm_apic_after_set_mcg_cap()
610 for (i = apic->nr_lvt_entries; i < nr_lvt_entries; i++) in kvm_apic_after_set_mcg_cap()
611 kvm_lapic_set_reg(apic, APIC_LVTx(i), APIC_LVT_MASKED); in kvm_apic_after_set_mcg_cap()
613 apic->nr_lvt_entries = nr_lvt_entries; in kvm_apic_after_set_mcg_cap()
696 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_update_irr() local
697 bool irr_updated = __kvm_apic_update_irr(pir, apic->regs, max_irr); in kvm_apic_update_irr()
699 if (unlikely(!apic->apicv_active && irr_updated)) in kvm_apic_update_irr()
700 apic->irr_pending = true; in kvm_apic_update_irr()
705 static inline int apic_search_irr(struct kvm_lapic *apic) in apic_search_irr() argument
707 return find_highest_vector(apic->regs + APIC_IRR); in apic_search_irr()
710 static inline int apic_find_highest_irr(struct kvm_lapic *apic) in apic_find_highest_irr() argument
718 if (!apic->irr_pending) in apic_find_highest_irr()
721 result = apic_search_irr(apic); in apic_find_highest_irr()
727 static inline void apic_clear_irr(int vec, struct kvm_lapic *apic) in apic_clear_irr() argument
729 if (unlikely(apic->apicv_active)) { in apic_clear_irr()
730 kvm_lapic_clear_vector(vec, apic->regs + APIC_IRR); in apic_clear_irr()
732 apic->irr_pending = false; in apic_clear_irr()
733 kvm_lapic_clear_vector(vec, apic->regs + APIC_IRR); in apic_clear_irr()
734 if (apic_search_irr(apic) != -1) in apic_clear_irr()
735 apic->irr_pending = true; in apic_clear_irr()
741 apic_clear_irr(vec, vcpu->arch.apic); in kvm_apic_clear_irr()
745 static inline void apic_set_isr(int vec, struct kvm_lapic *apic) in apic_set_isr() argument
747 if (__apic_test_and_set_vector(vec, apic->regs + APIC_ISR)) in apic_set_isr()
751 * With APIC virtualization enabled, all caching is disabled in apic_set_isr()
755 if (unlikely(apic->apicv_active)) in apic_set_isr()
756 kvm_x86_call(hwapic_isr_update)(apic->vcpu, vec); in apic_set_isr()
758 ++apic->isr_count; in apic_set_isr()
759 BUG_ON(apic->isr_count > MAX_APIC_VECTOR); in apic_set_isr()
765 apic->highest_isr_cache = vec; in apic_set_isr()
769 static inline int apic_find_highest_isr(struct kvm_lapic *apic) in apic_find_highest_isr() argument
775 * is always -1, with APIC virtualization enabled. in apic_find_highest_isr()
777 if (!apic->isr_count) in apic_find_highest_isr()
779 if (likely(apic->highest_isr_cache != -1)) in apic_find_highest_isr()
780 return apic->highest_isr_cache; in apic_find_highest_isr()
782 result = find_highest_vector(apic->regs + APIC_ISR); in apic_find_highest_isr()
788 static inline void apic_clear_isr(int vec, struct kvm_lapic *apic) in apic_clear_isr() argument
790 if (!__apic_test_and_clear_vector(vec, apic->regs + APIC_ISR)) in apic_clear_isr()
794 * We do get here for APIC virtualization enabled if the guest in apic_clear_isr()
795 * uses the Hyper-V APIC enlightenment. In this case we may need in apic_clear_isr()
800 if (unlikely(apic->apicv_active)) in apic_clear_isr()
801 kvm_x86_call(hwapic_isr_update)(apic->vcpu, apic_find_highest_isr(apic)); in apic_clear_isr()
803 --apic->isr_count; in apic_clear_isr()
804 BUG_ON(apic->isr_count < 0); in apic_clear_isr()
805 apic->highest_isr_cache = -1; in apic_clear_isr()
811 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_update_hwapic_isr() local
813 if (WARN_ON_ONCE(!lapic_in_kernel(vcpu)) || !apic->apicv_active) in kvm_apic_update_hwapic_isr()
816 kvm_x86_call(hwapic_isr_update)(vcpu, apic_find_highest_isr(apic)); in kvm_apic_update_hwapic_isr()
827 return apic_find_highest_irr(vcpu->arch.apic); in kvm_lapic_find_highest_irr()
831 static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
838 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_irq() local
840 return __apic_accept_irq(apic, irq->delivery_mode, irq->vector, in kvm_apic_set_irq()
944 static int apic_has_interrupt_for_ppr(struct kvm_lapic *apic, u32 ppr) in apic_has_interrupt_for_ppr() argument
948 highest_irr = kvm_x86_call(sync_pir_to_irr)(apic->vcpu); in apic_has_interrupt_for_ppr()
950 highest_irr = apic_find_highest_irr(apic); in apic_has_interrupt_for_ppr()
956 static bool __apic_update_ppr(struct kvm_lapic *apic, u32 *new_ppr) in __apic_update_ppr() argument
961 old_ppr = kvm_lapic_get_reg(apic, APIC_PROCPRI); in __apic_update_ppr()
962 tpr = kvm_lapic_get_reg(apic, APIC_TASKPRI); in __apic_update_ppr()
963 isr = apic_find_highest_isr(apic); in __apic_update_ppr()
973 kvm_lapic_set_reg(apic, APIC_PROCPRI, ppr); in __apic_update_ppr()
978 static void apic_update_ppr(struct kvm_lapic *apic) in apic_update_ppr() argument
982 if (__apic_update_ppr(apic, &ppr) && in apic_update_ppr()
983 apic_has_interrupt_for_ppr(apic, ppr) != -1) in apic_update_ppr()
984 kvm_make_request(KVM_REQ_EVENT, apic->vcpu); in apic_update_ppr()
989 apic_update_ppr(vcpu->arch.apic); in kvm_apic_update_ppr()
993 static void apic_set_tpr(struct kvm_lapic *apic, u32 tpr) in apic_set_tpr() argument
995 kvm_lapic_set_reg(apic, APIC_TASKPRI, tpr); in apic_set_tpr()
996 apic_update_ppr(apic); in apic_set_tpr()
999 static bool kvm_apic_broadcast(struct kvm_lapic *apic, u32 mda) in kvm_apic_broadcast() argument
1001 return mda == (apic_x2apic_mode(apic) ? in kvm_apic_broadcast()
1005 static bool kvm_apic_match_physical_addr(struct kvm_lapic *apic, u32 mda) in kvm_apic_match_physical_addr() argument
1007 if (kvm_apic_broadcast(apic, mda)) in kvm_apic_match_physical_addr()
1012 * were in x2APIC mode if the target APIC ID can't be encoded as an in kvm_apic_match_physical_addr()
1014 * start in xAPIC mode) with an APIC ID that is unaddressable in xAPIC in kvm_apic_match_physical_addr()
1015 * mode. Match the x2APIC ID if and only if the target APIC ID can't in kvm_apic_match_physical_addr()
1019 if (apic_x2apic_mode(apic) || mda > 0xff) in kvm_apic_match_physical_addr()
1020 return mda == kvm_x2apic_id(apic); in kvm_apic_match_physical_addr()
1022 return mda == kvm_xapic_id(apic); in kvm_apic_match_physical_addr()
1025 static bool kvm_apic_match_logical_addr(struct kvm_lapic *apic, u32 mda) in kvm_apic_match_logical_addr() argument
1029 if (kvm_apic_broadcast(apic, mda)) in kvm_apic_match_logical_addr()
1032 logical_id = kvm_lapic_get_reg(apic, APIC_LDR); in kvm_apic_match_logical_addr()
1034 if (apic_x2apic_mode(apic)) in kvm_apic_match_logical_addr()
1040 switch (kvm_lapic_get_reg(apic, APIC_DFR)) { in kvm_apic_match_logical_addr()
1051 /* The KVM local APIC implementation has two quirks:
1082 struct kvm_lapic *target = vcpu->arch.apic; in kvm_apic_match_dest()
1303 static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode, in __apic_accept_irq() argument
1308 struct kvm_vcpu *vcpu = apic->vcpu; in __apic_accept_irq()
1321 if (unlikely(!apic_enabled(apic))) in __apic_accept_irq()
1331 if (apic_test_vector(vector, apic->regs + APIC_TMR) != !!trig_mode) { in __apic_accept_irq()
1334 apic->regs + APIC_TMR); in __apic_accept_irq()
1337 apic->regs + APIC_TMR); in __apic_accept_irq()
1340 kvm_x86_call(deliver_interrupt)(apic, delivery_mode, in __apic_accept_irq()
1368 apic->pending_events = (1UL << KVM_APIC_INIT); in __apic_accept_irq()
1376 apic->sipi_vector = vector; in __apic_accept_irq()
1379 set_bit(KVM_APIC_SIPI, &apic->pending_events); in __apic_accept_irq()
1449 static bool kvm_ioapic_handles_vector(struct kvm_lapic *apic, int vector) in kvm_ioapic_handles_vector() argument
1451 return test_bit(vector, apic->vcpu->arch.ioapic_handled_vectors); in kvm_ioapic_handles_vector()
1454 static void kvm_ioapic_send_eoi(struct kvm_lapic *apic, int vector) in kvm_ioapic_send_eoi() argument
1459 if (!kvm_ioapic_handles_vector(apic, vector)) in kvm_ioapic_send_eoi()
1463 if (irqchip_split(apic->vcpu->kvm)) { in kvm_ioapic_send_eoi()
1464 apic->vcpu->arch.pending_ioapic_eoi = vector; in kvm_ioapic_send_eoi()
1465 kvm_make_request(KVM_REQ_IOAPIC_EOI_EXIT, apic->vcpu); in kvm_ioapic_send_eoi()
1469 if (apic_test_vector(vector, apic->regs + APIC_TMR)) in kvm_ioapic_send_eoi()
1474 kvm_ioapic_update_eoi(apic->vcpu, vector, trigger_mode); in kvm_ioapic_send_eoi()
1477 static int apic_set_eoi(struct kvm_lapic *apic) in apic_set_eoi() argument
1479 int vector = apic_find_highest_isr(apic); in apic_set_eoi()
1481 trace_kvm_eoi(apic, vector); in apic_set_eoi()
1490 apic_clear_isr(vector, apic); in apic_set_eoi()
1491 apic_update_ppr(apic); in apic_set_eoi()
1493 if (kvm_hv_synic_has_vector(apic->vcpu, vector)) in apic_set_eoi()
1494 kvm_hv_synic_send_eoi(apic->vcpu, vector); in apic_set_eoi()
1496 kvm_ioapic_send_eoi(apic, vector); in apic_set_eoi()
1497 kvm_make_request(KVM_REQ_EVENT, apic->vcpu); in apic_set_eoi()
1507 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_eoi_accelerated() local
1509 trace_kvm_eoi(apic, vector); in kvm_apic_set_eoi_accelerated()
1511 kvm_ioapic_send_eoi(apic, vector); in kvm_apic_set_eoi_accelerated()
1512 kvm_make_request(KVM_REQ_EVENT, apic->vcpu); in kvm_apic_set_eoi_accelerated()
1516 void kvm_apic_send_ipi(struct kvm_lapic *apic, u32 icr_low, u32 icr_high) in kvm_apic_send_ipi() argument
1530 if (apic_x2apic_mode(apic)) in kvm_apic_send_ipi()
1537 kvm_irq_delivery_to_apic(apic->vcpu->kvm, apic, &irq, NULL); in kvm_apic_send_ipi()
1541 static u32 apic_get_tmcct(struct kvm_lapic *apic) in apic_get_tmcct() argument
1546 ASSERT(apic != NULL); in apic_get_tmcct()
1549 if (kvm_lapic_get_reg(apic, APIC_TMICT) == 0 || in apic_get_tmcct()
1550 apic->lapic_timer.period == 0) in apic_get_tmcct()
1554 remaining = ktime_sub(apic->lapic_timer.target_expiration, now); in apic_get_tmcct()
1558 ns = mod_64(ktime_to_ns(remaining), apic->lapic_timer.period); in apic_get_tmcct()
1559 return div64_u64(ns, (apic->vcpu->kvm->arch.apic_bus_cycle_ns * in apic_get_tmcct()
1560 apic->divide_count)); in apic_get_tmcct()
1563 static void __report_tpr_access(struct kvm_lapic *apic, bool write) in __report_tpr_access() argument
1565 struct kvm_vcpu *vcpu = apic->vcpu; in __report_tpr_access()
1573 static inline void report_tpr_access(struct kvm_lapic *apic, bool write) in report_tpr_access() argument
1575 if (apic->vcpu->arch.tpr_access_reporting) in report_tpr_access()
1576 __report_tpr_access(apic, write); in report_tpr_access()
1579 static u32 __apic_read(struct kvm_lapic *apic, unsigned int offset) in __apic_read() argument
1591 if (apic_lvtt_tscdeadline(apic)) in __apic_read()
1594 val = apic_get_tmcct(apic); in __apic_read()
1597 apic_update_ppr(apic); in __apic_read()
1598 val = kvm_lapic_get_reg(apic, offset); in __apic_read()
1601 report_tpr_access(apic, false); in __apic_read()
1604 val = kvm_lapic_get_reg(apic, offset); in __apic_read()
1620 u64 kvm_lapic_readable_reg_mask(struct kvm_lapic *apic) in kvm_lapic_readable_reg_mask() argument
1645 if (kvm_lapic_lvt_supported(apic, LVT_CMCI)) in kvm_lapic_readable_reg_mask()
1649 if (!apic_x2apic_mode(apic)) in kvm_lapic_readable_reg_mask()
1658 static int kvm_lapic_reg_read(struct kvm_lapic *apic, u32 offset, int len, in kvm_lapic_reg_read() argument
1668 WARN_ON_ONCE(apic_x2apic_mode(apic) && offset == APIC_ICR); in kvm_lapic_reg_read()
1674 !(kvm_lapic_readable_reg_mask(apic) & APIC_REG_MASK(offset))) in kvm_lapic_reg_read()
1677 result = __apic_read(apic, offset & ~0xf); in kvm_lapic_reg_read()
1688 printk(KERN_ERR "Local APIC read with len = %x, " in kvm_lapic_reg_read()
1695 static int apic_mmio_in_range(struct kvm_lapic *apic, gpa_t addr) in apic_mmio_in_range() argument
1697 return addr >= apic->base_address && in apic_mmio_in_range()
1698 addr < apic->base_address + LAPIC_MMIO_LENGTH; in apic_mmio_in_range()
1704 struct kvm_lapic *apic = to_lapic(this); in apic_mmio_read() local
1705 u32 offset = address - apic->base_address; in apic_mmio_read()
1707 if (!apic_mmio_in_range(apic, address)) in apic_mmio_read()
1710 if (!kvm_apic_hw_enabled(apic) || apic_x2apic_mode(apic)) { in apic_mmio_read()
1719 kvm_lapic_reg_read(apic, offset, len, data); in apic_mmio_read()
1724 static void update_divide_count(struct kvm_lapic *apic) in update_divide_count() argument
1728 tdcr = kvm_lapic_get_reg(apic, APIC_TDCR); in update_divide_count()
1731 apic->divide_count = 0x1 << (tmp2 & 0x7); in update_divide_count()
1734 static void limit_periodic_timer_frequency(struct kvm_lapic *apic) in limit_periodic_timer_frequency() argument
1741 if (apic_lvtt_period(apic) && apic->lapic_timer.period) { in limit_periodic_timer_frequency()
1744 if (apic->lapic_timer.period < min_period) { in limit_periodic_timer_frequency()
1748 apic->vcpu->vcpu_id, in limit_periodic_timer_frequency()
1749 apic->lapic_timer.period, min_period); in limit_periodic_timer_frequency()
1750 apic->lapic_timer.period = min_period; in limit_periodic_timer_frequency()
1755 static void cancel_hv_timer(struct kvm_lapic *apic);
1757 static void cancel_apic_timer(struct kvm_lapic *apic) in cancel_apic_timer() argument
1759 hrtimer_cancel(&apic->lapic_timer.timer); in cancel_apic_timer()
1761 if (apic->lapic_timer.hv_timer_in_use) in cancel_apic_timer()
1762 cancel_hv_timer(apic); in cancel_apic_timer()
1764 atomic_set(&apic->lapic_timer.pending, 0); in cancel_apic_timer()
1767 static void apic_update_lvtt(struct kvm_lapic *apic) in apic_update_lvtt() argument
1769 u32 timer_mode = kvm_lapic_get_reg(apic, APIC_LVTT) & in apic_update_lvtt()
1770 apic->lapic_timer.timer_mode_mask; in apic_update_lvtt()
1772 if (apic->lapic_timer.timer_mode != timer_mode) { in apic_update_lvtt()
1773 if (apic_lvtt_tscdeadline(apic) != (timer_mode == in apic_update_lvtt()
1775 cancel_apic_timer(apic); in apic_update_lvtt()
1776 kvm_lapic_set_reg(apic, APIC_TMICT, 0); in apic_update_lvtt()
1777 apic->lapic_timer.period = 0; in apic_update_lvtt()
1778 apic->lapic_timer.tscdeadline = 0; in apic_update_lvtt()
1780 apic->lapic_timer.timer_mode = timer_mode; in apic_update_lvtt()
1781 limit_periodic_timer_frequency(apic); in apic_update_lvtt()
1792 struct kvm_lapic *apic = vcpu->arch.apic; in lapic_timer_int_injected() local
1793 u32 reg = kvm_lapic_get_reg(apic, APIC_LVTT); in lapic_timer_int_injected()
1795 if (kvm_apic_hw_enabled(apic)) { in lapic_timer_int_injected()
1797 void *bitmap = apic->regs + APIC_ISR; in lapic_timer_int_injected()
1799 if (apic->apicv_active) in lapic_timer_int_injected()
1800 bitmap = apic->regs + APIC_IRR; in lapic_timer_int_injected()
1810 u64 timer_advance_ns = vcpu->arch.apic->lapic_timer.timer_advance_ns; in __wait_lapic_expire()
1831 struct kvm_lapic *apic = vcpu->arch.apic; in adjust_lapic_timer_advance() local
1832 u32 timer_advance_ns = apic->lapic_timer.timer_advance_ns; in adjust_lapic_timer_advance()
1854 apic->lapic_timer.timer_advance_ns = timer_advance_ns; in adjust_lapic_timer_advance()
1859 struct kvm_lapic *apic = vcpu->arch.apic; in __kvm_wait_lapic_expire() local
1862 tsc_deadline = apic->lapic_timer.expired_tscdeadline; in __kvm_wait_lapic_expire()
1863 apic->lapic_timer.expired_tscdeadline = 0; in __kvm_wait_lapic_expire()
1883 vcpu->arch.apic->lapic_timer.expired_tscdeadline && in kvm_wait_lapic_expire()
1884 vcpu->arch.apic->lapic_timer.timer_advance_ns && in kvm_wait_lapic_expire()
1890 static void kvm_apic_inject_pending_timer_irqs(struct kvm_lapic *apic) in kvm_apic_inject_pending_timer_irqs() argument
1892 struct kvm_timer *ktimer = &apic->lapic_timer; in kvm_apic_inject_pending_timer_irqs()
1894 kvm_apic_local_deliver(apic, APIC_LVTT); in kvm_apic_inject_pending_timer_irqs()
1895 if (apic_lvtt_tscdeadline(apic)) { in kvm_apic_inject_pending_timer_irqs()
1897 } else if (apic_lvtt_oneshot(apic)) { in kvm_apic_inject_pending_timer_irqs()
1903 static void apic_timer_expired(struct kvm_lapic *apic, bool from_timer_fn) in apic_timer_expired() argument
1905 struct kvm_vcpu *vcpu = apic->vcpu; in apic_timer_expired()
1906 struct kvm_timer *ktimer = &apic->lapic_timer; in apic_timer_expired()
1908 if (atomic_read(&apic->lapic_timer.pending)) in apic_timer_expired()
1911 if (apic_lvtt_tscdeadline(apic) || ktimer->hv_timer_in_use) in apic_timer_expired()
1914 if (!from_timer_fn && apic->apicv_active) { in apic_timer_expired()
1916 kvm_apic_inject_pending_timer_irqs(apic); in apic_timer_expired()
1920 if (kvm_use_posted_timer_interrupt(apic->vcpu)) { in apic_timer_expired()
1928 if (vcpu->arch.apic->lapic_timer.expired_tscdeadline && in apic_timer_expired()
1929 vcpu->arch.apic->lapic_timer.timer_advance_ns) in apic_timer_expired()
1931 kvm_apic_inject_pending_timer_irqs(apic); in apic_timer_expired()
1935 atomic_inc(&apic->lapic_timer.pending); in apic_timer_expired()
1941 static void start_sw_tscdeadline(struct kvm_lapic *apic) in start_sw_tscdeadline() argument
1943 struct kvm_timer *ktimer = &apic->lapic_timer; in start_sw_tscdeadline()
1947 struct kvm_vcpu *vcpu = apic->vcpu; in start_sw_tscdeadline()
1964 likely(ns > apic->lapic_timer.timer_advance_ns)) { in start_sw_tscdeadline()
1969 apic_timer_expired(apic, false); in start_sw_tscdeadline()
1974 static inline u64 tmict_to_ns(struct kvm_lapic *apic, u32 tmict) in tmict_to_ns() argument
1976 return (u64)tmict * apic->vcpu->kvm->arch.apic_bus_cycle_ns * in tmict_to_ns()
1977 (u64)apic->divide_count; in tmict_to_ns()
1980 static void update_target_expiration(struct kvm_lapic *apic, uint32_t old_divisor) in update_target_expiration() argument
1985 apic->lapic_timer.period = in update_target_expiration()
1986 tmict_to_ns(apic, kvm_lapic_get_reg(apic, APIC_TMICT)); in update_target_expiration()
1987 limit_periodic_timer_frequency(apic); in update_target_expiration()
1990 remaining = ktime_sub(apic->lapic_timer.target_expiration, now); in update_target_expiration()
1996 apic->divide_count, old_divisor); in update_target_expiration()
1998 apic->lapic_timer.tscdeadline += in update_target_expiration()
1999 nsec_to_cycles(apic->vcpu, ns_remaining_new) - in update_target_expiration()
2000 nsec_to_cycles(apic->vcpu, ns_remaining_old); in update_target_expiration()
2001 apic->lapic_timer.target_expiration = ktime_add_ns(now, ns_remaining_new); in update_target_expiration()
2004 static bool set_target_expiration(struct kvm_lapic *apic, u32 count_reg) in set_target_expiration() argument
2011 apic->lapic_timer.period = in set_target_expiration()
2012 tmict_to_ns(apic, kvm_lapic_get_reg(apic, APIC_TMICT)); in set_target_expiration()
2014 if (!apic->lapic_timer.period) { in set_target_expiration()
2015 apic->lapic_timer.tscdeadline = 0; in set_target_expiration()
2019 limit_periodic_timer_frequency(apic); in set_target_expiration()
2020 deadline = apic->lapic_timer.period; in set_target_expiration()
2022 if (apic_lvtt_period(apic) || apic_lvtt_oneshot(apic)) { in set_target_expiration()
2024 deadline = tmict_to_ns(apic, in set_target_expiration()
2025 kvm_lapic_get_reg(apic, count_reg)); in set_target_expiration()
2027 if (apic_lvtt_period(apic)) in set_target_expiration()
2028 deadline = apic->lapic_timer.period; in set_target_expiration()
2032 else if (unlikely(deadline > apic->lapic_timer.period)) { in set_target_expiration()
2037 apic->vcpu->vcpu_id, in set_target_expiration()
2039 kvm_lapic_get_reg(apic, count_reg), in set_target_expiration()
2040 deadline, apic->lapic_timer.period); in set_target_expiration()
2041 kvm_lapic_set_reg(apic, count_reg, 0); in set_target_expiration()
2042 deadline = apic->lapic_timer.period; in set_target_expiration()
2047 apic->lapic_timer.tscdeadline = kvm_read_l1_tsc(apic->vcpu, tscl) + in set_target_expiration()
2048 nsec_to_cycles(apic->vcpu, deadline); in set_target_expiration()
2049 apic->lapic_timer.target_expiration = ktime_add_ns(now, deadline); in set_target_expiration()
2054 static void advance_periodic_target_expiration(struct kvm_lapic *apic) in advance_periodic_target_expiration() argument
2067 apic->lapic_timer.target_expiration = in advance_periodic_target_expiration()
2068 ktime_add_ns(apic->lapic_timer.target_expiration, in advance_periodic_target_expiration()
2069 apic->lapic_timer.period); in advance_periodic_target_expiration()
2070 delta = ktime_sub(apic->lapic_timer.target_expiration, now); in advance_periodic_target_expiration()
2071 apic->lapic_timer.tscdeadline = kvm_read_l1_tsc(apic->vcpu, tscl) + in advance_periodic_target_expiration()
2072 nsec_to_cycles(apic->vcpu, delta); in advance_periodic_target_expiration()
2075 static void start_sw_period(struct kvm_lapic *apic) in start_sw_period() argument
2077 if (!apic->lapic_timer.period) in start_sw_period()
2081 apic->lapic_timer.target_expiration)) { in start_sw_period()
2082 apic_timer_expired(apic, false); in start_sw_period()
2084 if (apic_lvtt_oneshot(apic)) in start_sw_period()
2087 advance_periodic_target_expiration(apic); in start_sw_period()
2090 hrtimer_start(&apic->lapic_timer.timer, in start_sw_period()
2091 apic->lapic_timer.target_expiration, in start_sw_period()
2100 return vcpu->arch.apic->lapic_timer.hv_timer_in_use; in kvm_lapic_hv_timer_in_use()
2103 static void cancel_hv_timer(struct kvm_lapic *apic) in cancel_hv_timer() argument
2106 WARN_ON(!apic->lapic_timer.hv_timer_in_use); in cancel_hv_timer()
2107 kvm_x86_call(cancel_hv_timer)(apic->vcpu); in cancel_hv_timer()
2108 apic->lapic_timer.hv_timer_in_use = false; in cancel_hv_timer()
2111 static bool start_hv_timer(struct kvm_lapic *apic) in start_hv_timer() argument
2113 struct kvm_timer *ktimer = &apic->lapic_timer; in start_hv_timer()
2114 struct kvm_vcpu *vcpu = apic->vcpu; in start_hv_timer()
2135 if (!apic_lvtt_period(apic)) { in start_hv_timer()
2141 cancel_hv_timer(apic); in start_hv_timer()
2143 apic_timer_expired(apic, false); in start_hv_timer()
2144 cancel_hv_timer(apic); in start_hv_timer()
2153 static void start_sw_timer(struct kvm_lapic *apic) in start_sw_timer() argument
2155 struct kvm_timer *ktimer = &apic->lapic_timer; in start_sw_timer()
2158 if (apic->lapic_timer.hv_timer_in_use) in start_sw_timer()
2159 cancel_hv_timer(apic); in start_sw_timer()
2160 if (!apic_lvtt_period(apic) && atomic_read(&ktimer->pending)) in start_sw_timer()
2163 if (apic_lvtt_period(apic) || apic_lvtt_oneshot(apic)) in start_sw_timer()
2164 start_sw_period(apic); in start_sw_timer()
2165 else if (apic_lvtt_tscdeadline(apic)) in start_sw_timer()
2166 start_sw_tscdeadline(apic); in start_sw_timer()
2167 trace_kvm_hv_timer_state(apic->vcpu->vcpu_id, false); in start_sw_timer()
2170 static void restart_apic_timer(struct kvm_lapic *apic) in restart_apic_timer() argument
2174 if (!apic_lvtt_period(apic) && atomic_read(&apic->lapic_timer.pending)) in restart_apic_timer()
2177 if (!start_hv_timer(apic)) in restart_apic_timer()
2178 start_sw_timer(apic); in restart_apic_timer()
2185 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_expired_hv_timer() local
2189 if (!apic->lapic_timer.hv_timer_in_use) in kvm_lapic_expired_hv_timer()
2192 apic_timer_expired(apic, false); in kvm_lapic_expired_hv_timer()
2193 cancel_hv_timer(apic); in kvm_lapic_expired_hv_timer()
2195 if (apic_lvtt_period(apic) && apic->lapic_timer.period) { in kvm_lapic_expired_hv_timer()
2196 advance_periodic_target_expiration(apic); in kvm_lapic_expired_hv_timer()
2197 restart_apic_timer(apic); in kvm_lapic_expired_hv_timer()
2206 restart_apic_timer(vcpu->arch.apic); in kvm_lapic_switch_to_hv_timer()
2211 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_switch_to_sw_timer() local
2215 if (apic->lapic_timer.hv_timer_in_use) in kvm_lapic_switch_to_sw_timer()
2216 start_sw_timer(apic); in kvm_lapic_switch_to_sw_timer()
2222 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_restart_hv_timer() local
2224 WARN_ON(!apic->lapic_timer.hv_timer_in_use); in kvm_lapic_restart_hv_timer()
2225 restart_apic_timer(apic); in kvm_lapic_restart_hv_timer()
2228 static void __start_apic_timer(struct kvm_lapic *apic, u32 count_reg) in __start_apic_timer() argument
2230 atomic_set(&apic->lapic_timer.pending, 0); in __start_apic_timer()
2232 if ((apic_lvtt_period(apic) || apic_lvtt_oneshot(apic)) in __start_apic_timer()
2233 && !set_target_expiration(apic, count_reg)) in __start_apic_timer()
2236 restart_apic_timer(apic); in __start_apic_timer()
2239 static void start_apic_timer(struct kvm_lapic *apic) in start_apic_timer() argument
2241 __start_apic_timer(apic, APIC_TMICT); in start_apic_timer()
2244 static void apic_manage_nmi_watchdog(struct kvm_lapic *apic, u32 lvt0_val) in apic_manage_nmi_watchdog() argument
2248 if (apic->lvt0_in_nmi_mode != lvt0_in_nmi_mode) { in apic_manage_nmi_watchdog()
2249 apic->lvt0_in_nmi_mode = lvt0_in_nmi_mode; in apic_manage_nmi_watchdog()
2251 atomic_inc(&apic->vcpu->kvm->arch.vapics_in_nmi_mode); in apic_manage_nmi_watchdog()
2253 atomic_dec(&apic->vcpu->kvm->arch.vapics_in_nmi_mode); in apic_manage_nmi_watchdog()
2267 static int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val) in kvm_lapic_reg_write() argument
2274 case APIC_ID: /* Local APIC ID */ in kvm_lapic_reg_write()
2275 if (!apic_x2apic_mode(apic)) { in kvm_lapic_reg_write()
2276 kvm_apic_set_xapic_id(apic, val >> 24); in kvm_lapic_reg_write()
2283 report_tpr_access(apic, true); in kvm_lapic_reg_write()
2284 apic_set_tpr(apic, val & 0xff); in kvm_lapic_reg_write()
2288 apic_set_eoi(apic); in kvm_lapic_reg_write()
2292 if (!apic_x2apic_mode(apic)) in kvm_lapic_reg_write()
2293 kvm_apic_set_ldr(apic, val & APIC_LDR_MASK); in kvm_lapic_reg_write()
2299 if (!apic_x2apic_mode(apic)) in kvm_lapic_reg_write()
2300 kvm_apic_set_dfr(apic, val | 0x0FFFFFFF); in kvm_lapic_reg_write()
2307 if (kvm_lapic_get_reg(apic, APIC_LVR) & APIC_LVR_DIRECTED_EOI) in kvm_lapic_reg_write()
2309 apic_set_spiv(apic, val & mask); in kvm_lapic_reg_write()
2313 for (i = 0; i < apic->nr_lvt_entries; i++) { in kvm_lapic_reg_write()
2314 kvm_lapic_set_reg(apic, APIC_LVTx(i), in kvm_lapic_reg_write()
2315 kvm_lapic_get_reg(apic, APIC_LVTx(i)) | APIC_LVT_MASKED); in kvm_lapic_reg_write()
2317 apic_update_lvtt(apic); in kvm_lapic_reg_write()
2318 atomic_set(&apic->lapic_timer.pending, 0); in kvm_lapic_reg_write()
2324 WARN_ON_ONCE(apic_x2apic_mode(apic)); in kvm_lapic_reg_write()
2328 kvm_apic_send_ipi(apic, val, kvm_lapic_get_reg(apic, APIC_ICR2)); in kvm_lapic_reg_write()
2329 kvm_lapic_set_reg(apic, APIC_ICR, val); in kvm_lapic_reg_write()
2332 if (apic_x2apic_mode(apic)) in kvm_lapic_reg_write()
2335 kvm_lapic_set_reg(apic, APIC_ICR2, val & 0xff000000); in kvm_lapic_reg_write()
2339 apic_manage_nmi_watchdog(apic, val); in kvm_lapic_reg_write()
2347 if (!kvm_lapic_lvt_supported(apic, index)) { in kvm_lapic_reg_write()
2351 if (!kvm_apic_sw_enabled(apic)) in kvm_lapic_reg_write()
2354 kvm_lapic_set_reg(apic, reg, val); in kvm_lapic_reg_write()
2359 if (!kvm_apic_sw_enabled(apic)) in kvm_lapic_reg_write()
2361 val &= (apic_lvt_mask[LVT_TIMER] | apic->lapic_timer.timer_mode_mask); in kvm_lapic_reg_write()
2362 kvm_lapic_set_reg(apic, APIC_LVTT, val); in kvm_lapic_reg_write()
2363 apic_update_lvtt(apic); in kvm_lapic_reg_write()
2367 if (apic_lvtt_tscdeadline(apic)) in kvm_lapic_reg_write()
2370 cancel_apic_timer(apic); in kvm_lapic_reg_write()
2371 kvm_lapic_set_reg(apic, APIC_TMICT, val); in kvm_lapic_reg_write()
2372 start_apic_timer(apic); in kvm_lapic_reg_write()
2376 uint32_t old_divisor = apic->divide_count; in kvm_lapic_reg_write()
2378 kvm_lapic_set_reg(apic, APIC_TDCR, val & 0xb); in kvm_lapic_reg_write()
2379 update_divide_count(apic); in kvm_lapic_reg_write()
2380 if (apic->divide_count != old_divisor && in kvm_lapic_reg_write()
2381 apic->lapic_timer.period) { in kvm_lapic_reg_write()
2382 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_lapic_reg_write()
2383 update_target_expiration(apic, old_divisor); in kvm_lapic_reg_write()
2384 restart_apic_timer(apic); in kvm_lapic_reg_write()
2389 if (apic_x2apic_mode(apic) && val != 0) in kvm_lapic_reg_write()
2398 if (!apic_x2apic_mode(apic) || (val & ~APIC_VECTOR_MASK)) in kvm_lapic_reg_write()
2401 kvm_apic_send_ipi(apic, APIC_DEST_SELF | val, 0); in kvm_lapic_reg_write()
2409 * Recalculate APIC maps if necessary, e.g. if the software enable bit in kvm_lapic_reg_write()
2410 * was toggled, the APIC ID changed, etc... The maps are marked dirty in kvm_lapic_reg_write()
2413 kvm_recalculate_apic_map(apic->vcpu->kvm); in kvm_lapic_reg_write()
2421 struct kvm_lapic *apic = to_lapic(this); in apic_mmio_write() local
2422 unsigned int offset = address - apic->base_address; in apic_mmio_write()
2425 if (!apic_mmio_in_range(apic, address)) in apic_mmio_write()
2428 if (!kvm_apic_hw_enabled(apic) || apic_x2apic_mode(apic)) { in apic_mmio_write()
2437 * APIC register must be aligned on 128-bits boundary. in apic_mmio_write()
2446 kvm_lapic_reg_write(apic, offset & 0xff0, val); in apic_mmio_write()
2453 kvm_lapic_reg_write(vcpu->arch.apic, APIC_EOI, 0); in kvm_lapic_set_eoi()
2459 int kvm_x2apic_icr_write(struct kvm_lapic *apic, u64 data) in kvm_x2apic_icr_write() argument
2474 kvm_apic_send_ipi(apic, (u32)data, (u32)(data >> 32)); in kvm_x2apic_icr_write()
2476 kvm_lapic_set_reg(apic, APIC_ICR, data); in kvm_x2apic_icr_write()
2477 kvm_lapic_set_reg(apic, APIC_ICR2, data >> 32); in kvm_x2apic_icr_write()
2479 kvm_lapic_set_reg64(apic, APIC_ICR, data); in kvm_x2apic_icr_write()
2485 static u64 kvm_x2apic_icr_read(struct kvm_lapic *apic) in kvm_x2apic_icr_read() argument
2488 return (u64)kvm_lapic_get_reg(apic, APIC_ICR) | in kvm_x2apic_icr_read()
2489 (u64)kvm_lapic_get_reg(apic, APIC_ICR2) << 32; in kvm_x2apic_icr_read()
2491 return kvm_lapic_get_reg64(apic, APIC_ICR); in kvm_x2apic_icr_read()
2494 /* emulate APIC access in a trap manner */
2497 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_write_nodecode() local
2505 * virtual APIC state, but KVM needs to conditionally modify the value in kvm_apic_write_nodecode()
2510 if (apic_x2apic_mode(apic) && offset == APIC_ICR) in kvm_apic_write_nodecode()
2511 WARN_ON_ONCE(kvm_x2apic_icr_write(apic, kvm_x2apic_icr_read(apic))); in kvm_apic_write_nodecode()
2513 kvm_lapic_reg_write(apic, offset, kvm_lapic_get_reg(apic, offset)); in kvm_apic_write_nodecode()
2519 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_free_lapic() local
2521 if (!vcpu->arch.apic) { in kvm_free_lapic()
2526 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_free_lapic()
2531 if (!apic->sw_enabled) in kvm_free_lapic()
2534 if (apic->regs) in kvm_free_lapic()
2535 free_page((unsigned long)apic->regs); in kvm_free_lapic()
2537 kfree(apic); in kvm_free_lapic()
2547 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_get_lapic_tscdeadline_msr() local
2549 if (!kvm_apic_present(vcpu) || !apic_lvtt_tscdeadline(apic)) in kvm_get_lapic_tscdeadline_msr()
2552 return apic->lapic_timer.tscdeadline; in kvm_get_lapic_tscdeadline_msr()
2557 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_set_lapic_tscdeadline_msr() local
2559 if (!kvm_apic_present(vcpu) || !apic_lvtt_tscdeadline(apic)) in kvm_set_lapic_tscdeadline_msr()
2562 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_set_lapic_tscdeadline_msr()
2563 apic->lapic_timer.tscdeadline = data; in kvm_set_lapic_tscdeadline_msr()
2564 start_apic_timer(apic); in kvm_set_lapic_tscdeadline_msr()
2569 apic_set_tpr(vcpu->arch.apic, (cr8 & 0x0f) << 4); in kvm_lapic_set_tpr()
2576 tpr = (u64) kvm_lapic_get_reg(vcpu->arch.apic, APIC_TASKPRI); in kvm_lapic_get_cr8()
2584 struct kvm_lapic *apic = vcpu->arch.apic; in __kvm_apic_set_base() local
2591 if (!apic) in __kvm_apic_set_base()
2597 kvm_apic_set_xapic_id(apic, vcpu->vcpu_id); in __kvm_apic_set_base()
2603 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in __kvm_apic_set_base()
2609 kvm_apic_set_x2apic_id(apic, vcpu->vcpu_id); in __kvm_apic_set_base()
2611 kvm_apic_set_xapic_id(apic, vcpu->vcpu_id); in __kvm_apic_set_base()
2619 apic->base_address = apic->vcpu->arch.apic_base & in __kvm_apic_set_base()
2623 apic->base_address != APIC_DEFAULT_PHYS_BASE) { in __kvm_apic_set_base()
2624 kvm_set_apicv_inhibit(apic->vcpu->kvm, in __kvm_apic_set_base()
2656 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_update_apicv() local
2671 apic->irr_pending = true; in kvm_apic_update_apicv()
2673 if (apic->apicv_active) in kvm_apic_update_apicv()
2674 apic->isr_count = 1; in kvm_apic_update_apicv()
2676 apic->isr_count = count_vectors(apic->regs + APIC_ISR); in kvm_apic_update_apicv()
2678 apic->highest_isr_cache = -1; in kvm_apic_update_apicv()
2742 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_reset() local
2755 * optimized APIC map if some other task has dirtied the map. in kvm_lapic_reset()
2757 * all APIC state has been initialized (see below). in kvm_lapic_reset()
2762 if (!apic) in kvm_lapic_reset()
2765 /* Stop the timer in case it's a reset to an active apic */ in kvm_lapic_reset()
2766 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_lapic_reset()
2768 /* The xAPIC ID is set at RESET even if the APIC was already enabled. */ in kvm_lapic_reset()
2770 kvm_apic_set_xapic_id(apic, vcpu->vcpu_id); in kvm_lapic_reset()
2771 kvm_apic_set_version(apic->vcpu); in kvm_lapic_reset()
2773 for (i = 0; i < apic->nr_lvt_entries; i++) in kvm_lapic_reset()
2774 kvm_lapic_set_reg(apic, APIC_LVTx(i), APIC_LVT_MASKED); in kvm_lapic_reset()
2775 apic_update_lvtt(apic); in kvm_lapic_reset()
2778 kvm_lapic_set_reg(apic, APIC_LVT0, in kvm_lapic_reset()
2780 apic_manage_nmi_watchdog(apic, kvm_lapic_get_reg(apic, APIC_LVT0)); in kvm_lapic_reset()
2782 kvm_apic_set_dfr(apic, 0xffffffffU); in kvm_lapic_reset()
2783 apic_set_spiv(apic, 0xff); in kvm_lapic_reset()
2784 kvm_lapic_set_reg(apic, APIC_TASKPRI, 0); in kvm_lapic_reset()
2785 if (!apic_x2apic_mode(apic)) in kvm_lapic_reset()
2786 kvm_apic_set_ldr(apic, 0); in kvm_lapic_reset()
2787 kvm_lapic_set_reg(apic, APIC_ESR, 0); in kvm_lapic_reset()
2788 if (!apic_x2apic_mode(apic)) { in kvm_lapic_reset()
2789 kvm_lapic_set_reg(apic, APIC_ICR, 0); in kvm_lapic_reset()
2790 kvm_lapic_set_reg(apic, APIC_ICR2, 0); in kvm_lapic_reset()
2792 kvm_lapic_set_reg64(apic, APIC_ICR, 0); in kvm_lapic_reset()
2794 kvm_lapic_set_reg(apic, APIC_TDCR, 0); in kvm_lapic_reset()
2795 kvm_lapic_set_reg(apic, APIC_TMICT, 0); in kvm_lapic_reset()
2797 kvm_lapic_set_reg(apic, APIC_IRR + 0x10 * i, 0); in kvm_lapic_reset()
2798 kvm_lapic_set_reg(apic, APIC_ISR + 0x10 * i, 0); in kvm_lapic_reset()
2799 kvm_lapic_set_reg(apic, APIC_TMR + 0x10 * i, 0); in kvm_lapic_reset()
2802 update_divide_count(apic); in kvm_lapic_reset()
2803 atomic_set(&apic->lapic_timer.pending, 0); in kvm_lapic_reset()
2806 apic_update_ppr(apic); in kvm_lapic_reset()
2807 if (apic->apicv_active) { in kvm_lapic_reset()
2824 static bool lapic_is_periodic(struct kvm_lapic *apic) in lapic_is_periodic() argument
2826 return apic_lvtt_period(apic); in lapic_is_periodic()
2831 struct kvm_lapic *apic = vcpu->arch.apic; in apic_has_pending_timer() local
2833 if (apic_enabled(apic) && apic_lvt_enabled(apic, APIC_LVTT)) in apic_has_pending_timer()
2834 return atomic_read(&apic->lapic_timer.pending); in apic_has_pending_timer()
2839 int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type) in kvm_apic_local_deliver() argument
2841 u32 reg = kvm_lapic_get_reg(apic, lvt_type); in kvm_apic_local_deliver()
2845 if (kvm_apic_hw_enabled(apic) && !(reg & APIC_LVT_MASKED)) { in kvm_apic_local_deliver()
2850 r = __apic_accept_irq(apic, mode, vector, 1, trig_mode, NULL); in kvm_apic_local_deliver()
2852 guest_cpuid_is_intel_compatible(apic->vcpu)) in kvm_apic_local_deliver()
2853 kvm_lapic_set_reg(apic, APIC_LVTPC, reg | APIC_LVT_MASKED); in kvm_apic_local_deliver()
2861 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_nmi_wd_deliver() local
2863 if (apic) in kvm_apic_nmi_wd_deliver()
2864 kvm_apic_local_deliver(apic, APIC_LVT0); in kvm_apic_nmi_wd_deliver()
2875 struct kvm_lapic *apic = container_of(ktimer, struct kvm_lapic, lapic_timer); in apic_timer_fn() local
2877 apic_timer_expired(apic, true); in apic_timer_fn()
2879 if (lapic_is_periodic(apic)) { in apic_timer_fn()
2880 advance_periodic_target_expiration(apic); in apic_timer_fn()
2889 struct kvm_lapic *apic; in kvm_create_lapic() local
2898 apic = kzalloc(sizeof(*apic), GFP_KERNEL_ACCOUNT); in kvm_create_lapic()
2899 if (!apic) in kvm_create_lapic()
2902 vcpu->arch.apic = apic; in kvm_create_lapic()
2905 apic->regs = kvm_x86_call(alloc_apic_backing_page)(vcpu); in kvm_create_lapic()
2907 apic->regs = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); in kvm_create_lapic()
2908 if (!apic->regs) { in kvm_create_lapic()
2909 printk(KERN_ERR "malloc apic regs error for vcpu %x\n", in kvm_create_lapic()
2913 apic->vcpu = vcpu; in kvm_create_lapic()
2915 apic->nr_lvt_entries = kvm_apic_calc_nr_lvt_entries(vcpu); in kvm_create_lapic()
2917 hrtimer_setup(&apic->lapic_timer.timer, apic_timer_fn, CLOCK_MONOTONIC, in kvm_create_lapic()
2920 apic->lapic_timer.timer_advance_ns = LAPIC_TIMER_ADVANCE_NS_INIT; in kvm_create_lapic()
2923 * Stuff the APIC ENABLE bit in lieu of temporarily incrementing in kvm_create_lapic()
2928 kvm_iodevice_init(&apic->dev, &apic_mmio_ops); in kvm_create_lapic()
2941 apic->apicv_active = true; in kvm_create_lapic()
2947 kfree(apic); in kvm_create_lapic()
2948 vcpu->arch.apic = NULL; in kvm_create_lapic()
2955 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_has_interrupt() local
2961 __apic_update_ppr(apic, &ppr); in kvm_apic_has_interrupt()
2962 return apic_has_interrupt_for_ppr(apic, ppr); in kvm_apic_has_interrupt()
2968 u32 lvt0 = kvm_lapic_get_reg(vcpu->arch.apic, APIC_LVT0); in kvm_apic_accept_pic_intr()
2970 if (!kvm_apic_hw_enabled(vcpu->arch.apic)) in kvm_apic_accept_pic_intr()
2980 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_inject_apic_timer_irqs() local
2982 if (atomic_read(&apic->lapic_timer.pending) > 0) { in kvm_inject_apic_timer_irqs()
2983 kvm_apic_inject_pending_timer_irqs(apic); in kvm_inject_apic_timer_irqs()
2984 atomic_set(&apic->lapic_timer.pending, 0); in kvm_inject_apic_timer_irqs()
2990 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_ack_interrupt() local
2993 if (WARN_ON_ONCE(vector < 0 || !apic)) in kvm_apic_ack_interrupt()
2997 * We get here even with APIC virtualization enabled, if doing in kvm_apic_ack_interrupt()
3003 apic_clear_irr(vector, apic); in kvm_apic_ack_interrupt()
3010 apic_update_ppr(apic); in kvm_apic_ack_interrupt()
3018 apic_set_isr(vector, apic); in kvm_apic_ack_interrupt()
3019 __apic_update_ppr(apic, &ppr); in kvm_apic_ack_interrupt()
3028 if (apic_x2apic_mode(vcpu->arch.apic)) { in kvm_apic_state_fixup()
3029 u32 x2apic_id = kvm_x2apic_id(vcpu->arch.apic); in kvm_apic_state_fixup()
3039 * Ignore the userspace value when setting APIC state. in kvm_apic_state_fixup()
3079 memcpy(s->regs, vcpu->arch.apic->regs, sizeof(*s)); in kvm_apic_get_state()
3086 __apic_read(vcpu->arch.apic, APIC_TMCCT)); in kvm_apic_get_state()
3093 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_state() local
3099 apic_set_spiv(apic, *((u32 *)(s->regs + APIC_SPIV))); in kvm_apic_set_state()
3106 memcpy(vcpu->arch.apic->regs, s->regs, sizeof(*s)); in kvm_apic_set_state()
3108 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_state()
3112 apic_update_ppr(apic); in kvm_apic_set_state()
3113 cancel_apic_timer(apic); in kvm_apic_set_state()
3114 apic->lapic_timer.expired_tscdeadline = 0; in kvm_apic_set_state()
3115 apic_update_lvtt(apic); in kvm_apic_set_state()
3116 apic_manage_nmi_watchdog(apic, kvm_lapic_get_reg(apic, APIC_LVT0)); in kvm_apic_set_state()
3117 update_divide_count(apic); in kvm_apic_set_state()
3118 __start_apic_timer(apic, APIC_TMCCT); in kvm_apic_set_state()
3119 kvm_lapic_set_reg(apic, APIC_TMCCT, 0); in kvm_apic_set_state()
3121 if (apic->apicv_active) { in kvm_apic_set_state()
3123 kvm_x86_call(hwapic_isr_update)(vcpu, apic_find_highest_isr(apic)); in kvm_apic_set_state()
3142 timer = &vcpu->arch.apic->lapic_timer.timer; in __kvm_migrate_apic_timer()
3155 struct kvm_lapic *apic) in apic_sync_pv_eoi_from_guest() argument
3173 vector = apic_set_eoi(apic); in apic_sync_pv_eoi_from_guest()
3174 trace_kvm_pv_eoi(apic, vector); in apic_sync_pv_eoi_from_guest()
3182 apic_sync_pv_eoi_from_guest(vcpu, vcpu->arch.apic); in kvm_lapic_sync_from_vapic()
3187 if (kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apic->vapic_cache, &data, in kvm_lapic_sync_from_vapic()
3191 apic_set_tpr(vcpu->arch.apic, data & 0xff); in kvm_lapic_sync_from_vapic()
3201 struct kvm_lapic *apic) in apic_sync_pv_eoi_to_guest() argument
3205 apic->irr_pending || in apic_sync_pv_eoi_to_guest()
3207 apic->highest_isr_cache == -1 || in apic_sync_pv_eoi_to_guest()
3209 kvm_ioapic_handles_vector(apic, apic->highest_isr_cache)) { in apic_sync_pv_eoi_to_guest()
3217 pv_eoi_set_pending(apic->vcpu); in apic_sync_pv_eoi_to_guest()
3224 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_sync_to_vapic() local
3226 apic_sync_pv_eoi_to_guest(vcpu, apic); in kvm_lapic_sync_to_vapic()
3231 tpr = kvm_lapic_get_reg(apic, APIC_TASKPRI) & 0xff; in kvm_lapic_sync_to_vapic()
3232 max_irr = apic_find_highest_irr(apic); in kvm_lapic_sync_to_vapic()
3235 max_isr = apic_find_highest_isr(apic); in kvm_lapic_sync_to_vapic()
3240 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apic->vapic_cache, &data, in kvm_lapic_sync_to_vapic()
3248 &vcpu->arch.apic->vapic_cache, in kvm_lapic_set_vapic_addr()
3256 vcpu->arch.apic->vapic_addr = vapic_addr; in kvm_lapic_set_vapic_addr()
3260 static int kvm_lapic_msr_read(struct kvm_lapic *apic, u32 reg, u64 *data) in kvm_lapic_msr_read() argument
3265 *data = kvm_x2apic_icr_read(apic); in kvm_lapic_msr_read()
3269 if (kvm_lapic_reg_read(apic, reg, 4, &low)) in kvm_lapic_msr_read()
3277 static int kvm_lapic_msr_write(struct kvm_lapic *apic, u32 reg, u64 data) in kvm_lapic_msr_write() argument
3285 return kvm_x2apic_icr_write(apic, data); in kvm_lapic_msr_write()
3291 return kvm_lapic_reg_write(apic, reg, (u32)data); in kvm_lapic_msr_write()
3296 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_x2apic_msr_write() local
3299 if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(apic)) in kvm_x2apic_msr_write()
3302 return kvm_lapic_msr_write(apic, reg, data); in kvm_x2apic_msr_write()
3307 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_x2apic_msr_read() local
3310 if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(apic)) in kvm_x2apic_msr_read()
3313 return kvm_lapic_msr_read(apic, reg, data); in kvm_x2apic_msr_read()
3321 return kvm_lapic_msr_write(vcpu->arch.apic, reg, data); in kvm_hv_vapic_msr_write()
3329 return kvm_lapic_msr_read(vcpu->arch.apic, reg, data); in kvm_hv_vapic_msr_read()
3360 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_accept_events() local
3385 clear_bit(KVM_APIC_SIPI, &apic->pending_events); in kvm_apic_accept_events()
3389 if (test_and_clear_bit(KVM_APIC_INIT, &apic->pending_events)) { in kvm_apic_accept_events()
3391 if (kvm_vcpu_is_bsp(apic->vcpu)) in kvm_apic_accept_events()
3396 if (test_and_clear_bit(KVM_APIC_SIPI, &apic->pending_events)) { in kvm_apic_accept_events()
3400 sipi_vector = apic->sipi_vector; in kvm_apic_accept_events()