39 /* Host ISA bitmap */
42 /* Per-cpu ISA extensions. */
50  * @isa_bitmap: ISA bitmap to use
53  * NOTE: If isa_bitmap is NULL then Host ISA bitmap will be used.
65  * @isa_bitmap: ISA bitmap to use
69  * NOTE: If isa_bitmap is NULL then Host ISA bitmap will be used.
95 		pr_err("Zicbom detected in ISA string, disabling as no cbom-block-size found\n");  in riscv_ext_zicbom_validate()
111 		pr_err("Zicboz detected in ISA string, disabling as no cboz-block-size found\n");  in riscv_ext_zicboz_validate()
372  * privileged ISA, the existence of the CSRs is implied by any extension which
373  * specifies [ms]envcfg bit(s). Hence, we define a custom ISA extension for the
396  * The canonical order of ISA extension names in the ISA string is defined in
400  * isa_ext_arr defines the order of the ISA string in /proc/cpuinfo.
552  * "Resolve" a source ISA bitmap into one that matches kernel configuration as
571 			pr_err("Failed to reach a stable ISA state\n");  in riscv_resolve_isa()
591 			/* No need to keep it in source isa now that it is enabled */  in riscv_resolve_isa()
614 static void __init riscv_parse_isa_string(const char *isa, unsigned long *bitmap)  in riscv_parse_isa_string()  argument
622 	isa += 4;  in riscv_parse_isa_string()
624 	while (*isa) {  in riscv_parse_isa_string()
625 		const char *ext = isa++;  in riscv_parse_isa_string()
626 		const char *ext_end = isa;  in riscv_parse_isa_string()
633 				pr_warn_once("Vendor extensions are ignored in riscv,isa. Use riscv,isa-extensions instead.");  in riscv_parse_isa_string()
641 			for (; *isa && *isa != '_'; ++isa)  in riscv_parse_isa_string()
649 			 * not valid ISA extensions. It works unless the first  in riscv_parse_isa_string()
650 			 * multi-letter extension in the ISA string begins with  in riscv_parse_isa_string()
654 				++isa;  in riscv_parse_isa_string()
680 			for (; *isa && *isa != '_'; ++isa)  in riscv_parse_isa_string()
681 				if (unlikely(!isalnum(*isa)))  in riscv_parse_isa_string()
684 			ext_end = isa;  in riscv_parse_isa_string()
710 			 * ensure that, when isa was incremented at the start of the loop,  in riscv_parse_isa_string()
728 			if (!isdigit(*isa))  in riscv_parse_isa_string()
731 			while (isdigit(*++isa))  in riscv_parse_isa_string()
734 			if (tolower(*isa) != 'p')  in riscv_parse_isa_string()
737 			if (!isdigit(*++isa)) {  in riscv_parse_isa_string()
738 				--isa;  in riscv_parse_isa_string()
742 			while (isdigit(*++isa))  in riscv_parse_isa_string()
749 		 * The parser expects that at the start of an iteration isa points to the  in riscv_parse_isa_string()
754 		if (*isa == '_')  in riscv_parse_isa_string()
755 			++isa;  in riscv_parse_isa_string()
767 	const char *isa;  in riscv_fill_hwcap_from_isa_string()  local
796 			rc = of_property_read_string(node, "riscv,isa", &isa);  in riscv_fill_hwcap_from_isa_string()
799 				pr_warn("Unable to find \"riscv,isa\" devicetree entry\n");  in riscv_fill_hwcap_from_isa_string()
803 			rc = acpi_get_riscv_isa(rhct, cpu, &isa);  in riscv_fill_hwcap_from_isa_string()
805 				pr_warn("Unable to get ISA for the hart - %d\n", cpu);  in riscv_fill_hwcap_from_isa_string()
810 		riscv_parse_isa_string(isa, source_isa);  in riscv_fill_hwcap_from_isa_string()
813 		 * These ones were as they were part of the base ISA when the  in riscv_fill_hwcap_from_isa_string()
815 		 * unconditionally where `i` is in riscv,isa on DT systems.  in riscv_fill_hwcap_from_isa_string()
825 		 * "V" in ISA strings is ambiguous in practice: it should mean  in riscv_fill_hwcap_from_isa_string()
837 		riscv_resolve_isa(source_isa, isainfo->isa, &this_hwcap, isa2hwcap);  in riscv_fill_hwcap_from_isa_string()
840 		 * All "okay" hart should have same isa. Set HWCAP based on  in riscv_fill_hwcap_from_isa_string()
850 			bitmap_copy(riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX);  in riscv_fill_hwcap_from_isa_string()
852 			bitmap_and(riscv_isa, riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX);  in riscv_fill_hwcap_from_isa_string()
871 			if (of_property_match_string(cpu_node, "riscv,isa-extensions",  in riscv_fill_cpu_vendor_ext()
881 					set_bit(ext.subset_ext_ids[k], isavendorinfo->isa);  in riscv_fill_cpu_vendor_ext()
883 			set_bit(ext.id, isavendorinfo->isa);  in riscv_fill_cpu_vendor_ext()
901 			bitmap_copy(ext_list->all_harts_isa_bitmap.isa,  in riscv_fill_vendor_ext_list()
902 				    ext_list->per_hart_isa_bitmap[cpu].isa,  in riscv_fill_vendor_ext_list()
906 			bitmap_and(ext_list->all_harts_isa_bitmap.isa,  in riscv_fill_vendor_ext_list()
907 				   ext_list->all_harts_isa_bitmap.isa,  in riscv_fill_vendor_ext_list()
908 				   ext_list->per_hart_isa_bitmap[cpu].isa,  in riscv_fill_vendor_ext_list()
971 		if (!of_property_present(cpu_node, "riscv,isa-extensions")) {  in riscv_fill_hwcap_from_ext_list()
979 			if (of_property_match_string(cpu_node, "riscv,isa-extensions",  in riscv_fill_hwcap_from_ext_list()
986 		riscv_resolve_isa(source_isa, isainfo->isa, &this_hwcap, isa2hwcap);  in riscv_fill_hwcap_from_ext_list()
992 		 * All "okay" harts should have same isa. Set HWCAP based on  in riscv_fill_hwcap_from_ext_list()
1001 			bitmap_copy(riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX);  in riscv_fill_hwcap_from_ext_list()
1003 			bitmap_and(riscv_isa, riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX);  in riscv_fill_hwcap_from_ext_list()
1057 			pr_info("Falling back to deprecated \"riscv,isa\"\n");  in riscv_fill_hwcap()
1083 	pr_info("riscv: base ISA extensions %s\n", print_str);  in riscv_fill_hwcap()
1193 			WARN(1, "This extension id:%d is not in ISA extension list", id);  in riscv_cpufeature_patch_func()