Lines Matching +full:cpu +full:- +full:core
1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <linux/cpu.h>
19 #include <asm/mips-cps.h>
22 #include <asm/pm-cps.h>
26 #include <asm/smp-cps.h>
78 timeout--; in power_up_other_cluster()
89 static unsigned __init core_vpe_count(unsigned int cluster, unsigned core) in core_vpe_count() argument
91 return min(smp_max_threads, mips_cps_numvps(cluster, core)); in core_vpe_count()
159 0x0, CSEGX_SIZE - 1); in allocate_cps_vecs()
172 end = SZ_4G - 1; in allocate_cps_vecs()
186 return -ENOMEM; in allocate_cps_vecs()
236 /* Use the number of VPEs in cluster 0 core 0 for smp_num_siblings */ in cps_smp_setup()
240 for (v = 0; v < min_t(int, core_vpes, NR_CPUS - nvpes); v++) { in cps_smp_setup()
253 /* Indicate present CPUs (CPU being synonymous with VPE) */ in cps_smp_setup()
264 /* Initialise core 0 */ in cps_smp_setup()
267 /* Make core 0 coherent with everything */ in cps_smp_setup()
277 /* If we have an FPU, enroll ourselves in the FPU-full mask */ in cps_smp_setup()
293 pr_err("core_entry address unsuitable, disabling smp-cps\n"); in cps_prepare_cpus()
297 /* Detect whether the CCA is unsuited to multi-core SMP */ in cps_prepare_cpus()
302 /* The CCA is coherent, multi-core is fine */ in cps_prepare_cpus()
307 /* CCA is not coherent, multi-core is not usable */ in cps_prepare_cpus()
311 /* Warn the user if the CCA prevents multi-core */ in cps_prepare_cpus()
323 pr_warn("Using only one core due to %s%s%s\n", in cps_prepare_cpus()
342 /* Allocate core boot configuration structs */ in cps_prepare_cpus()
367 /* Mark this CPU as powered up & booted */ in cps_prepare_cpus()
371 core_bootcfg = &cluster_bootcfg->core_config[c]; in cps_prepare_cpus()
372 bitmap_set(cluster_bootcfg->core_power, cpu_core(¤t_cpu_data), 1); in cps_prepare_cpus()
373 atomic_set(&core_bootcfg->vpe_mask, 1 << cpu_vpe_id(¤t_cpu_data)); in cps_prepare_cpus()
383 core_bootcfg = &cluster_bootcfg->core_config[c]; in cps_prepare_cpus()
384 kfree(core_bootcfg->vpe_config); in cps_prepare_cpus()
455 static void boot_core(unsigned int cluster, unsigned int core, in boot_core() argument
466 bitmap_empty(cluster_cfg->core_power, ncores)) { in boot_core()
469 mips_cm_lock_other(cluster, core, 0, in boot_core()
494 mips_cm_lock_other(cluster, core, 0, in boot_core()
497 /* Ensure the core can access the GCRs */ in boot_core()
499 access |= BIT(core); in boot_core()
504 /* Ensure the core can access the GCRs */ in boot_core()
506 access |= BIT(core); in boot_core()
510 /* Select the appropriate core */ in boot_core()
511 mips_cm_lock_other(cluster, core, 0, CM_GCR_Cx_OTHER_BLOCK_LOCAL); in boot_core()
525 /* Ensure the core can access the GCRs */ in boot_core()
527 set_gcr_access(1 << core); in boot_core()
529 set_gcr_access_cm3(1 << core); in boot_core()
532 /* Reset the core */ in boot_core()
533 mips_cpc_lock_other(core); in boot_core()
542 * core leaves reset. in boot_core()
555 /* U6 == coherent execution, ie. the core is up */ in boot_core()
561 timeout--; in boot_core()
566 pr_warn("Waiting for core %u to start... STAT_CONF=0x%x\n", in boot_core()
567 core, stat); in boot_core()
573 /* Take the core out of reset */ in boot_core()
579 /* The core is now powered up */ in boot_core()
580 bitmap_set(cluster_cfg->core_power, core, 1); in boot_core()
596 unsigned core = cpu_core(¤t_cpu_data); in remote_vpe_boot() local
599 struct core_boot_config *core_cfg = &cluster_cfg->core_config[core]; in remote_vpe_boot()
604 static int cps_boot_secondary(int cpu, struct task_struct *idle) in cps_boot_secondary() argument
606 unsigned int cluster = cpu_cluster(&cpu_data[cpu]); in cps_boot_secondary()
607 unsigned core = cpu_core(&cpu_data[cpu]); in cps_boot_secondary() local
608 unsigned vpe_id = cpu_vpe_id(&cpu_data[cpu]); in cps_boot_secondary()
611 struct core_boot_config *core_cfg = &cluster_cfg->core_config[core]; in cps_boot_secondary()
612 struct vpe_boot_config *vpe_cfg = &core_cfg->vpe_config[vpe_id]; in cps_boot_secondary()
616 vpe_cfg->pc = (unsigned long)&smp_bootstrap; in cps_boot_secondary()
617 vpe_cfg->sp = __KSTK_TOS(idle); in cps_boot_secondary()
618 vpe_cfg->gp = (unsigned long)task_thread_info(idle); in cps_boot_secondary()
620 atomic_or(1 << cpu_vpe_id(&cpu_data[cpu]), &core_cfg->vpe_mask); in cps_boot_secondary()
624 if (!test_bit(core, cluster_cfg->core_power)) { in cps_boot_secondary()
625 /* Boot a VPE on a powered down core */ in cps_boot_secondary()
626 boot_core(cluster, core, vpe_id); in cps_boot_secondary()
631 mips_cm_lock_other(cluster, core, vpe_id, in cps_boot_secondary()
640 if (!cpus_are_siblings(cpu, smp_processor_id())) { in cps_boot_secondary()
641 /* Boot a VPE on another powered up core */ in cps_boot_secondary()
643 if (!cpus_are_siblings(cpu, remote)) in cps_boot_secondary()
649 pr_crit("No online CPU in core %u to start CPU%d\n", in cps_boot_secondary()
650 core, cpu); in cps_boot_secondary()
657 panic("Failed to call remote CPU\n"); in cps_boot_secondary()
663 /* Boot a VPE on this core */ in cps_boot_secondary()
672 int core = cpu_core(¤t_cpu_data); in cps_init_secondary() local
674 /* Disable MT - we only want to run 1 TC per VPE */ in cps_init_secondary()
689 if (core > 0 && !read_gcr_cl_coherence()) in cps_init_secondary()
690 pr_warn("Core %u is not in coherent domain\n", core); in cps_init_secondary()
705 /* If we have an FPU, enroll ourselves in the FPU-full mask */ in cps_smp_finish()
722 unsigned int cpu, core, vpe_id; in cps_shutdown_this_cpu() local
724 cpu = smp_processor_id(); in cps_shutdown_this_cpu()
725 core = cpu_core(&cpu_data[cpu]); in cps_shutdown_this_cpu()
728 vpe_id = cpu_vpe_id(&cpu_data[cpu]); in cps_shutdown_this_cpu()
730 pr_debug("Halting core %d VP%d\n", core, vpe_id); in cps_shutdown_this_cpu()
743 pr_debug("Gating power to core %d\n", core); in cps_shutdown_this_cpu()
744 /* Power down the core */ in cps_shutdown_this_cpu()
768 unsigned cpu = smp_processor_id(); in cps_cpu_disable() local
773 return -EINVAL; in cps_cpu_disable()
776 core_cfg = &cluster_cfg->core_config[cpu_core(¤t_cpu_data)]; in cps_cpu_disable()
777 atomic_sub(1 << cpu_vpe_id(¤t_cpu_data), &core_cfg->vpe_mask); in cps_cpu_disable()
779 set_cpu_online(cpu, false); in cps_cpu_disable()
791 unsigned int cpu; in play_dead() local
795 cpu = smp_processor_id(); in play_dead()
798 pr_debug("CPU%d going offline\n", cpu); in play_dead()
801 /* Look for another online VPE within the core */ in play_dead()
803 if (!cpus_are_siblings(cpu, cpu_death_sibling)) in play_dead()
807 * There is an online VPE within the core. Just halt in play_dead()
808 * this TC and leave the core alone. in play_dead()
820 panic("Failed to offline CPU %u", cpu); in play_dead()
825 unsigned cpu = (unsigned long)ptr_cpu; in wait_for_sibling_halt() local
826 unsigned vpe_id = cpu_vpe_id(&cpu_data[cpu]); in wait_for_sibling_halt()
838 static void cps_cpu_die(unsigned int cpu) { } in cps_cpu_die() argument
840 static void cps_cleanup_dead_cpu(unsigned cpu) in cps_cleanup_dead_cpu() argument
842 unsigned int cluster = cpu_cluster(&cpu_data[cpu]); in cps_cleanup_dead_cpu()
843 unsigned core = cpu_core(&cpu_data[cpu]); in cps_cleanup_dead_cpu() local
844 unsigned int vpe_id = cpu_vpe_id(&cpu_data[cpu]); in cps_cleanup_dead_cpu()
853 * Now wait for the CPU to actually offline. Without doing this that in cps_cleanup_dead_cpu()
856 * - Onlining the CPU again. in cps_cleanup_dead_cpu()
857 * - Powering down the core if another VPE within it is offlined. in cps_cleanup_dead_cpu()
858 * - A sibling VPE entering a non-coherent state. in cps_cleanup_dead_cpu()
860 * In the non-MT halt case (ie. infinite loop) the CPU is doing nothing in cps_cleanup_dead_cpu()
865 * Wait for the core to enter a powered down or clock gated in cps_cleanup_dead_cpu()
867 * in which case the CPC will refuse to power down the core. in cps_cleanup_dead_cpu()
871 mips_cm_lock_other(0, core, 0, CM_GCR_Cx_OTHER_BLOCK_LOCAL); in cps_cleanup_dead_cpu()
872 mips_cpc_lock_other(core); in cps_cleanup_dead_cpu()
885 * The core ought to have powered down, but didn't & in cps_cleanup_dead_cpu()
892 * the hope that the core is doing nothing harmful & in cps_cleanup_dead_cpu()
896 "CPU%u hasn't powered down, seq. state %u\n", in cps_cleanup_dead_cpu()
897 cpu, stat)) in cps_cleanup_dead_cpu()
901 /* Indicate the core is powered off */ in cps_cleanup_dead_cpu()
902 bitmap_clear(cluster_cfg->core_power, core, 1); in cps_cleanup_dead_cpu()
905 * Have a CPU with access to the offlined CPUs registers wait in cps_cleanup_dead_cpu()
910 (void *)(unsigned long)cpu, 1); in cps_cleanup_dead_cpu()
912 panic("Failed to call remote sibling CPU\n"); in cps_cleanup_dead_cpu()
915 mips_cm_lock_other(0, core, vpe_id, CM_GCR_Cx_OTHER_BLOCK_LOCAL); in cps_cleanup_dead_cpu()
952 return -ENODEV; in register_cps_smp_ops()
955 /* check we have a GIC - we need one for IPIs */ in register_cps_smp_ops()
958 return -ENODEV; in register_cps_smp_ops()