dts/apple/t8010.dtsi

1 // SPDX-License-Identifier: GPL-2.0 OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
16 	interrupt-parent = <&aic>;
17 	#address-cells = <2>;
18 	#size-cells = <2>;
20 	clkref: clock-ref {
21 		compatible = "fixed-clock";
22 		#clock-cells = <0>;
23 		clock-frequency = <24000000>;
24 		clock-output-names = "clkref";
28 		#address-cells = <2>;
29 		#size-cells = <0>;
31 		cpu0: cpu@0 {
32 			compatible = "apple,hurricane-zephyr";
34 			cpu-release-addr = <0 0>; /* To be filled by loader */
35 			operating-points-v2 = <&fusion_opp>;
36 			performance-domains = <&cpufreq>;
37 			enable-method = "spin-table";
38 			device_type = "cpu";
41 		cpu1: cpu@1 {
42 			compatible = "apple,hurricane-zephyr";
44 			cpu-release-addr = <0 0>; /* To be filled by loader */
45 			operating-points-v2 = <&fusion_opp>;
46 			performance-domains = <&cpufreq>;
47 			enable-method = "spin-table";
48 			device_type = "cpu";
52 	fusion_opp: opp-table {
53 		compatible = "operating-points-v2";
57 		 * that use p-state transitions to switch between cores.
60 		 * The E-core frequencies are adjusted so performance scales
65 			opp-hz = /bits/ 64 <172000000>; /* 300 MHz, E-core */
66 			opp-level = <1>;
67 			clock-latency-ns = <11000>;
70 			opp-hz = /bits/ 64 <230000000>; /* 396 MHz, E-core */
71 			opp-level = <2>;
72 			clock-latency-ns = <49000>;
75 			opp-hz = /bits/ 64 <425000000>; /* 732 MHz, E-core */
76 			opp-level = <3>;
77 			clock-latency-ns = <13000>;
80 			opp-hz = /bits/ 64 <637000000>; /* 1092 MHz, E-core */
81 			opp-level = <4>;
82 			clock-latency-ns = <18000>;
85 			opp-hz = /bits/ 64 <756000000>;
86 			opp-level = <5>;
87 			clock-latency-ns = <35000>;
90 			opp-hz = /bits/ 64 <1056000000>;
91 			opp-level = <6>;
92 			clock-latency-ns = <31000>;
95 			opp-hz = /bits/ 64 <1356000000>;
96 			opp-level = <7>;
97 			clock-latency-ns = <37000>;
100 			opp-hz = /bits/ 64 <1644000000>;
101 			opp-level = <8>;
102 			clock-latency-ns = <39500>;
105 			opp-hz = /bits/ 64 <1944000000>;
106 			opp-level = <9>;
107 			clock-latency-ns = <46000>;
111 			opp-hz = /bits/ 64 <2244000000>;
112 			opp-level = <10>;
113 			clock-latency-ns = <56000>;
117 		/* Not available until CPU deep sleep is implemented */
119 			opp-hz = /bits/ 64 <2340000000>;
120 			opp-level = <11>;
121 			clock-latency-ns = <56000>;
122 			turbo-mode;
129 		compatible = "simple-bus";
130 		#address-cells = <2>;
131 		#size-cells = <2>;
132 		nonposted-mmio;
135 		cpufreq: performance-controller@202f20000 {
136 …compatible = "apple,t8010-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
138 			#performance-domain-cells = <0>;
142 			compatible = "apple,s5l-uart";
144 			reg-io-width = <4>;
145 			interrupt-parent = <&aic>;
147 			/* Use the bootloader-enabled clocks for now. */
149 			clock-names = "uart", "clk_uart_baud0";
150 			power-domains = <&ps_uart0>;
154 		pmgr: power-management@20e000000 {
155 			compatible = "apple,t8010-pmgr", "apple,pmgr", "syscon", "simple-mfd";
156 			#address-cells = <1>;
157 			#size-cells = <1>;
162 		aic: interrupt-controller@20e100000 {
163 			compatible = "apple,t8010-aic", "apple,aic";
165 			#interrupt-cells = <3>;
166 			interrupt-controller;
167 			power-domains = <&ps_aic>;
171 			compatible = "apple,t8010-dwi-bl", "apple,dwi-bl";
173 			power-domains = <&ps_dwi>;
178 			compatible = "apple,t8010-pinctrl", "apple,pinctrl";
180 			power-domains = <&ps_gpio>;
182 			gpio-controller;
183 			#gpio-cells = <2>;
184 			gpio-ranges = <&pinctrl_ap 0 0 208>;
187 			interrupt-controller;
188 			#interrupt-cells = <2>;
189 			interrupt-parent = <&aic>;
200 			compatible = "apple,t8010-pinctrl", "apple,pinctrl";
202 			power-domains = <&ps_aop_gpio>;
204 			gpio-controller;
205 			#gpio-cells = <2>;
206 			gpio-ranges = <&pinctrl_aop 0 0 42>;
209 			interrupt-controller;
210 			#interrupt-cells = <2>;
211 			interrupt-parent = <&aic>;
221 		pmgr_mini: power-management@210200000 {
222 			compatible = "apple,t8010-pmgr", "apple,pmgr", "syscon", "simple-mfd";
223 			#address-cells = <1>;
224 			#size-cells = <1>;
230 			compatible = "apple,t8010-wdt", "apple,wdt";
233 			interrupt-parent = <&aic>;
239 		compatible = "arm,armv8-timer";
240 		interrupt-parent = <&aic>;
241 		interrupt-names = "phys", "virt";
248 #include "t8010-pmgr.dtsi"