Lines Matching +full:tx +full:- +full:max +full:- +full:burst +full:- +full:prd
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/snps,dwc3-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Felipe Balbi <balbi@kernel.org>
14 vendor-specific implementation or as a standalone component.
17 - $ref: usb-drd.yaml#
18 - if:
24 - dr_mode
28 $ref: usb-xhci.yaml#
35 usb-phy:
38 - description: USB2/HS PHY
39 - description: USB3/SS PHY
45 phy-names:
49 - items:
50 enum: [ usb2-phy, usb3-phy ]
51 - items:
52 pattern: "^usb(2-([0-9]|1[0-4])|3-[0-3])$"
54 snps,usb2-lpm-disable:
63 snps,usb2-gadget-lpm-disable:
68 snps,reserved-endpoints:
72 $ref: /schemas/types.yaml#/definitions/uint8-array
79 snps,dis-start-transfer-quirk:
81 When set, disable isoc START TRANSFER command failure SW work-around
82 for DWC_usb31 version 1.70a-ea06 and prior.
91 snps,has-lpm-erratum:
95 snps,lpm-nyet-threshold:
133 description: When set core will set Tx de-emphasis value
142 - 0 # -6dB de-emphasis
143 - 1 # -3.5dB de-emphasis
144 - 2 # No de-emphasis
160 snps,dis-u1-entry-quirk:
164 snps,dis-u2-entry-quirk:
173 snps,dis-u2-freeclk-exists-quirk:
176 PHY doesn't provide a free-running PHY clock.
179 snps,dis-del-phy-power-chg-quirk:
184 snps,dis-tx-ipgap-linecheck-quirk:
188 snps,parkmode-disable-ss-quirk:
193 snps,parkmode-disable-hs-quirk:
204 snps,dis-split-quirk:
207 avoid -EPROTO errors with usbhid on some devices (Hikey 970).
210 snps,gfladj-refclk-lpm-sel-quirk:
215 snps,resume-hs-terminations:
222 snps,ulpi-ext-vbus-drv:
230 snps,is-utmi-l1-suspend:
236 snps,hird-threshold:
242 High-Speed PHY interface selection between UTMI+ and ULPI when the
247 snps,quirk-frame-length-adjustment:
249 Value for GFLADJ_30MHZ field of GFLADJ register for post-silicon frame
256 snps,ref-clock-period-ns:
267 snps,rx-thr-num-pkt:
271 start the corresponding USB RX transaction (burst).
274 flow-controlled endpoint. It is only used for SuperSpeed.
281 snps,rx-max-burst:
283 Max USB RX burst size. In host mode, this field specifies the
284 Maximum Bulk IN burst the DWC_usb3 core can perform. When the system
285 bus is slower than the USB, RX FIFO can overrun during a long burst.
286 You can program a smaller value to this field to limit the RX burst
297 snps,tx-thr-num-pkt:
299 USB TX packet threshold count. This field specifies the number of
301 transmission for the corresponding USB transaction (burst).
310 snps,tx-max-burst:
312 Max USB TX burst size. When the system bus is slower than the USB,
313 TX FIFO can underrun during a long burst. Program a smaller value
314 to this field to limit the TX burst size that the core can execute.
323 snps,rx-thr-num-pkt-prd:
326 snps,rx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31
332 snps,rx-max-burst-prd:
334 Max periodic ESS RX burst size (host mode only). Set this and
335 snps,rx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31
341 snps,tx-thr-num-pkt-prd:
343 Periodic ESS TX packet threshold count (host mode only). Set this and
344 snps,tx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31
345 programming guide section 1.2.3) to enable periodic ESS TX threshold.
350 snps,tx-max-burst-prd:
352 Max periodic ESS TX burst size (host mode only). Set this and
353 snps,tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31
354 programming guide section 1.2.3) to enable periodic ESS TX threshold.
359 tx-fifo-resize:
360 description: Determines if the TX fifos can be dynamically resized depending
367 tx-fifo-max-num:
368 description: Specifies the max number of packets the txfifo resizing logic
375 snps,incr-burst-type-adjustment:
377 Value for INCR burst type of GSBUSCFG0 register, undefined length INCR
378 burst type enable and INCRx type. A single value means INCRX burst mode
379 enabled. If more than one value specified, undefined length INCR burst
380 type will be enabled with burst lengths utilized up to the maximum
382 $ref: /schemas/types.yaml#/definitions/uint32-array
389 num-hc-interrupters:
396 This port is used with the 'usb-role-switch' property to connect the
403 controller using the OF graph bindings specified if the "usb-role-switch"
415 wakeup-source:
421 - compatible
422 - reg