bindings/usb/snps%2Cdwc3-common.yaml

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/snps,dwc3-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Felipe Balbi <balbi@kernel.org>
14   vendor-specific implementation or as a standalone component.
17   - $ref: usb-drd.yaml#
18   - if:
24         - dr_mode
28       $ref: usb-xhci.yaml#
35   usb-phy:
38       - description: USB2/HS PHY
39       - description: USB3/SS PHY
45   phy-names:
49       - items:
50           enum: [ usb2-phy, usb3-phy ]
51       - items:
52           pattern: "^usb(2-([0-9]|1[0-4])|3-[0-3])$"
54   snps,usb2-lpm-disable:
63   snps,usb2-gadget-lpm-disable:
68   snps,reserved-endpoints:
72     $ref: /schemas/types.yaml#/definitions/uint8-array
79   snps,dis-start-transfer-quirk:
81       When set, disable isoc START TRANSFER command failure SW work-around
82       for DWC_usb31 version 1.70a-ea06 and prior.
87       True when SW should disable data scrambling. Only really useful for FPGA
91   snps,has-lpm-erratum:
95   snps,lpm-nyet-threshold:
128       when set core will disable a 400us delay to start Polling LFPS after
133     description: When set core will set Tx de-emphasis value
142       - 0 # -6dB de-emphasis
143       - 1 # -3.5dB de-emphasis
144       - 2 # No de-emphasis
147     description: When set core will disable USB3 suspend phy
151     description: When set core will disable USB2 suspend phy
160   snps,dis-u1-entry-quirk:
164   snps,dis-u2-entry-quirk:
170       When set core will disable receiver detection in PHY P3 power state.
173   snps,dis-u2-freeclk-exists-quirk:
176       PHY doesn't provide a free-running PHY clock.
179   snps,dis-del-phy-power-chg-quirk:
184   snps,dis-tx-ipgap-linecheck-quirk:
185     description: When set, disable u2mac linestate check during HS transmit
188   snps,parkmode-disable-ss-quirk:
193   snps,parkmode-disable-hs-quirk:
200       When set, disable metastability workaround. CAUTION! Use only if you are
204   snps,dis-split-quirk:
207       avoid -EPROTO errors with usbhid on some devices (Hikey 970).
210   snps,gfladj-refclk-lpm-sel-quirk:
215   snps,resume-hs-terminations:
222   snps,ulpi-ext-vbus-drv:
230   snps,is-utmi-l1-suspend:
236   snps,hird-threshold:
242       High-Speed PHY interface selection between UTMI+ and ULPI when the
247   snps,quirk-frame-length-adjustment:
249       Value for GFLADJ_30MHZ field of GFLADJ register for post-silicon frame
256   snps,ref-clock-period-ns:
267   snps,rx-thr-num-pkt:
270       the space that must be available in the RX FIFO before the core can
273       available in the RX FIFO before the core can send ERDY for a
274       flow-controlled endpoint. It is only used for SuperSpeed.
281   snps,rx-max-burst:
284       Maximum Bulk IN burst the DWC_usb3 core can perform. When the system
285       bus is slower than the USB, RX FIFO can overrun during a long burst.
286       You can program a smaller value to this field to limit the RX burst
287       size that the core can perform. It only applies to SS Bulk,
297   snps,tx-thr-num-pkt:
300       packets that must be in the TXFIFO before the core can start
310   snps,tx-max-burst:
313       TX FIFO can underrun during a long burst. Program a smaller value
314       to this field to limit the TX burst size that the core can execute.
323   snps,rx-thr-num-pkt-prd:
326       snps,rx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31
332   snps,rx-max-burst-prd:
335       snps,rx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31
341   snps,tx-thr-num-pkt-prd:
344       snps,tx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31
350   snps,tx-max-burst-prd:
353       snps,tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31
359   tx-fifo-resize:
360     description: Determines if the TX fifos can be dynamically resized depending
367   tx-fifo-max-num:
369       can account for when higher endpoint bursting is used. (bMaxBurst > 6) The
375   snps,incr-burst-type-adjustment:
382     $ref: /schemas/types.yaml#/definitions/uint32-array
389   num-hc-interrupters:
396       This port is used with the 'usb-role-switch' property  to connect the
403       controller using the OF graph bindings specified if the "usb-role-switch"
415   wakeup-source:
421   - compatible
422   - reg