Lines Matching +full:tsens +full:- +full:v1
1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 ---
5 $id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: QCOM SoC Temperature Sensor (TSENS)
11 - Amit Kucheria <amitk@kernel.org>
14 QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
16 The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
17 everything before v1 when there was no versioning information.
22 - description: msm8960 TSENS based
24 - enum:
25 - qcom,ipq8064-tsens
26 - qcom,msm8960-tsens
28 - description: v0.1 of TSENS
30 - enum:
31 - qcom,mdm9607-tsens
32 - qcom,msm8226-tsens
33 - qcom,msm8909-tsens
34 - qcom,msm8916-tsens
35 - qcom,msm8939-tsens
36 - qcom,msm8974-tsens
37 - const: qcom,tsens-v0_1
39 - description: v1 of TSENS
41 - enum:
42 - qcom,msm8937-tsens
43 - qcom,msm8956-tsens
44 - qcom,msm8976-tsens
45 - qcom,qcs404-tsens
46 - const: qcom,tsens-v1
48 - description: v2 of TSENS
50 - enum:
51 - qcom,msm8953-tsens
52 - qcom,msm8996-tsens
53 - qcom,msm8998-tsens
54 - qcom,qcm2290-tsens
55 - qcom,sa8255p-tsens
56 - qcom,sa8775p-tsens
57 - qcom,sar2130p-tsens
58 - qcom,sc7180-tsens
59 - qcom,sc7280-tsens
60 - qcom,sc8180x-tsens
61 - qcom,sc8280xp-tsens
62 - qcom,sdm630-tsens
63 - qcom,sdm845-tsens
64 - qcom,sm6115-tsens
65 - qcom,sm6350-tsens
66 - qcom,sm6375-tsens
67 - qcom,sm8150-tsens
68 - qcom,sm8250-tsens
69 - qcom,sm8350-tsens
70 - qcom,sm8450-tsens
71 - qcom,sm8550-tsens
72 - qcom,sm8650-tsens
73 - qcom,x1e80100-tsens
74 - const: qcom,tsens-v2
76 - description: v2 of TSENS with combined interrupt
78 - qcom,ipq5332-tsens
79 - qcom,ipq5424-tsens
80 - qcom,ipq8074-tsens
82 - description: v2 of TSENS with combined interrupt
84 - enum:
85 - qcom,ipq6018-tsens
86 - qcom,ipq9574-tsens
87 - const: qcom,ipq8074-tsens
91 - description: TM registers
92 - description: SROT registers
98 interrupt-names:
102 nvmem-cells:
104 - minItems: 1
108 - minItems: 5
114 - maxItems: 51
119 nvmem-cell-names:
121 - minItems: 1
123 - const: calib
124 - enum:
125 - calib_backup
126 - calib_sel
127 - minItems: 5
129 - const: mode
130 - const: base1
131 - const: base2
132 - pattern: '^s[0-9]+_p1$'
133 - pattern: '^s[0-9]+_p2$'
134 - pattern: '^s[0-9]+_p1$'
135 - pattern: '^s[0-9]+_p2$'
136 - pattern: '^s[0-9]+_p1$'
137 - pattern: '^s[0-9]+_p2$'
138 - pattern: '^s[0-9]+_p1$'
139 - pattern: '^s[0-9]+_p2$'
140 - pattern: '^s[0-9]+_p1$'
141 - pattern: '^s[0-9]+_p2$'
142 - pattern: '^s[0-9]+_p1$'
143 - pattern: '^s[0-9]+_p2$'
144 - pattern: '^s[0-9]+_p1$'
145 - pattern: '^s[0-9]+_p2$'
146 - pattern: '^s[0-9]+_p1$'
147 - pattern: '^s[0-9]+_p2$'
148 - pattern: '^s[0-9]+_p1$'
149 - pattern: '^s[0-9]+_p2$'
150 - pattern: '^s[0-9]+_p1$'
151 - pattern: '^s[0-9]+_p2$'
152 - pattern: '^s[0-9]+_p1$'
153 - pattern: '^s[0-9]+_p2$'
154 - pattern: '^s[0-9]+_p1$'
155 - pattern: '^s[0-9]+_p2$'
156 - pattern: '^s[0-9]+_p1$'
157 - pattern: '^s[0-9]+_p2$'
158 - pattern: '^s[0-9]+_p1$'
159 - pattern: '^s[0-9]+_p2$'
160 - pattern: '^s[0-9]+_p1$'
161 - pattern: '^s[0-9]+_p2$'
162 - pattern: '^s[0-9]+_p1$'
163 - pattern: '^s[0-9]+_p2$'
165 - items:
166 - const: mode
167 - const: base1
168 - const: base2
169 - const: use_backup
170 - const: mode_backup
171 - const: base1_backup
172 - const: base2_backup
173 - const: s0_p1
174 - const: s0_p2
175 - const: s1_p1
176 - const: s1_p2
177 - const: s2_p1
178 - const: s2_p2
179 - const: s3_p1
180 - const: s3_p2
181 - const: s4_p1
182 - const: s4_p2
183 - const: s5_p1
184 - const: s5_p2
185 - const: s6_p1
186 - const: s6_p2
187 - const: s7_p1
188 - const: s7_p2
189 - const: s8_p1
190 - const: s8_p2
191 - const: s9_p1
192 - const: s9_p2
193 - const: s10_p1
194 - const: s10_p2
195 - const: s0_p1_backup
196 - const: s0_p2_backup
197 - const: s1_p1_backup
198 - const: s1_p2_backup
199 - const: s2_p1_backup
200 - const: s2_p2_backup
201 - const: s3_p1_backup
202 - const: s3_p2_backup
203 - const: s4_p1_backup
204 - const: s4_p2_backup
205 - const: s5_p1_backup
206 - const: s5_p2_backup
207 - const: s6_p1_backup
208 - const: s6_p2_backup
209 - const: s7_p1_backup
210 - const: s7_p2_backup
211 - const: s8_p1_backup
212 - const: s8_p2_backup
213 - const: s9_p1_backup
214 - const: s9_p2_backup
215 - const: s10_p1_backup
216 - const: s10_p2_backup
217 - minItems: 8
219 - const: mode
220 - const: base0
221 - const: base1
222 - pattern: '^tsens_sens[0-9]+_off$'
223 - pattern: '^tsens_sens[0-9]+_off$'
224 - pattern: '^tsens_sens[0-9]+_off$'
225 - pattern: '^tsens_sens[0-9]+_off$'
226 - pattern: '^tsens_sens[0-9]+_off$'
227 - pattern: '^tsens_sens[0-9]+_off$'
228 - pattern: '^tsens_sens[0-9]+_off$'
237 "#thermal-sensor-cells":
241 - compatible
242 - interrupts
243 - interrupt-names
244 - "#qcom,sensors"
247 - $ref: thermal-sensor.yaml#
249 - if:
254 - qcom,ipq8064-tsens
255 - qcom,msm8960-tsens
256 - qcom,tsens-v0_1
257 - qcom,tsens-v1
262 - description: Combined interrupt if upper or lower threshold crossed
263 interrupt-names:
265 - const: uplow
267 - if:
271 const: qcom,tsens-v2
276 - description: Combined interrupt if upper or lower threshold crossed
277 - description: Interrupt if critical threshold crossed
278 interrupt-names:
280 - const: uplow
281 - const: critical
283 - if:
288 - qcom,ipq5332-tsens
289 - qcom,ipq5424-tsens
290 - qcom,ipq8074-tsens
295 - description: Combined interrupt if upper, lower or critical thresholds crossed
296 interrupt-names:
298 - const: combined
300 - if:
305 - qcom,ipq5332-tsens
306 - qcom,ipq5424-tsens
307 - qcom,ipq8074-tsens
308 - qcom,tsens-v0_1
309 - qcom,tsens-v1
310 - qcom,tsens-v2
314 - reg
319 - |
320 #include <dt-bindings/interrupt-controller/arm-gic.h>
321 thermal-sensor {
322 compatible = "qcom,ipq8064-tsens";
324 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
325 nvmem-cell-names = "calib", "calib_backup";
327 interrupt-names = "uplow";
330 #thermal-sensor-cells = <1>;
333 - |
334 #include <dt-bindings/interrupt-controller/arm-gic.h>
335 // Example 1 (new calibration data: for pre v1 IP):
336 thermal-sensor@4a9000 {
337 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
341 nvmem-cells = <&tsens_mode>,
348 nvmem-cell-names = "mode",
357 interrupt-names = "uplow";
360 #thermal-sensor-cells = <1>;
363 - |
364 #include <dt-bindings/interrupt-controller/arm-gic.h>
365 // Example 1 (legacy: for pre v1 IP):
366 tsens1: thermal-sensor@4a9000 {
367 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
371 nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
372 nvmem-cell-names = "calib", "calib_sel";
375 interrupt-names = "uplow";
378 #thermal-sensor-cells = <1>;
381 - |
382 #include <dt-bindings/interrupt-controller/arm-gic.h>
383 // Example 2 (for any platform containing v1 of the TSENS IP):
384 tsens2: thermal-sensor@4a9000 {
385 compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
389 nvmem-cells = <&tsens_caldata>;
390 nvmem-cell-names = "calib";
393 interrupt-names = "uplow";
396 #thermal-sensor-cells = <1>;
399 - |
400 #include <dt-bindings/interrupt-controller/arm-gic.h>
401 // Example 3 (for any platform containing v2 of the TSENS IP):
402 tsens3: thermal-sensor@c263000 {
403 compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
409 interrupt-names = "uplow", "critical";
412 #thermal-sensor-cells = <1>;
415 - |
416 #include <dt-bindings/interrupt-controller/arm-gic.h>
417 // Example 4 (for any IPQ8074 based SoC-s):
418 tsens4: thermal-sensor@4a9000 {
419 compatible = "qcom,ipq8074-tsens";
424 interrupt-names = "combined";
427 #thermal-sensor-cells = <1>;