Lines Matching +full:access +full:- +full:controller +full:- +full:names
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/st,stm32mp25-ospi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Patrice Chotard <patrice.chotard@foss.st.com>
13 - $ref: spi-controller.yaml#
17 const: st,stm32mp25-ospi
22 memory-region:
24 Memory region to be used for memory-map read access.
25 In memory-mapped mode, read access are performed from the memory
37 - description: phandle to OSPI block reset
38 - description: phandle to delay block reset
43 dma-names:
45 - const: tx
46 - const: rx
48 st,syscfg-dlyb:
50 $ref: /schemas/types.yaml#/definitions/phandle-array
52 - description: phandle to syscfg
53 - description: register offset within syscfg
55 access-controllers:
56 description: phandle to the rifsc device to check access right
60 - description: phandle to bus controller
61 - description: phandle to clock controller
64 power-domains:
68 - compatible
69 - reg
70 - clocks
71 - interrupts
72 - st,syscfg-dlyb
77 - |
78 #include <dt-bindings/clock/st,stm32mp25-rcc.h>
79 #include <dt-bindings/interrupt-controller/arm-gic.h>
80 #include <dt-bindings/reset/st,stm32mp25-rcc.h>
83 compatible = "st,stm32mp25-ospi";
85 memory-region = <&mm_ospi1>;
89 dma-names = "tx", "rx";
92 access-controllers = <&rifsc 74>;
93 power-domains = <&CLUSTER_PD>;
94 st,syscfg-dlyb = <&syscfg 0x1000>;
96 #address-cells = <1>;
97 #size-cells = <0>;
100 compatible = "jedec,spi-nor";
102 spi-rx-bus-width = <4>;
103 spi-max-frequency = <108000000>;