Lines Matching +full:reg +full:- +full:io +full:- +full:width
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 - $ref: serial.yaml#
14 - $ref: rs485.yaml#
16 - if:
20 - enum:
21 - renesas,r9a06g032-uart
22 - renesas,r9a06g033-uart
23 - const: renesas,rzn1-uart
24 - const: snps,dw-apb-uart
28 dma-names: false
30 - if:
34 const: starfive,jh7110-uart
47 - items:
48 - enum:
49 - renesas,r9a06g032-uart
50 - renesas,r9a06g033-uart
51 - const: renesas,rzn1-uart
52 - const: snps,dw-apb-uart
53 - items:
54 - enum:
55 - renesas,r9a06g032-uart
56 - renesas,r9a06g033-uart
57 - const: renesas,rzn1-uart
58 - items:
59 - enum:
60 - brcm,bcm11351-dw-apb-uart
61 - brcm,bcm21664-dw-apb-uart
62 - rockchip,px30-uart
63 - rockchip,rk1808-uart
64 - rockchip,rk3036-uart
65 - rockchip,rk3066-uart
66 - rockchip,rk3128-uart
67 - rockchip,rk3188-uart
68 - rockchip,rk3288-uart
69 - rockchip,rk3308-uart
70 - rockchip,rk3328-uart
71 - rockchip,rk3368-uart
72 - rockchip,rk3399-uart
73 - rockchip,rk3528-uart
74 - rockchip,rk3562-uart
75 - rockchip,rk3568-uart
76 - rockchip,rk3576-uart
77 - rockchip,rk3588-uart
78 - rockchip,rv1108-uart
79 - rockchip,rv1126-uart
80 - sophgo,sg2044-uart
81 - starfive,jh7100-hsuart
82 - starfive,jh7100-uart
83 - starfive,jh7110-uart
84 - const: snps,dw-apb-uart
85 - const: snps,dw-apb-uart
87 reg:
93 clock-frequency: true
99 clock-names:
101 - const: baudclk
102 - const: apb_pclk
107 dma-names:
109 - const: tx
110 - const: rx
112 snps,uart-16550-compatible:
121 reg-shift: true
123 reg-io-width: true
125 dcd-override:
132 dsr-override:
139 cts-override:
146 ri-override:
153 - compatible
154 - reg
159 - |
161 compatible = "snps,dw-apb-uart";
162 reg = <0x80230000 0x100>;
163 clock-frequency = <3686400>;
165 reg-shift = <2>;
166 reg-io-width = <4>;
167 dcd-override;
168 dsr-override;
169 cts-override;
170 ri-override;
173 - |
176 compatible = "snps,dw-apb-uart";
177 reg = <0x80230000 0x100>;
180 reg-shift = <2>;
181 reg-io-width = <4>;
184 - |
187 compatible = "snps,dw-apb-uart";
188 reg = <0x80230000 0x100>;
190 clock-names = "baudclk", "apb_pclk";
192 reg-shift = <2>;
193 reg-io-width = <4>;