1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Synopsys DesignWare ABP UART 8 9maintainers: 10 - Rob Herring <robh@kernel.org> 11 12allOf: 13 - $ref: serial.yaml# 14 - $ref: rs485.yaml# 15 16 - if: 17 properties: 18 compatible: 19 items: 20 - enum: 21 - renesas,r9a06g032-uart 22 - renesas,r9a06g033-uart 23 - const: renesas,rzn1-uart 24 - const: snps,dw-apb-uart 25 then: 26 properties: 27 dmas: false 28 dma-names: false 29 30 - if: 31 properties: 32 compatible: 33 contains: 34 const: starfive,jh7110-uart 35 then: 36 properties: 37 resets: 38 minItems: 2 39 else: 40 properties: 41 resets: 42 maxItems: 1 43 44properties: 45 compatible: 46 oneOf: 47 - items: 48 - enum: 49 - renesas,r9a06g032-uart 50 - renesas,r9a06g033-uart 51 - const: renesas,rzn1-uart 52 - const: snps,dw-apb-uart 53 - items: 54 - enum: 55 - renesas,r9a06g032-uart 56 - renesas,r9a06g033-uart 57 - const: renesas,rzn1-uart 58 - items: 59 - enum: 60 - brcm,bcm11351-dw-apb-uart 61 - brcm,bcm21664-dw-apb-uart 62 - rockchip,px30-uart 63 - rockchip,rk1808-uart 64 - rockchip,rk3036-uart 65 - rockchip,rk3066-uart 66 - rockchip,rk3128-uart 67 - rockchip,rk3188-uart 68 - rockchip,rk3288-uart 69 - rockchip,rk3308-uart 70 - rockchip,rk3328-uart 71 - rockchip,rk3368-uart 72 - rockchip,rk3399-uart 73 - rockchip,rk3528-uart 74 - rockchip,rk3562-uart 75 - rockchip,rk3568-uart 76 - rockchip,rk3576-uart 77 - rockchip,rk3588-uart 78 - rockchip,rv1108-uart 79 - rockchip,rv1126-uart 80 - sophgo,sg2044-uart 81 - starfive,jh7100-hsuart 82 - starfive,jh7100-uart 83 - starfive,jh7110-uart 84 - const: snps,dw-apb-uart 85 - const: snps,dw-apb-uart 86 87 reg: 88 maxItems: 1 89 90 interrupts: 91 maxItems: 1 92 93 clock-frequency: true 94 95 clocks: 96 minItems: 1 97 maxItems: 2 98 99 clock-names: 100 items: 101 - const: baudclk 102 - const: apb_pclk 103 104 dmas: 105 maxItems: 2 106 107 dma-names: 108 items: 109 - const: tx 110 - const: rx 111 112 snps,uart-16550-compatible: 113 description: reflects the value of UART_16550_COMPATIBLE configuration 114 parameter. Define this if your UART does not implement the busy functionality. 115 type: boolean 116 117 resets: 118 minItems: 1 119 maxItems: 2 120 121 reg-shift: true 122 123 reg-io-width: true 124 125 dcd-override: 126 description: Override the DCD modem status signal. This signal will 127 always be reported as active instead of being obtained from the modem 128 status register. Define this if your serial port does not use this 129 pin. 130 type: boolean 131 132 dsr-override: 133 description: Override the DTS modem status signal. This signal will 134 always be reported as active instead of being obtained from the modem 135 status register. Define this if your serial port does not use this 136 pin. 137 type: boolean 138 139 cts-override: 140 description: Override the CTS modem status signal. This signal will 141 always be reported as active instead of being obtained from the modem 142 status register. Define this if your serial port does not use this 143 pin. 144 type: boolean 145 146 ri-override: 147 description: Override the RI modem status signal. This signal will always 148 be reported as inactive instead of being obtained from the modem status 149 register. Define this if your serial port does not use this pin. 150 type: boolean 151 152required: 153 - compatible 154 - reg 155 156unevaluatedProperties: false 157 158examples: 159 - | 160 serial@80230000 { 161 compatible = "snps,dw-apb-uart"; 162 reg = <0x80230000 0x100>; 163 clock-frequency = <3686400>; 164 interrupts = <10>; 165 reg-shift = <2>; 166 reg-io-width = <4>; 167 dcd-override; 168 dsr-override; 169 cts-override; 170 ri-override; 171 }; 172 173 - | 174 // Example with one clock: 175 serial@80230000 { 176 compatible = "snps,dw-apb-uart"; 177 reg = <0x80230000 0x100>; 178 clocks = <&baudclk>; 179 interrupts = <10>; 180 reg-shift = <2>; 181 reg-io-width = <4>; 182 }; 183 184 - | 185 // Example with two clocks: 186 serial@80230000 { 187 compatible = "snps,dw-apb-uart"; 188 reg = <0x80230000 0x100>; 189 clocks = <&baudclk>, <&apb_pclk>; 190 clock-names = "baudclk", "apb_pclk"; 191 interrupts = <10>; 192 reg-shift = <2>; 193 reg-io-width = <4>; 194 }; 195... 196