bindings/iommu/qcom%2Ciommu.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Konrad Dybcio <konradybcio@kernel.org>
13   Qualcomm "B" family devices which are not compatible with arm-smmu have
16   to non-secure vs secure interrupt line.
21       - items:
22           - enum:
23               - qcom,msm8916-iommu
24               - qcom,msm8917-iommu
25               - qcom,msm8937-iommu
26               - qcom,msm8953-iommu
27           - const: qcom,msm-iommu-v1
28       - items:
29           - enum:
30               - qcom,msm8953-iommu
31               - qcom,msm8976-iommu
32           - const: qcom,msm-iommu-v2
36       - description: Clock required for IOMMU register group access
37       - description: Clock required for underlying bus access
39   clock-names:
41       - const: iface
42       - const: bus
44   power-domains:
52   qcom,iommu-secure-id:
57   '#address-cells':
60   '#size-cells':
63   '#iommu-cells':
67   "^iommu-ctx@[0-9a-f]+$":
73           - qcom,msm-iommu-v1-ns
74           - qcom,msm-iommu-v1-sec
75           - qcom,msm-iommu-v2-ns
76           - qcom,msm-iommu-v2-sec
84       qcom,ctx-asid:
90       - compatible
91       - interrupts
92       - reg
95   - compatible
96   - clocks
97   - clock-names
98   - ranges
99   - '#address-cells'
100   - '#size-cells'
101   - '#iommu-cells'
106   - |
107     #include <dt-bindings/clock/qcom,gcc-msm8916.h>
108     #include <dt-bindings/interrupt-controller/arm-gic.h>
111       compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
113       clocks = <&gcc GCC_SMMU_CFG_CLK>,
114                <&gcc GCC_APSS_TCU_CLK>;
115       clock-names = "iface", "bus";
116       qcom,iommu-secure-id = <17>;
117       #address-cells = <1>;
118       #size-cells = <1>;
119       #iommu-cells = <1>;
123       iommu-ctx@4000 {
124         compatible = "qcom,msm-iommu-v1-ns";