Lines Matching +full:boot +full:- +full:method

1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
21 with updates for 32-bit and 64-bit ARM systems provided in this document.
30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in
59 On 32-bit ARM v7 or later systems this property is
68 On ARM v8 64-bit systems this property is required
71 * If cpus node's #address-cells property is set to 2
79 * If cpus node's #address-cells property is set to 1
88 - apple,avalanche
89 - apple,blizzard
90 - apple,cyclone
91 - apple,firestorm
92 - apple,hurricane-zephyr
93 - apple,icestorm
94 - apple,mistral
95 - apple,monsoon
96 - apple,twister
97 - apple,typhoon
98 - arm,arm710t
99 - arm,arm720t
100 - arm,arm740t
101 - arm,arm7ej-s
102 - arm,arm7tdmi
103 - arm,arm7tdmi-s
104 - arm,arm9es
105 - arm,arm9ej-s
106 - arm,arm920t
107 - arm,arm922t
108 - arm,arm925
109 - arm,arm926e-s
110 - arm,arm926ej-s
111 - arm,arm940t
112 - arm,arm946e-s
113 - arm,arm966e-s
114 - arm,arm968e-s
115 - arm,arm9tdmi
116 - arm,arm1020e
117 - arm,arm1020t
118 - arm,arm1022e
119 - arm,arm1026ej-s
120 - arm,arm1136j-s
121 - arm,arm1136jf-s
122 - arm,arm1156t2-s
123 - arm,arm1156t2f-s
124 - arm,arm1176jzf
125 - arm,arm1176jz-s
126 - arm,arm1176jzf-s
127 - arm,arm11mpcore
128 - arm,armv8 # Only for s/w models
129 - arm,cortex-a5
130 - arm,cortex-a7
131 - arm,cortex-a8
132 - arm,cortex-a9
133 - arm,cortex-a12
134 - arm,cortex-a15
135 - arm,cortex-a17
136 - arm,cortex-a32
137 - arm,cortex-a34
138 - arm,cortex-a35
139 - arm,cortex-a53
140 - arm,cortex-a55
141 - arm,cortex-a57
142 - arm,cortex-a65
143 - arm,cortex-a72
144 - arm,cortex-a73
145 - arm,cortex-a75
146 - arm,cortex-a76
147 - arm,cortex-a77
148 - arm,cortex-a78
149 - arm,cortex-a78ae
150 - arm,cortex-a78c
151 - arm,cortex-a510
152 - arm,cortex-a520
153 - arm,cortex-a710
154 - arm,cortex-a715
155 - arm,cortex-a720
156 - arm,cortex-a725
157 - arm,cortex-m0
158 - arm,cortex-m0+
159 - arm,cortex-m1
160 - arm,cortex-m3
161 - arm,cortex-m4
162 - arm,cortex-r4
163 - arm,cortex-r5
164 - arm,cortex-r7
165 - arm,cortex-r52
166 - arm,cortex-x1
167 - arm,cortex-x1c
168 - arm,cortex-x2
169 - arm,cortex-x3
170 - arm,cortex-x4
171 - arm,cortex-x925
172 - arm,neoverse-e1
173 - arm,neoverse-n1
174 - arm,neoverse-n2
175 - arm,neoverse-n3
176 - arm,neoverse-v1
177 - arm,neoverse-v2
178 - arm,neoverse-v3
179 - arm,neoverse-v3ae
180 - arm,rainier
181 - brcm,brahma-b15
182 - brcm,brahma-b53
183 - brcm,vulcan
184 - cavium,thunder
185 - cavium,thunder2
186 - faraday,fa526
187 - intel,sa110
188 - intel,sa1100
189 - marvell,feroceon
190 - marvell,mohawk
191 - marvell,pj4a
192 - marvell,pj4b
193 - marvell,sheeva-v5
194 - marvell,sheeva-v7
195 - nvidia,tegra132-denver
196 - nvidia,tegra186-denver
197 - nvidia,tegra194-carmel
198 - qcom,krait
199 - qcom,kryo
200 - qcom,kryo240
201 - qcom,kryo250
202 - qcom,kryo260
203 - qcom,kryo280
204 - qcom,kryo360
205 - qcom,kryo385
206 - qcom,kryo465
207 - qcom,kryo468
208 - qcom,kryo485
209 - qcom,kryo560
210 - qcom,kryo570
211 - qcom,kryo660
212 - qcom,kryo670
213 - qcom,kryo685
214 - qcom,kryo780
215 - qcom,oryon
216 - qcom,scorpion
217 - samsung,mongoose-m2
218 - samsung,mongoose-m3
219 - samsung,mongoose-m5
221 enable-method:
224 # On ARM v8 64-bit this property is required
225 - enum:
226 - psci
227 - spin-table
228 # On ARM 32-bit systems this property is optional
229 - enum:
230 - actions,s500-smp
231 - allwinner,sun6i-a31
232 - allwinner,sun8i-a23
233 - allwinner,sun9i-a80-smp
234 - allwinner,sun8i-a83t-smp
235 - amlogic,meson8-smp
236 - amlogic,meson8b-smp
237 - arm,realview-smp
238 - aspeed,ast2600-smp
239 - brcm,bcm11351-cpu-method
240 - brcm,bcm23550
241 - brcm,bcm2836-smp
242 - brcm,bcm63138
243 - brcm,bcm-nsp-smp
244 - brcm,brahma-b15
245 - marvell,armada-375-smp
246 - marvell,armada-380-smp
247 - marvell,armada-390-smp
248 - marvell,armada-xp-smp
249 - marvell,98dx3236-smp
250 - marvell,mmp3-smp
251 - mediatek,mt6589-smp
252 - mediatek,mt81xx-tz-smp
253 - qcom,gcc-msm8660
254 - qcom,kpss-acc-v1
255 - qcom,kpss-acc-v2
256 - qcom,msm8226-smp
257 - qcom,msm8909-smp
258 # Only valid on ARM 32-bit, see above for ARM v8 64-bit
259 - qcom,msm8916-smp
260 - renesas,apmu
261 - renesas,r9a06g032-smp
262 - rockchip,rk3036-smp
263 - rockchip,rk3066-smp
264 - socionext,milbeaut-m10v-smp
265 - ste,dbx500-smp
266 - ti,am3352
267 - ti,am4372
269 cpu-release-addr:
271 - $ref: /schemas/types.yaml#/definitions/uint32
272 - $ref: /schemas/types.yaml#/definitions/uint64
274 The DT specification defines this as 64-bit always, but some 32-bit Arm
275 systems have used a 32-bit value which must be supported.
276 Required for systems that have an "enable-method"
277 property value of "spin-table".
279 cpu-idle-states:
280 $ref: /schemas/types.yaml#/definitions/phandle-array
285 by this cpu (see ./idle-states.yaml).
287 capacity-dmips-mhz:
289 u32 value representing CPU capacity (see ../cpu/cpu-capacity.txt) in
290 DMIPS/MHz, relative to highest capacity-dmips-mhz
293 cci-control-port: true
295 dynamic-power-coefficient:
306 calculate the dynamic power as below -
308 Pdyn = dynamic-power-coefficient * V^2 * f
312 performance-domains:
317 dvfs/performance-domain.yaml.
319 power-domains:
324 power-domain-names:
327 power-domains property.
339 Required for systems that have an "enable-method" property
340 value of "qcom,kpss-acc-v1" or "qcom,kpss-acc-v2"
349 Required for systems that have an "enable-method" property
350 value of "qcom,kpss-acc-v1", "qcom,kpss-acc-v2", "qcom,msm8226-smp" or
351 "qcom,msm8916-smp".
353 * arm/msm/qcom,kpss-acc.txt
360 Optional for systems that have an "enable-method"
361 property value of "rockchip,rk3066-smp"
363 the cpu-core power-domains.
365 secondary-boot-reg:
368 Required for systems that have an "enable-method" property value of
369 "brcm,bcm11351-cpu-method", "brcm,bcm23550" or "brcm,bcm-nsp-smp".
375 The secondary-boot-reg property is a u32 value that specifies the
382 # If the enable-method property contains one of those values
384 enable-method:
387 - brcm,bcm11351-cpu-method
388 - brcm,bcm23550
389 - brcm,bcm-nsp-smp
390 # and if enable-method is present
392 - enable-method
396 - secondary-boot-reg
399 - device_type
400 - reg
401 - compatible
404 rockchip,pmu: [enable-method]
409 - |
411 #size-cells = <0>;
412 #address-cells = <1>;
416 compatible = "arm,cortex-a15";
422 compatible = "arm,cortex-a15";
428 compatible = "arm,cortex-a7";
434 compatible = "arm,cortex-a7";
439 - |
440 // Example 2 (Cortex-A8 uniprocessor 32-bit system):
442 #size-cells = <0>;
443 #address-cells = <1>;
447 compatible = "arm,cortex-a8";
452 - |
453 // Example 3 (ARM 926EJ-S uniprocessor 32-bit system):
455 #size-cells = <0>;
456 #address-cells = <1>;
460 compatible = "arm,arm926ej-s";
465 - |
466 // Example 4 (ARM Cortex-A57 64-bit system):
468 #size-cells = <0>;
469 #address-cells = <2>;
473 compatible = "arm,cortex-a57";
475 enable-method = "spin-table";
476 cpu-release-addr = <0 0x20000000>;
481 compatible = "arm,cortex-a57";
483 enable-method = "spin-table";
484 cpu-release-addr = <0 0x20000000>;
489 compatible = "arm,cortex-a57";
491 enable-method = "spin-table";
492 cpu-release-addr = <0 0x20000000>;
497 compatible = "arm,cortex-a57";
499 enable-method = "spin-table";
500 cpu-release-addr = <0 0x20000000>;
505 compatible = "arm,cortex-a57";
507 enable-method = "spin-table";
508 cpu-release-addr = <0 0x20000000>;
513 compatible = "arm,cortex-a57";
515 enable-method = "spin-table";
516 cpu-release-addr = <0 0x20000000>;
521 compatible = "arm,cortex-a57";
523 enable-method = "spin-table";
524 cpu-release-addr = <0 0x20000000>;
529 compatible = "arm,cortex-a57";
531 enable-method = "spin-table";
532 cpu-release-addr = <0 0x20000000>;
537 compatible = "arm,cortex-a57";
539 enable-method = "spin-table";
540 cpu-release-addr = <0 0x20000000>;
545 compatible = "arm,cortex-a57";
547 enable-method = "spin-table";
548 cpu-release-addr = <0 0x20000000>;
553 compatible = "arm,cortex-a57";
555 enable-method = "spin-table";
556 cpu-release-addr = <0 0x20000000>;
561 compatible = "arm,cortex-a57";
563 enable-method = "spin-table";
564 cpu-release-addr = <0 0x20000000>;
569 compatible = "arm,cortex-a57";
571 enable-method = "spin-table";
572 cpu-release-addr = <0 0x20000000>;
577 compatible = "arm,cortex-a57";
579 enable-method = "spin-table";
580 cpu-release-addr = <0 0x20000000>;
585 compatible = "arm,cortex-a57";
587 enable-method = "spin-table";
588 cpu-release-addr = <0 0x20000000>;
593 compatible = "arm,cortex-a57";
595 enable-method = "spin-table";
596 cpu-release-addr = <0 0x20000000>;