Lines Matching +full:chip +full:- +full:to +full:- +full:chip

7  *   Basic support for AG-AND chips is provided.
10 * http://www.linux-mtd.infradead.org/doc/nand.html
13 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
23 * Check, if mtd->ecctype should be set to MTD_ECC_HW
25 * The AG-AND chips have nice features for speed improvement,
27 * BBT table is not serialized, has to be fixed
96 static int nand_get_device(struct nand_chip *chip, struct mtd_info *mtd,
99 static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
111 struct nand_chip *chip = mtd->priv; in check_offs_len() local
115 if (ofs & ((1 << chip->phys_erase_shift) - 1)) { in check_offs_len()
117 ret = -EINVAL; in check_offs_len()
121 if (len & ((1 << chip->phys_erase_shift) - 1)) { in check_offs_len()
123 ret = -EINVAL; in check_offs_len()
127 if (ofs + len > mtd->size) { in check_offs_len()
129 ret = -EINVAL; in check_offs_len()
136 * nand_release_device - [GENERIC] release chip
139 * Deselect, release chip lock and wake up anyone waiting on the device.
143 struct nand_chip *chip = mtd->priv; in nand_release_device() local
145 /* De-select the NAND device */ in nand_release_device()
146 chip->select_chip(mtd, -1); in nand_release_device()
148 /* Release the controller and the chip */ in nand_release_device()
149 spin_lock(&chip->controller->lock); in nand_release_device()
150 chip->controller->active = NULL; in nand_release_device()
151 chip->state = FL_READY; in nand_release_device()
152 wake_up(&chip->controller->wq); in nand_release_device()
153 spin_unlock(&chip->controller->lock); in nand_release_device()
157 * nand_read_byte - [DEFAULT] read one byte from the chip
164 struct nand_chip *chip = mtd->priv; in nand_read_byte() local
165 return readb(chip->IO_ADDR_R); in nand_read_byte()
169 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
170 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip
178 struct nand_chip *chip = mtd->priv; in nand_read_byte16() local
179 return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R)); in nand_read_byte16()
183 * nand_read_word - [DEFAULT] read one word from the chip
190 struct nand_chip *chip = mtd->priv; in nand_read_word() local
191 return readw(chip->IO_ADDR_R); in nand_read_word()
195 * nand_select_chip - [DEFAULT] control CE line
197 * @chipnr: chipnumber to select, -1 for deselect
199 * Default select function for 1 chip devices.
203 struct nand_chip *chip = mtd->priv; in nand_select_chip() local
206 case -1: in nand_select_chip()
207 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); in nand_select_chip()
218 * nand_write_buf - [DEFAULT] write buffer to chip
221 * @len: number of bytes to write
228 struct nand_chip *chip = mtd->priv; in nand_write_buf() local
231 writeb(buf[i], chip->IO_ADDR_W); in nand_write_buf()
235 * nand_read_buf - [DEFAULT] read chip data into buffer
237 * @buf: buffer to store date
238 * @len: number of bytes to read
245 struct nand_chip *chip = mtd->priv; in nand_read_buf() local
248 buf[i] = readb(chip->IO_ADDR_R); in nand_read_buf()
252 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
254 * @buf: buffer containing the data to compare
255 * @len: number of bytes to compare
262 struct nand_chip *chip = mtd->priv; in nand_verify_buf() local
265 if (buf[i] != readb(chip->IO_ADDR_R)) in nand_verify_buf()
266 return -EFAULT; in nand_verify_buf()
271 * nand_write_buf16 - [DEFAULT] write buffer to chip
274 * @len: number of bytes to write
281 struct nand_chip *chip = mtd->priv; in nand_write_buf16() local
286 writew(p[i], chip->IO_ADDR_W); in nand_write_buf16()
291 * nand_read_buf16 - [DEFAULT] read chip data into buffer
293 * @buf: buffer to store date
294 * @len: number of bytes to read
301 struct nand_chip *chip = mtd->priv; in nand_read_buf16() local
306 p[i] = readw(chip->IO_ADDR_R); in nand_read_buf16()
310 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
312 * @buf: buffer containing the data to compare
313 * @len: number of bytes to compare
320 struct nand_chip *chip = mtd->priv; in nand_verify_buf16() local
325 if (p[i] != readw(chip->IO_ADDR_R)) in nand_verify_buf16()
326 return -EFAULT; in nand_verify_buf16()
332 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
335 * @getchip: 0, if the chip is already selected
342 struct nand_chip *chip = mtd->priv; in nand_block_bad() local
345 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) in nand_block_bad()
346 ofs += mtd->erasesize - mtd->writesize; in nand_block_bad()
348 page = (int)(ofs >> chip->page_shift) & chip->pagemask; in nand_block_bad()
351 chipnr = (int)(ofs >> chip->chip_shift); in nand_block_bad()
353 nand_get_device(chip, mtd, FL_READING); in nand_block_bad()
356 chip->select_chip(mtd, chipnr); in nand_block_bad()
359 if (chip->options & NAND_BUSWIDTH_16) { in nand_block_bad()
360 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos & 0xFE, in nand_block_bad()
362 bad = cpu_to_le16(chip->read_word(mtd)); in nand_block_bad()
363 if (chip->badblockpos & 0x1) in nand_block_bad()
368 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, page); in nand_block_bad()
369 bad = chip->read_byte(mtd); in nand_block_bad()
372 if (likely(chip->badblockbits == 8)) in nand_block_bad()
375 res = hweight8(bad) < chip->badblockbits; in nand_block_bad()
384 * nand_default_block_markbad - [DEFAULT] mark a block bad
393 struct nand_chip *chip = mtd->priv; in nand_default_block_markbad() local
397 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) in nand_default_block_markbad()
398 ofs += mtd->erasesize - mtd->writesize; in nand_default_block_markbad()
401 block = (int)(ofs >> chip->bbt_erase_shift); in nand_default_block_markbad()
402 if (chip->bbt) in nand_default_block_markbad()
403 chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); in nand_default_block_markbad()
406 if (chip->bbt_options & NAND_BBT_USE_FLASH) in nand_default_block_markbad()
411 nand_get_device(chip, mtd, FL_WRITING); in nand_default_block_markbad()
414 * Write to first two pages if necessary. If we write to more in nand_default_block_markbad()
417 * to mess with 16 bit access. in nand_default_block_markbad()
422 ops.ooboffs = chip->badblockpos & ~0x01; in nand_default_block_markbad()
428 ofs += mtd->writesize; in nand_default_block_markbad()
429 } while (!ret && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE) && in nand_default_block_markbad()
435 mtd->ecc_stats.badblocks++; in nand_default_block_markbad()
441 * nand_check_wp - [GENERIC] check if the chip is write protected
449 struct nand_chip *chip = mtd->priv; in nand_check_wp() local
452 if (chip->options & NAND_BROKEN_XD) in nand_check_wp()
456 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); in nand_check_wp()
457 return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; in nand_check_wp()
461 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
464 * @getchip: 0, if the chip is already selected
465 * @allowbbt: 1, if its allowed to access the bbt area
473 struct nand_chip *chip = mtd->priv; in nand_block_checkbad() local
475 if (!chip->bbt) in nand_block_checkbad()
476 return chip->block_bad(mtd, ofs, getchip); in nand_block_checkbad()
483 * panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands.
487 * Helper function for nand_wait_ready used when needing to wait in interrupt
492 struct nand_chip *chip = mtd->priv; in panic_nand_wait_ready() local
495 /* Wait for the device to get ready */ in panic_nand_wait_ready()
497 if (chip->dev_ready(mtd)) in panic_nand_wait_ready()
507 struct nand_chip *chip = mtd->priv; in nand_wait_ready() local
517 if (chip->dev_ready(mtd)) in nand_wait_ready()
526 * nand_command - [DEFAULT] Send command to NAND device
528 * @command: the command to be sent
529 * @column: the column address for this command, -1 if none
530 * @page_addr: the page address for this command, -1 if none
532 * Send command to NAND device. This function is used for small page devices
538 register struct nand_chip *chip = mtd->priv; in nand_command() local
541 /* Write out the command to the device */ in nand_command()
545 if (column >= mtd->writesize) { in nand_command()
547 column -= mtd->writesize; in nand_command()
550 /* First 256 bytes --> READ0 */ in nand_command()
553 column -= 256; in nand_command()
556 chip->cmd_ctrl(mtd, readcmd, ctrl); in nand_command()
559 chip->cmd_ctrl(mtd, command, ctrl); in nand_command()
564 if (column != -1) { in nand_command()
566 if (chip->options & NAND_BUSWIDTH_16) in nand_command()
568 chip->cmd_ctrl(mtd, column, ctrl); in nand_command()
571 if (page_addr != -1) { in nand_command()
572 chip->cmd_ctrl(mtd, page_addr, ctrl); in nand_command()
574 chip->cmd_ctrl(mtd, page_addr >> 8, ctrl); in nand_command()
576 if (chip->chipsize > (32 << 20)) in nand_command()
577 chip->cmd_ctrl(mtd, page_addr >> 16, ctrl); in nand_command()
579 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); in nand_command()
595 if (chip->dev_ready) in nand_command()
597 udelay(chip->chip_delay); in nand_command()
598 chip->cmd_ctrl(mtd, NAND_CMD_STATUS, in nand_command()
600 chip->cmd_ctrl(mtd, in nand_command()
602 while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) in nand_command()
606 /* This applies to read commands */ in nand_command()
609 * If we don't have access to the busy pin, we apply the given in nand_command()
612 if (!chip->dev_ready) { in nand_command()
613 udelay(chip->chip_delay); in nand_command()
618 * Apply this short delay always to ensure that we do wait tWB in in nand_command()
627 * nand_command_lp - [DEFAULT] Send command to NAND large page device
629 * @command: the command to be sent
630 * @column: the column address for this command, -1 if none
631 * @page_addr: the page address for this command, -1 if none
633 * Send command to NAND device. This is the version for the new large page
635 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
640 register struct nand_chip *chip = mtd->priv; in nand_command_lp() local
644 column += mtd->writesize; in nand_command_lp()
649 chip->cmd_ctrl(mtd, command & 0xff, in nand_command_lp()
652 if (column != -1 || page_addr != -1) { in nand_command_lp()
656 if (column != -1) { in nand_command_lp()
658 if (chip->options & NAND_BUSWIDTH_16) in nand_command_lp()
660 chip->cmd_ctrl(mtd, column, ctrl); in nand_command_lp()
662 chip->cmd_ctrl(mtd, column >> 8, ctrl); in nand_command_lp()
664 if (page_addr != -1) { in nand_command_lp()
665 chip->cmd_ctrl(mtd, page_addr, ctrl); in nand_command_lp()
666 chip->cmd_ctrl(mtd, page_addr >> 8, in nand_command_lp()
669 if (chip->chipsize > (128 << 20)) in nand_command_lp()
670 chip->cmd_ctrl(mtd, page_addr >> 16, in nand_command_lp()
674 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); in nand_command_lp()
698 udelay(chip->chip_delay); in nand_command_lp()
702 if (chip->dev_ready) in nand_command_lp()
704 udelay(chip->chip_delay); in nand_command_lp()
705 chip->cmd_ctrl(mtd, NAND_CMD_STATUS, in nand_command_lp()
707 chip->cmd_ctrl(mtd, NAND_CMD_NONE, in nand_command_lp()
709 while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) in nand_command_lp()
715 chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART, in nand_command_lp()
717 chip->cmd_ctrl(mtd, NAND_CMD_NONE, in nand_command_lp()
722 chip->cmd_ctrl(mtd, NAND_CMD_READSTART, in nand_command_lp()
724 chip->cmd_ctrl(mtd, NAND_CMD_NONE, in nand_command_lp()
727 /* This applies to read commands */ in nand_command_lp()
730 * If we don't have access to the busy pin, we apply the given in nand_command_lp()
733 if (!chip->dev_ready) { in nand_command_lp()
734 udelay(chip->chip_delay); in nand_command_lp()
740 * Apply this short delay always to ensure that we do wait tWB in in nand_command_lp()
749 * panic_nand_get_device - [GENERIC] Get chip for selected access
750 * @chip: the nand chip descriptor
756 static void panic_nand_get_device(struct nand_chip *chip, in panic_nand_get_device() argument
760 chip->controller->active = chip; in panic_nand_get_device()
761 chip->state = new_state; in panic_nand_get_device()
765 * nand_get_device - [GENERIC] Get chip for selected access
766 * @chip: the nand chip descriptor
773 nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state) in nand_get_device() argument
775 spinlock_t *lock = &chip->controller->lock; in nand_get_device()
776 wait_queue_head_t *wq = &chip->controller->wq; in nand_get_device()
782 if (!chip->controller->active) in nand_get_device()
783 chip->controller->active = chip; in nand_get_device()
785 if (chip->controller->active == chip && chip->state == FL_READY) { in nand_get_device()
786 chip->state = new_state; in nand_get_device()
791 if (chip->controller->active->state == FL_PM_SUSPENDED) { in nand_get_device()
792 chip->state = FL_PM_SUSPENDED; in nand_get_device()
806 * panic_nand_wait - [GENERIC] wait until the command is done
808 * @chip: NAND chip structure
812 * we are in interrupt context. May happen when in panic and trying to write
815 static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip, in panic_nand_wait() argument
820 if (chip->dev_ready) { in panic_nand_wait()
821 if (chip->dev_ready(mtd)) in panic_nand_wait()
824 if (chip->read_byte(mtd) & NAND_STATUS_READY) in panic_nand_wait()
832 * nand_wait - [DEFAULT] wait until the command is done
834 * @chip: NAND chip structure
836 * Wait for command done. This applies to erase and program only. Erase can
837 * take up to 400ms and program up to 20ms according to general NAND and
840 static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip) in nand_wait() argument
844 int status, state = chip->state; in nand_wait()
854 * Apply this short delay always to ensure that we do wait tWB in any in nand_wait()
859 if ((state == FL_ERASING) && (chip->options & NAND_IS_AND)) in nand_wait()
860 chip->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1); in nand_wait()
862 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); in nand_wait()
865 panic_nand_wait(mtd, chip, timeo); in nand_wait()
868 if (chip->dev_ready) { in nand_wait()
869 if (chip->dev_ready(mtd)) in nand_wait()
872 if (chip->read_byte(mtd) & NAND_STATUS_READY) in nand_wait()
880 status = (int)chip->read_byte(mtd); in nand_wait()
885 * __nand_unlock - [REPLACEABLE] unlocks specified locked blocks
887 * @ofs: offset to start unlock from
888 * @len: length to unlock
901 struct nand_chip *chip = mtd->priv; in __nand_unlock() local
903 /* Submit address of first page to unlock */ in __nand_unlock()
904 page = ofs >> chip->page_shift; in __nand_unlock()
905 chip->cmdfunc(mtd, NAND_CMD_UNLOCK1, -1, page & chip->pagemask); in __nand_unlock()
907 /* Submit address of last page to unlock */ in __nand_unlock()
908 page = (ofs + len) >> chip->page_shift; in __nand_unlock()
909 chip->cmdfunc(mtd, NAND_CMD_UNLOCK2, -1, in __nand_unlock()
910 (page | invert) & chip->pagemask); in __nand_unlock()
913 status = chip->waitfunc(mtd, chip); in __nand_unlock()
918 ret = -EIO; in __nand_unlock()
925 * nand_unlock - [REPLACEABLE] unlocks specified locked blocks
927 * @ofs: offset to start unlock from
928 * @len: length to unlock
936 struct nand_chip *chip = mtd->priv; in nand_unlock() local
942 ret = -EINVAL; in nand_unlock()
944 /* Align to last block address if size addresses end of the device */ in nand_unlock()
945 if (ofs + len == mtd->size) in nand_unlock()
946 len -= mtd->erasesize; in nand_unlock()
948 nand_get_device(chip, mtd, FL_UNLOCKING); in nand_unlock()
950 /* Shift to get chip number */ in nand_unlock()
951 chipnr = ofs >> chip->chip_shift; in nand_unlock()
953 chip->select_chip(mtd, chipnr); in nand_unlock()
959 ret = -EIO; in nand_unlock()
973 * nand_lock - [REPLACEABLE] locks all blocks present in the device
975 * @ofs: offset to start unlock from
976 * @len: length to unlock
979 * have this feature, but it allows only to lock all blocks, not for specified
989 struct nand_chip *chip = mtd->priv; in nand_lock() local
995 ret = -EINVAL; in nand_lock()
997 nand_get_device(chip, mtd, FL_LOCKING); in nand_lock()
999 /* Shift to get chip number */ in nand_lock()
1000 chipnr = ofs >> chip->chip_shift; in nand_lock()
1002 chip->select_chip(mtd, chipnr); in nand_lock()
1009 ret = -EIO; in nand_lock()
1013 /* Submit address of first page to lock */ in nand_lock()
1014 page = ofs >> chip->page_shift; in nand_lock()
1015 chip->cmdfunc(mtd, NAND_CMD_LOCK, -1, page & chip->pagemask); in nand_lock()
1018 status = chip->waitfunc(mtd, chip); in nand_lock()
1023 ret = -EIO; in nand_lock()
1037 * nand_read_page_raw - [INTERN] read raw page data without ecc
1039 * @chip: nand chip info structure
1040 * @buf: buffer to store read data
1041 * @page: page number to read
1045 static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, in nand_read_page_raw() argument
1048 chip->read_buf(mtd, buf, mtd->writesize); in nand_read_page_raw()
1049 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); in nand_read_page_raw()
1054 * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
1056 * @chip: nand chip info structure
1057 * @buf: buffer to store read data
1058 * @page: page number to read
1063 struct nand_chip *chip, in nand_read_page_raw_syndrome() argument
1066 int eccsize = chip->ecc.size; in nand_read_page_raw_syndrome()
1067 int eccbytes = chip->ecc.bytes; in nand_read_page_raw_syndrome()
1068 uint8_t *oob = chip->oob_poi; in nand_read_page_raw_syndrome()
1071 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_read_page_raw_syndrome()
1072 chip->read_buf(mtd, buf, eccsize); in nand_read_page_raw_syndrome()
1075 if (chip->ecc.prepad) { in nand_read_page_raw_syndrome()
1076 chip->read_buf(mtd, oob, chip->ecc.prepad); in nand_read_page_raw_syndrome()
1077 oob += chip->ecc.prepad; in nand_read_page_raw_syndrome()
1080 chip->read_buf(mtd, oob, eccbytes); in nand_read_page_raw_syndrome()
1083 if (chip->ecc.postpad) { in nand_read_page_raw_syndrome()
1084 chip->read_buf(mtd, oob, chip->ecc.postpad); in nand_read_page_raw_syndrome()
1085 oob += chip->ecc.postpad; in nand_read_page_raw_syndrome()
1089 size = mtd->oobsize - (oob - chip->oob_poi); in nand_read_page_raw_syndrome()
1091 chip->read_buf(mtd, oob, size); in nand_read_page_raw_syndrome()
1097 * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
1099 * @chip: nand chip info structure
1100 * @buf: buffer to store read data
1101 * @page: page number to read
1103 static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, in nand_read_page_swecc() argument
1106 int i, eccsize = chip->ecc.size; in nand_read_page_swecc()
1107 int eccbytes = chip->ecc.bytes; in nand_read_page_swecc()
1108 int eccsteps = chip->ecc.steps; in nand_read_page_swecc()
1110 uint8_t *ecc_calc = chip->buffers->ecccalc; in nand_read_page_swecc()
1111 uint8_t *ecc_code = chip->buffers->ecccode; in nand_read_page_swecc()
1112 uint32_t *eccpos = chip->ecc.layout->eccpos; in nand_read_page_swecc()
1114 chip->ecc.read_page_raw(mtd, chip, buf, page); in nand_read_page_swecc()
1116 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) in nand_read_page_swecc()
1117 chip->ecc.calculate(mtd, p, &ecc_calc[i]); in nand_read_page_swecc()
1119 for (i = 0; i < chip->ecc.total; i++) in nand_read_page_swecc()
1120 ecc_code[i] = chip->oob_poi[eccpos[i]]; in nand_read_page_swecc()
1122 eccsteps = chip->ecc.steps; in nand_read_page_swecc()
1125 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_swecc()
1128 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); in nand_read_page_swecc()
1130 mtd->ecc_stats.failed++; in nand_read_page_swecc()
1132 mtd->ecc_stats.corrected += stat; in nand_read_page_swecc()
1138 * nand_read_subpage - [REPLACEABLE] software ECC based sub-page read function
1140 * @chip: nand chip info structure
1143 * @bufpoi: buffer to store read data
1145 static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, in nand_read_subpage() argument
1149 uint32_t *eccpos = chip->ecc.layout->eccpos; in nand_read_subpage()
1153 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1; in nand_read_subpage()
1156 /* Column address within the page aligned to ECC size (256bytes) */ in nand_read_subpage()
1157 start_step = data_offs / chip->ecc.size; in nand_read_subpage()
1158 end_step = (data_offs + readlen - 1) / chip->ecc.size; in nand_read_subpage()
1159 num_steps = end_step - start_step + 1; in nand_read_subpage()
1161 /* Data size aligned to ECC ecc.size */ in nand_read_subpage()
1162 datafrag_len = num_steps * chip->ecc.size; in nand_read_subpage()
1163 eccfrag_len = num_steps * chip->ecc.bytes; in nand_read_subpage()
1165 data_col_addr = start_step * chip->ecc.size; in nand_read_subpage()
1168 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1); in nand_read_subpage()
1171 chip->read_buf(mtd, p, datafrag_len); in nand_read_subpage()
1174 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) in nand_read_subpage()
1175 chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]); in nand_read_subpage()
1178 * The performance is faster if we position offsets according to in nand_read_subpage()
1181 for (i = 0; i < eccfrag_len - 1; i++) { in nand_read_subpage()
1182 if (eccpos[i + start_step * chip->ecc.bytes] + 1 != in nand_read_subpage()
1183 eccpos[i + start_step * chip->ecc.bytes + 1]) { in nand_read_subpage()
1189 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1); in nand_read_subpage()
1190 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); in nand_read_subpage()
1193 * Send the command to read the particular ECC bytes take care in nand_read_subpage()
1196 index = start_step * chip->ecc.bytes; in nand_read_subpage()
1198 aligned_pos = eccpos[index] & ~(busw - 1); in nand_read_subpage()
1200 if (eccpos[index] & (busw - 1)) in nand_read_subpage()
1202 if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1)) in nand_read_subpage()
1205 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, in nand_read_subpage()
1206 mtd->writesize + aligned_pos, -1); in nand_read_subpage()
1207 chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len); in nand_read_subpage()
1211 chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + index]]; in nand_read_subpage()
1214 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) { in nand_read_subpage()
1217 stat = chip->ecc.correct(mtd, p, in nand_read_subpage()
1218 &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]); in nand_read_subpage()
1220 mtd->ecc_stats.failed++; in nand_read_subpage()
1222 mtd->ecc_stats.corrected += stat; in nand_read_subpage()
1228 * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
1230 * @chip: nand chip info structure
1231 * @buf: buffer to store read data
1232 * @page: page number to read
1236 static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, in nand_read_page_hwecc() argument
1239 int i, eccsize = chip->ecc.size; in nand_read_page_hwecc()
1240 int eccbytes = chip->ecc.bytes; in nand_read_page_hwecc()
1241 int eccsteps = chip->ecc.steps; in nand_read_page_hwecc()
1243 uint8_t *ecc_calc = chip->buffers->ecccalc; in nand_read_page_hwecc()
1244 uint8_t *ecc_code = chip->buffers->ecccode; in nand_read_page_hwecc()
1245 uint32_t *eccpos = chip->ecc.layout->eccpos; in nand_read_page_hwecc()
1247 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_hwecc()
1248 chip->ecc.hwctl(mtd, NAND_ECC_READ); in nand_read_page_hwecc()
1249 chip->read_buf(mtd, p, eccsize); in nand_read_page_hwecc()
1250 chip->ecc.calculate(mtd, p, &ecc_calc[i]); in nand_read_page_hwecc()
1252 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); in nand_read_page_hwecc()
1254 for (i = 0; i < chip->ecc.total; i++) in nand_read_page_hwecc()
1255 ecc_code[i] = chip->oob_poi[eccpos[i]]; in nand_read_page_hwecc()
1257 eccsteps = chip->ecc.steps; in nand_read_page_hwecc()
1260 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_hwecc()
1263 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); in nand_read_page_hwecc()
1265 mtd->ecc_stats.failed++; in nand_read_page_hwecc()
1267 mtd->ecc_stats.corrected += stat; in nand_read_page_hwecc()
1273 * nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first
1275 * @chip: nand chip info structure
1276 * @buf: buffer to store read data
1277 * @page: page number to read
1279 * Hardware ECC for large page chips, require OOB to be read first. For this
1280 * ECC mode, the write_page method is re-used from ECC_HW. These methods
1286 struct nand_chip *chip, uint8_t *buf, int page) in nand_read_page_hwecc_oob_first() argument
1288 int i, eccsize = chip->ecc.size; in nand_read_page_hwecc_oob_first()
1289 int eccbytes = chip->ecc.bytes; in nand_read_page_hwecc_oob_first()
1290 int eccsteps = chip->ecc.steps; in nand_read_page_hwecc_oob_first()
1292 uint8_t *ecc_code = chip->buffers->ecccode; in nand_read_page_hwecc_oob_first()
1293 uint32_t *eccpos = chip->ecc.layout->eccpos; in nand_read_page_hwecc_oob_first()
1294 uint8_t *ecc_calc = chip->buffers->ecccalc; in nand_read_page_hwecc_oob_first()
1297 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); in nand_read_page_hwecc_oob_first()
1298 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); in nand_read_page_hwecc_oob_first()
1299 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); in nand_read_page_hwecc_oob_first()
1301 for (i = 0; i < chip->ecc.total; i++) in nand_read_page_hwecc_oob_first()
1302 ecc_code[i] = chip->oob_poi[eccpos[i]]; in nand_read_page_hwecc_oob_first()
1304 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_hwecc_oob_first()
1307 chip->ecc.hwctl(mtd, NAND_ECC_READ); in nand_read_page_hwecc_oob_first()
1308 chip->read_buf(mtd, p, eccsize); in nand_read_page_hwecc_oob_first()
1309 chip->ecc.calculate(mtd, p, &ecc_calc[i]); in nand_read_page_hwecc_oob_first()
1311 stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL); in nand_read_page_hwecc_oob_first()
1313 mtd->ecc_stats.failed++; in nand_read_page_hwecc_oob_first()
1315 mtd->ecc_stats.corrected += stat; in nand_read_page_hwecc_oob_first()
1321 * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
1323 * @chip: nand chip info structure
1324 * @buf: buffer to store read data
1325 * @page: page number to read
1330 static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip, in nand_read_page_syndrome() argument
1333 int i, eccsize = chip->ecc.size; in nand_read_page_syndrome()
1334 int eccbytes = chip->ecc.bytes; in nand_read_page_syndrome()
1335 int eccsteps = chip->ecc.steps; in nand_read_page_syndrome()
1337 uint8_t *oob = chip->oob_poi; in nand_read_page_syndrome()
1339 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_syndrome()
1342 chip->ecc.hwctl(mtd, NAND_ECC_READ); in nand_read_page_syndrome()
1343 chip->read_buf(mtd, p, eccsize); in nand_read_page_syndrome()
1345 if (chip->ecc.prepad) { in nand_read_page_syndrome()
1346 chip->read_buf(mtd, oob, chip->ecc.prepad); in nand_read_page_syndrome()
1347 oob += chip->ecc.prepad; in nand_read_page_syndrome()
1350 chip->ecc.hwctl(mtd, NAND_ECC_READSYN); in nand_read_page_syndrome()
1351 chip->read_buf(mtd, oob, eccbytes); in nand_read_page_syndrome()
1352 stat = chip->ecc.correct(mtd, p, oob, NULL); in nand_read_page_syndrome()
1355 mtd->ecc_stats.failed++; in nand_read_page_syndrome()
1357 mtd->ecc_stats.corrected += stat; in nand_read_page_syndrome()
1361 if (chip->ecc.postpad) { in nand_read_page_syndrome()
1362 chip->read_buf(mtd, oob, chip->ecc.postpad); in nand_read_page_syndrome()
1363 oob += chip->ecc.postpad; in nand_read_page_syndrome()
1368 i = mtd->oobsize - (oob - chip->oob_poi); in nand_read_page_syndrome()
1370 chip->read_buf(mtd, oob, i); in nand_read_page_syndrome()
1376 * nand_transfer_oob - [INTERN] Transfer oob to client buffer
1377 * @chip: nand chip structure
1380 * @len: size of oob to transfer
1382 static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob, in nand_transfer_oob() argument
1385 switch (ops->mode) { in nand_transfer_oob()
1389 memcpy(oob, chip->oob_poi + ops->ooboffs, len); in nand_transfer_oob()
1393 struct nand_oobfree *free = chip->ecc.layout->oobfree; in nand_transfer_oob()
1394 uint32_t boffs = 0, roffs = ops->ooboffs; in nand_transfer_oob()
1397 for (; free->length && len; free++, len -= bytes) { in nand_transfer_oob()
1400 if (roffs >= free->length) { in nand_transfer_oob()
1401 roffs -= free->length; in nand_transfer_oob()
1404 boffs = free->offset + roffs; in nand_transfer_oob()
1406 (free->length - roffs)); in nand_transfer_oob()
1409 bytes = min_t(size_t, len, free->length); in nand_transfer_oob()
1410 boffs = free->offset; in nand_transfer_oob()
1412 memcpy(oob, chip->oob_poi + boffs, bytes); in nand_transfer_oob()
1424 * nand_do_read_ops - [INTERN] Read data with ECC
1426 * @from: offset to read from
1429 * Internal function. Called with chip held.
1435 struct nand_chip *chip = mtd->priv; in nand_do_read_ops() local
1437 int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; in nand_do_read_ops()
1440 uint32_t readlen = ops->len; in nand_do_read_ops()
1441 uint32_t oobreadlen = ops->ooblen; in nand_do_read_ops()
1442 uint32_t max_oobsize = ops->mode == MTD_OPS_AUTO_OOB ? in nand_do_read_ops()
1443 mtd->oobavail : mtd->oobsize; in nand_do_read_ops()
1447 stats = mtd->ecc_stats; in nand_do_read_ops()
1449 chipnr = (int)(from >> chip->chip_shift); in nand_do_read_ops()
1450 chip->select_chip(mtd, chipnr); in nand_do_read_ops()
1452 realpage = (int)(from >> chip->page_shift); in nand_do_read_ops()
1453 page = realpage & chip->pagemask; in nand_do_read_ops()
1455 col = (int)(from & (mtd->writesize - 1)); in nand_do_read_ops()
1457 buf = ops->datbuf; in nand_do_read_ops()
1458 oob = ops->oobbuf; in nand_do_read_ops()
1461 bytes = min(mtd->writesize - col, readlen); in nand_do_read_ops()
1462 aligned = (bytes == mtd->writesize); in nand_do_read_ops()
1465 if (realpage != chip->pagebuf || oob) { in nand_do_read_ops()
1466 bufpoi = aligned ? buf : chip->buffers->databuf; in nand_do_read_ops()
1469 chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); in nand_do_read_ops()
1474 if (unlikely(ops->mode == MTD_OPS_RAW)) in nand_do_read_ops()
1475 ret = chip->ecc.read_page_raw(mtd, chip, in nand_do_read_ops()
1477 else if (!aligned && NAND_SUBPAGE_READ(chip) && !oob) in nand_do_read_ops()
1478 ret = chip->ecc.read_subpage(mtd, chip, in nand_do_read_ops()
1481 ret = chip->ecc.read_page(mtd, chip, bufpoi, in nand_do_read_ops()
1486 chip->pagebuf = -1; in nand_do_read_ops()
1492 if (!NAND_SUBPAGE_READ(chip) && !oob && in nand_do_read_ops()
1493 !(mtd->ecc_stats.failed - stats.failed) && in nand_do_read_ops()
1494 (ops->mode != MTD_OPS_RAW)) in nand_do_read_ops()
1495 chip->pagebuf = realpage; in nand_do_read_ops()
1498 chip->pagebuf = -1; in nand_do_read_ops()
1499 memcpy(buf, chip->buffers->databuf + col, bytes); in nand_do_read_ops()
1509 oob = nand_transfer_oob(chip, in nand_do_read_ops()
1511 oobreadlen -= toread; in nand_do_read_ops()
1515 if (!(chip->options & NAND_NO_READRDY)) { in nand_do_read_ops()
1519 * problems arise if a chip which does auto in nand_do_read_ops()
1523 if (!chip->dev_ready) in nand_do_read_ops()
1524 udelay(chip->chip_delay); in nand_do_read_ops()
1529 memcpy(buf, chip->buffers->databuf + col, bytes); in nand_do_read_ops()
1533 readlen -= bytes; in nand_do_read_ops()
1538 /* For subsequent reads align to page boundary */ in nand_do_read_ops()
1543 page = realpage & chip->pagemask; in nand_do_read_ops()
1544 /* Check, if we cross a chip boundary */ in nand_do_read_ops()
1547 chip->select_chip(mtd, -1); in nand_do_read_ops()
1548 chip->select_chip(mtd, chipnr); in nand_do_read_ops()
1552 * Check, if the chip supports auto page increment or if we in nand_do_read_ops()
1555 if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck)) in nand_do_read_ops()
1559 ops->retlen = ops->len - (size_t) readlen; in nand_do_read_ops()
1561 ops->oobretlen = ops->ooblen - oobreadlen; in nand_do_read_ops()
1566 if (mtd->ecc_stats.failed - stats.failed) in nand_do_read_ops()
1567 return -EBADMSG; in nand_do_read_ops()
1569 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; in nand_do_read_ops()
1573 * nand_read - [MTD Interface] MTD compatibility function for nand_do_read_ecc
1575 * @from: offset to read from
1576 * @len: number of bytes to read
1577 * @retlen: pointer to variable to store the number of read bytes
1578 * @buf: the databuffer to put data
1580 * Get hold of the chip and call nand_do_read.
1585 struct nand_chip *chip = mtd->priv; in nand_read() local
1590 if ((from + len) > mtd->size) in nand_read()
1591 return -EINVAL; in nand_read()
1595 nand_get_device(chip, mtd, FL_READING); in nand_read()
1612 * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function
1614 * @chip: nand chip info structure
1615 * @page: page number to read
1616 * @sndcmd: flag whether to issue read command or not
1618 static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip, in nand_read_oob_std() argument
1622 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); in nand_read_oob_std()
1625 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); in nand_read_oob_std()
1630 * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC
1633 * @chip: nand chip info structure
1634 * @page: page number to read
1635 * @sndcmd: flag whether to issue read command or not
1637 static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip, in nand_read_oob_syndrome() argument
1640 uint8_t *buf = chip->oob_poi; in nand_read_oob_syndrome()
1641 int length = mtd->oobsize; in nand_read_oob_syndrome()
1642 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; in nand_read_oob_syndrome()
1643 int eccsize = chip->ecc.size; in nand_read_oob_syndrome()
1647 chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page); in nand_read_oob_syndrome()
1648 for (i = 0; i < chip->ecc.steps; i++) { in nand_read_oob_syndrome()
1651 if (mtd->writesize > 512) in nand_read_oob_syndrome()
1652 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1); in nand_read_oob_syndrome()
1654 chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page); in nand_read_oob_syndrome()
1658 chip->read_buf(mtd, bufpoi, toread); in nand_read_oob_syndrome()
1660 length -= toread; in nand_read_oob_syndrome()
1663 chip->read_buf(mtd, bufpoi, length); in nand_read_oob_syndrome()
1669 * nand_write_oob_std - [REPLACEABLE] the most common OOB data write function
1671 * @chip: nand chip info structure
1672 * @page: page number to write
1674 static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip, in nand_write_oob_std() argument
1678 const uint8_t *buf = chip->oob_poi; in nand_write_oob_std()
1679 int length = mtd->oobsize; in nand_write_oob_std()
1681 chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page); in nand_write_oob_std()
1682 chip->write_buf(mtd, buf, length); in nand_write_oob_std()
1683 /* Send command to program the OOB data */ in nand_write_oob_std()
1684 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); in nand_write_oob_std()
1686 status = chip->waitfunc(mtd, chip); in nand_write_oob_std()
1688 return status & NAND_STATUS_FAIL ? -EIO : 0; in nand_write_oob_std()
1692 * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC
1693 * with syndrome - only for large page flash
1695 * @chip: nand chip info structure
1696 * @page: page number to write
1699 struct nand_chip *chip, int page) in nand_write_oob_syndrome() argument
1701 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; in nand_write_oob_syndrome()
1702 int eccsize = chip->ecc.size, length = mtd->oobsize; in nand_write_oob_syndrome()
1703 int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps; in nand_write_oob_syndrome()
1704 const uint8_t *bufpoi = chip->oob_poi; in nand_write_oob_syndrome()
1707 * data-ecc-data-ecc ... ecc-oob in nand_write_oob_syndrome()
1709 * data-pad-ecc-pad-data-pad .... ecc-pad-oob in nand_write_oob_syndrome()
1711 if (!chip->ecc.prepad && !chip->ecc.postpad) { in nand_write_oob_syndrome()
1717 chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page); in nand_write_oob_syndrome()
1720 if (mtd->writesize <= 512) { in nand_write_oob_syndrome()
1726 chip->write_buf(mtd, (uint8_t *)&fill, in nand_write_oob_syndrome()
1728 len -= num; in nand_write_oob_syndrome()
1732 chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1); in nand_write_oob_syndrome()
1737 chip->write_buf(mtd, bufpoi, len); in nand_write_oob_syndrome()
1739 length -= len; in nand_write_oob_syndrome()
1742 chip->write_buf(mtd, bufpoi, length); in nand_write_oob_syndrome()
1744 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); in nand_write_oob_syndrome()
1745 status = chip->waitfunc(mtd, chip); in nand_write_oob_syndrome()
1747 return status & NAND_STATUS_FAIL ? -EIO : 0; in nand_write_oob_syndrome()
1751 * nand_do_read_oob - [INTERN] NAND read out-of-band
1753 * @from: offset to read from
1756 * NAND read out-of-band data from the spare area.
1762 struct nand_chip *chip = mtd->priv; in nand_do_read_oob() local
1764 int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; in nand_do_read_oob()
1765 int readlen = ops->ooblen; in nand_do_read_oob()
1767 uint8_t *buf = ops->oobbuf; in nand_do_read_oob()
1772 stats = mtd->ecc_stats; in nand_do_read_oob()
1774 if (ops->mode == MTD_OPS_AUTO_OOB) in nand_do_read_oob()
1775 len = chip->ecc.layout->oobavail; in nand_do_read_oob()
1777 len = mtd->oobsize; in nand_do_read_oob()
1779 if (unlikely(ops->ooboffs >= len)) { in nand_do_read_oob()
1780 pr_debug("%s: attempt to start read outside oob\n", in nand_do_read_oob()
1782 return -EINVAL; in nand_do_read_oob()
1786 if (unlikely(from >= mtd->size || in nand_do_read_oob()
1787 ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) - in nand_do_read_oob()
1788 (from >> chip->page_shift)) * len)) { in nand_do_read_oob()
1789 pr_debug("%s: attempt to read beyond end of device\n", in nand_do_read_oob()
1791 return -EINVAL; in nand_do_read_oob()
1794 chipnr = (int)(from >> chip->chip_shift); in nand_do_read_oob()
1795 chip->select_chip(mtd, chipnr); in nand_do_read_oob()
1797 /* Shift to get page */ in nand_do_read_oob()
1798 realpage = (int)(from >> chip->page_shift); in nand_do_read_oob()
1799 page = realpage & chip->pagemask; in nand_do_read_oob()
1802 if (ops->mode == MTD_OPS_RAW) in nand_do_read_oob()
1803 sndcmd = chip->ecc.read_oob_raw(mtd, chip, page, sndcmd); in nand_do_read_oob()
1805 sndcmd = chip->ecc.read_oob(mtd, chip, page, sndcmd); in nand_do_read_oob()
1808 buf = nand_transfer_oob(chip, buf, ops, len); in nand_do_read_oob()
1810 if (!(chip->options & NAND_NO_READRDY)) { in nand_do_read_oob()
1814 * chip which does auto increment is marked as in nand_do_read_oob()
1817 if (!chip->dev_ready) in nand_do_read_oob()
1818 udelay(chip->chip_delay); in nand_do_read_oob()
1823 readlen -= len; in nand_do_read_oob()
1830 page = realpage & chip->pagemask; in nand_do_read_oob()
1831 /* Check, if we cross a chip boundary */ in nand_do_read_oob()
1834 chip->select_chip(mtd, -1); in nand_do_read_oob()
1835 chip->select_chip(mtd, chipnr); in nand_do_read_oob()
1839 * Check, if the chip supports auto page increment or if we in nand_do_read_oob()
1842 if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck)) in nand_do_read_oob()
1846 ops->oobretlen = ops->ooblen; in nand_do_read_oob()
1848 if (mtd->ecc_stats.failed - stats.failed) in nand_do_read_oob()
1849 return -EBADMSG; in nand_do_read_oob()
1851 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; in nand_do_read_oob()
1855 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
1857 * @from: offset to read from
1860 * NAND read data and/or out-of-band data.
1865 struct nand_chip *chip = mtd->priv; in nand_read_oob() local
1866 int ret = -ENOTSUPP; in nand_read_oob()
1868 ops->retlen = 0; in nand_read_oob()
1871 if (ops->datbuf && (from + ops->len) > mtd->size) { in nand_read_oob()
1872 pr_debug("%s: attempt to read beyond end of device\n", in nand_read_oob()
1874 return -EINVAL; in nand_read_oob()
1877 nand_get_device(chip, mtd, FL_READING); in nand_read_oob()
1879 switch (ops->mode) { in nand_read_oob()
1889 if (!ops->datbuf) in nand_read_oob()
1901 * nand_write_page_raw - [INTERN] raw page write function
1903 * @chip: nand chip info structure
1908 static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, in nand_write_page_raw() argument
1911 chip->write_buf(mtd, buf, mtd->writesize); in nand_write_page_raw()
1912 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); in nand_write_page_raw()
1916 * nand_write_page_raw_syndrome - [INTERN] raw page write function
1918 * @chip: nand chip info structure
1924 struct nand_chip *chip, in nand_write_page_raw_syndrome() argument
1927 int eccsize = chip->ecc.size; in nand_write_page_raw_syndrome()
1928 int eccbytes = chip->ecc.bytes; in nand_write_page_raw_syndrome()
1929 uint8_t *oob = chip->oob_poi; in nand_write_page_raw_syndrome()
1932 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_write_page_raw_syndrome()
1933 chip->write_buf(mtd, buf, eccsize); in nand_write_page_raw_syndrome()
1936 if (chip->ecc.prepad) { in nand_write_page_raw_syndrome()
1937 chip->write_buf(mtd, oob, chip->ecc.prepad); in nand_write_page_raw_syndrome()
1938 oob += chip->ecc.prepad; in nand_write_page_raw_syndrome()
1941 chip->read_buf(mtd, oob, eccbytes); in nand_write_page_raw_syndrome()
1944 if (chip->ecc.postpad) { in nand_write_page_raw_syndrome()
1945 chip->write_buf(mtd, oob, chip->ecc.postpad); in nand_write_page_raw_syndrome()
1946 oob += chip->ecc.postpad; in nand_write_page_raw_syndrome()
1950 size = mtd->oobsize - (oob - chip->oob_poi); in nand_write_page_raw_syndrome()
1952 chip->write_buf(mtd, oob, size); in nand_write_page_raw_syndrome()
1955 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
1957 * @chip: nand chip info structure
1960 static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, in nand_write_page_swecc() argument
1963 int i, eccsize = chip->ecc.size; in nand_write_page_swecc()
1964 int eccbytes = chip->ecc.bytes; in nand_write_page_swecc()
1965 int eccsteps = chip->ecc.steps; in nand_write_page_swecc()
1966 uint8_t *ecc_calc = chip->buffers->ecccalc; in nand_write_page_swecc()
1968 uint32_t *eccpos = chip->ecc.layout->eccpos; in nand_write_page_swecc()
1971 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) in nand_write_page_swecc()
1972 chip->ecc.calculate(mtd, p, &ecc_calc[i]); in nand_write_page_swecc()
1974 for (i = 0; i < chip->ecc.total; i++) in nand_write_page_swecc()
1975 chip->oob_poi[eccpos[i]] = ecc_calc[i]; in nand_write_page_swecc()
1977 chip->ecc.write_page_raw(mtd, chip, buf); in nand_write_page_swecc()
1981 * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
1983 * @chip: nand chip info structure
1986 static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, in nand_write_page_hwecc() argument
1989 int i, eccsize = chip->ecc.size; in nand_write_page_hwecc()
1990 int eccbytes = chip->ecc.bytes; in nand_write_page_hwecc()
1991 int eccsteps = chip->ecc.steps; in nand_write_page_hwecc()
1992 uint8_t *ecc_calc = chip->buffers->ecccalc; in nand_write_page_hwecc()
1994 uint32_t *eccpos = chip->ecc.layout->eccpos; in nand_write_page_hwecc()
1996 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_write_page_hwecc()
1997 chip->ecc.hwctl(mtd, NAND_ECC_WRITE); in nand_write_page_hwecc()
1998 chip->write_buf(mtd, p, eccsize); in nand_write_page_hwecc()
1999 chip->ecc.calculate(mtd, p, &ecc_calc[i]); in nand_write_page_hwecc()
2002 for (i = 0; i < chip->ecc.total; i++) in nand_write_page_hwecc()
2003 chip->oob_poi[eccpos[i]] = ecc_calc[i]; in nand_write_page_hwecc()
2005 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); in nand_write_page_hwecc()
2009 * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
2011 * @chip: nand chip info structure
2018 struct nand_chip *chip, const uint8_t *buf) in nand_write_page_syndrome() argument
2020 int i, eccsize = chip->ecc.size; in nand_write_page_syndrome()
2021 int eccbytes = chip->ecc.bytes; in nand_write_page_syndrome()
2022 int eccsteps = chip->ecc.steps; in nand_write_page_syndrome()
2024 uint8_t *oob = chip->oob_poi; in nand_write_page_syndrome()
2026 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_write_page_syndrome()
2028 chip->ecc.hwctl(mtd, NAND_ECC_WRITE); in nand_write_page_syndrome()
2029 chip->write_buf(mtd, p, eccsize); in nand_write_page_syndrome()
2031 if (chip->ecc.prepad) { in nand_write_page_syndrome()
2032 chip->write_buf(mtd, oob, chip->ecc.prepad); in nand_write_page_syndrome()
2033 oob += chip->ecc.prepad; in nand_write_page_syndrome()
2036 chip->ecc.calculate(mtd, p, oob); in nand_write_page_syndrome()
2037 chip->write_buf(mtd, oob, eccbytes); in nand_write_page_syndrome()
2040 if (chip->ecc.postpad) { in nand_write_page_syndrome()
2041 chip->write_buf(mtd, oob, chip->ecc.postpad); in nand_write_page_syndrome()
2042 oob += chip->ecc.postpad; in nand_write_page_syndrome()
2047 i = mtd->oobsize - (oob - chip->oob_poi); in nand_write_page_syndrome()
2049 chip->write_buf(mtd, oob, i); in nand_write_page_syndrome()
2053 * nand_write_page - [REPLACEABLE] write one page
2055 * @chip: NAND chip descriptor
2056 * @buf: the data to write
2057 * @page: page number to write
2061 static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, in nand_write_page() argument
2066 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); in nand_write_page()
2069 chip->ecc.write_page_raw(mtd, chip, buf); in nand_write_page()
2071 chip->ecc.write_page(mtd, chip, buf); in nand_write_page()
2075 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s). in nand_write_page()
2079 if (!cached || !(chip->options & NAND_CACHEPRG)) { in nand_write_page()
2081 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); in nand_write_page()
2082 status = chip->waitfunc(mtd, chip); in nand_write_page()
2087 if ((status & NAND_STATUS_FAIL) && (chip->errstat)) in nand_write_page()
2088 status = chip->errstat(mtd, chip, FL_WRITING, status, in nand_write_page()
2092 return -EIO; in nand_write_page()
2094 chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1); in nand_write_page()
2095 status = chip->waitfunc(mtd, chip); in nand_write_page()
2099 /* Send command to read back the data */ in nand_write_page()
2100 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); in nand_write_page()
2102 if (chip->verify_buf(mtd, buf, mtd->writesize)) in nand_write_page()
2103 return -EIO; in nand_write_page()
2109 * nand_fill_oob - [INTERN] Transfer client buffer to oob
2118 struct nand_chip *chip = mtd->priv; in nand_fill_oob() local
2121 * Initialise to all 0xFF, to avoid the possibility of left over OOB in nand_fill_oob()
2124 memset(chip->oob_poi, 0xff, mtd->oobsize); in nand_fill_oob()
2126 switch (ops->mode) { in nand_fill_oob()
2130 memcpy(chip->oob_poi + ops->ooboffs, oob, len); in nand_fill_oob()
2134 struct nand_oobfree *free = chip->ecc.layout->oobfree; in nand_fill_oob()
2135 uint32_t boffs = 0, woffs = ops->ooboffs; in nand_fill_oob()
2138 for (; free->length && len; free++, len -= bytes) { in nand_fill_oob()
2141 if (woffs >= free->length) { in nand_fill_oob()
2142 woffs -= free->length; in nand_fill_oob()
2145 boffs = free->offset + woffs; in nand_fill_oob()
2147 (free->length - woffs)); in nand_fill_oob()
2150 bytes = min_t(size_t, len, free->length); in nand_fill_oob()
2151 boffs = free->offset; in nand_fill_oob()
2153 memcpy(chip->oob_poi + boffs, oob, bytes); in nand_fill_oob()
2164 #define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0)
2167 * nand_do_write_ops - [INTERN] NAND write with ECC
2169 * @to: offset to write to
2174 static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, in nand_do_write_ops() argument
2178 struct nand_chip *chip = mtd->priv; in nand_do_write_ops() local
2179 uint32_t writelen = ops->len; in nand_do_write_ops()
2181 uint32_t oobwritelen = ops->ooblen; in nand_do_write_ops()
2182 uint32_t oobmaxlen = ops->mode == MTD_OPS_AUTO_OOB ? in nand_do_write_ops()
2183 mtd->oobavail : mtd->oobsize; in nand_do_write_ops()
2185 uint8_t *oob = ops->oobbuf; in nand_do_write_ops()
2186 uint8_t *buf = ops->datbuf; in nand_do_write_ops()
2189 ops->retlen = 0; in nand_do_write_ops()
2194 if (NOTALIGNED(to) || NOTALIGNED(ops->len)) { in nand_do_write_ops()
2195 pr_notice("%s: attempt to write non page aligned data\n", in nand_do_write_ops()
2197 return -EINVAL; in nand_do_write_ops()
2200 column = to & (mtd->writesize - 1); in nand_do_write_ops()
2201 subpage = column || (writelen & (mtd->writesize - 1)); in nand_do_write_ops()
2204 return -EINVAL; in nand_do_write_ops()
2206 chipnr = (int)(to >> chip->chip_shift); in nand_do_write_ops()
2207 chip->select_chip(mtd, chipnr); in nand_do_write_ops()
2211 return -EIO; in nand_do_write_ops()
2213 realpage = (int)(to >> chip->page_shift); in nand_do_write_ops()
2214 page = realpage & chip->pagemask; in nand_do_write_ops()
2215 blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; in nand_do_write_ops()
2217 /* Invalidate the page cache, when we write to the cached page */ in nand_do_write_ops()
2218 if (to <= (chip->pagebuf << chip->page_shift) && in nand_do_write_ops()
2219 (chip->pagebuf << chip->page_shift) < (to + ops->len)) in nand_do_write_ops()
2220 chip->pagebuf = -1; in nand_do_write_ops()
2223 if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) in nand_do_write_ops()
2224 return -EINVAL; in nand_do_write_ops()
2227 int bytes = mtd->writesize; in nand_do_write_ops()
2232 if (unlikely(column || writelen < (mtd->writesize - 1))) { in nand_do_write_ops()
2234 bytes = min_t(int, bytes - column, (int) writelen); in nand_do_write_ops()
2235 chip->pagebuf = -1; in nand_do_write_ops()
2236 memset(chip->buffers->databuf, 0xff, mtd->writesize); in nand_do_write_ops()
2237 memcpy(&chip->buffers->databuf[column], buf, bytes); in nand_do_write_ops()
2238 wbuf = chip->buffers->databuf; in nand_do_write_ops()
2244 oobwritelen -= len; in nand_do_write_ops()
2246 /* We still need to erase leftover OOB data */ in nand_do_write_ops()
2247 memset(chip->oob_poi, 0xff, mtd->oobsize); in nand_do_write_ops()
2250 ret = chip->write_page(mtd, chip, wbuf, page, cached, in nand_do_write_ops()
2251 (ops->mode == MTD_OPS_RAW)); in nand_do_write_ops()
2255 writelen -= bytes; in nand_do_write_ops()
2263 page = realpage & chip->pagemask; in nand_do_write_ops()
2264 /* Check, if we cross a chip boundary */ in nand_do_write_ops()
2267 chip->select_chip(mtd, -1); in nand_do_write_ops()
2268 chip->select_chip(mtd, chipnr); in nand_do_write_ops()
2272 ops->retlen = ops->len - writelen; in nand_do_write_ops()
2274 ops->oobretlen = ops->ooblen; in nand_do_write_ops()
2279 * panic_nand_write - [MTD Interface] NAND write with ECC
2281 * @to: offset to write to
2282 * @len: number of bytes to write
2283 * @retlen: pointer to variable to store the number of written bytes
2284 * @buf: the data to write
2289 static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len, in panic_nand_write() argument
2292 struct nand_chip *chip = mtd->priv; in panic_nand_write() local
2297 if ((to + len) > mtd->size) in panic_nand_write()
2298 return -EINVAL; in panic_nand_write()
2302 /* Wait for the device to get ready */ in panic_nand_write()
2303 panic_nand_wait(mtd, chip, 400); in panic_nand_write()
2306 panic_nand_get_device(chip, mtd, FL_WRITING); in panic_nand_write()
2313 ret = nand_do_write_ops(mtd, to, &ops); in panic_nand_write()
2320 * nand_write - [MTD Interface] NAND write with ECC
2322 * @to: offset to write to
2323 * @len: number of bytes to write
2324 * @retlen: pointer to variable to store the number of written bytes
2325 * @buf: the data to write
2329 static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, in nand_write() argument
2332 struct nand_chip *chip = mtd->priv; in nand_write() local
2337 if ((to + len) > mtd->size) in nand_write()
2338 return -EINVAL; in nand_write()
2342 nand_get_device(chip, mtd, FL_WRITING); in nand_write()
2349 ret = nand_do_write_ops(mtd, to, &ops); in nand_write()
2359 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
2361 * @to: offset to write to
2364 * NAND write out-of-band.
2366 static int nand_do_write_oob(struct mtd_info *mtd, loff_t to, in nand_do_write_oob() argument
2370 struct nand_chip *chip = mtd->priv; in nand_do_write_oob() local
2372 pr_debug("%s: to = 0x%08x, len = %i\n", in nand_do_write_oob()
2373 __func__, (unsigned int)to, (int)ops->ooblen); in nand_do_write_oob()
2375 if (ops->mode == MTD_OPS_AUTO_OOB) in nand_do_write_oob()
2376 len = chip->ecc.layout->oobavail; in nand_do_write_oob()
2378 len = mtd->oobsize; in nand_do_write_oob()
2381 if ((ops->ooboffs + ops->ooblen) > len) { in nand_do_write_oob()
2382 pr_debug("%s: attempt to write past end of page\n", in nand_do_write_oob()
2384 return -EINVAL; in nand_do_write_oob()
2387 if (unlikely(ops->ooboffs >= len)) { in nand_do_write_oob()
2388 pr_debug("%s: attempt to start write outside oob\n", in nand_do_write_oob()
2390 return -EINVAL; in nand_do_write_oob()
2394 if (unlikely(to >= mtd->size || in nand_do_write_oob()
2395 ops->ooboffs + ops->ooblen > in nand_do_write_oob()
2396 ((mtd->size >> chip->page_shift) - in nand_do_write_oob()
2397 (to >> chip->page_shift)) * len)) { in nand_do_write_oob()
2398 pr_debug("%s: attempt to write beyond end of device\n", in nand_do_write_oob()
2400 return -EINVAL; in nand_do_write_oob()
2403 chipnr = (int)(to >> chip->chip_shift); in nand_do_write_oob()
2404 chip->select_chip(mtd, chipnr); in nand_do_write_oob()
2406 /* Shift to get page */ in nand_do_write_oob()
2407 page = (int)(to >> chip->page_shift); in nand_do_write_oob()
2410 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one in nand_do_write_oob()
2412 * if we don't do this. I have no clue why, but I seem to have 'fixed' in nand_do_write_oob()
2415 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); in nand_do_write_oob()
2419 return -EROFS; in nand_do_write_oob()
2421 /* Invalidate the page cache, if we write to the cached page */ in nand_do_write_oob()
2422 if (page == chip->pagebuf) in nand_do_write_oob()
2423 chip->pagebuf = -1; in nand_do_write_oob()
2425 nand_fill_oob(mtd, ops->oobbuf, ops->ooblen, ops); in nand_do_write_oob()
2427 if (ops->mode == MTD_OPS_RAW) in nand_do_write_oob()
2428 status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask); in nand_do_write_oob()
2430 status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask); in nand_do_write_oob()
2435 ops->oobretlen = ops->ooblen; in nand_do_write_oob()
2441 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
2443 * @to: offset to write to
2446 static int nand_write_oob(struct mtd_info *mtd, loff_t to, in nand_write_oob() argument
2449 struct nand_chip *chip = mtd->priv; in nand_write_oob() local
2450 int ret = -ENOTSUPP; in nand_write_oob()
2452 ops->retlen = 0; in nand_write_oob()
2455 if (ops->datbuf && (to + ops->len) > mtd->size) { in nand_write_oob()
2456 pr_debug("%s: attempt to write beyond end of device\n", in nand_write_oob()
2458 return -EINVAL; in nand_write_oob()
2461 nand_get_device(chip, mtd, FL_WRITING); in nand_write_oob()
2463 switch (ops->mode) { in nand_write_oob()
2473 if (!ops->datbuf) in nand_write_oob()
2474 ret = nand_do_write_oob(mtd, to, ops); in nand_write_oob()
2476 ret = nand_do_write_ops(mtd, to, ops); in nand_write_oob()
2484 * single_erase_cmd - [GENERIC] NAND standard block erase command function
2492 struct nand_chip *chip = mtd->priv; in single_erase_cmd() local
2493 /* Send commands to erase a block */ in single_erase_cmd()
2494 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); in single_erase_cmd()
2495 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); in single_erase_cmd()
2499 * multi_erase_cmd - [GENERIC] AND specific block erase command function
2507 struct nand_chip *chip = mtd->priv; in multi_erase_cmd() local
2508 /* Send commands to erase a block */ in multi_erase_cmd()
2509 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); in multi_erase_cmd()
2510 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); in multi_erase_cmd()
2511 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); in multi_erase_cmd()
2512 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); in multi_erase_cmd()
2513 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); in multi_erase_cmd()
2517 * nand_erase - [MTD Interface] erase block(s)
2530 * nand_erase_nand - [INTERN] erase block(s)
2541 struct nand_chip *chip = mtd->priv; in nand_erase_nand() local
2547 __func__, (unsigned long long)instr->addr, in nand_erase_nand()
2548 (unsigned long long)instr->len); in nand_erase_nand()
2550 if (check_offs_len(mtd, instr->addr, instr->len)) in nand_erase_nand()
2551 return -EINVAL; in nand_erase_nand()
2553 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; in nand_erase_nand()
2556 nand_get_device(chip, mtd, FL_ERASING); in nand_erase_nand()
2558 /* Shift to get first page */ in nand_erase_nand()
2559 page = (int)(instr->addr >> chip->page_shift); in nand_erase_nand()
2560 chipnr = (int)(instr->addr >> chip->chip_shift); in nand_erase_nand()
2563 pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift); in nand_erase_nand()
2566 chip->select_chip(mtd, chipnr); in nand_erase_nand()
2572 instr->state = MTD_ERASE_FAILED; in nand_erase_nand()
2577 * If BBT requires refresh, set the BBT page mask to see if the BBT in nand_erase_nand()
2578 * should be rewritten. Otherwise the mask is set to 0xffffffff which in nand_erase_nand()
2580 * erased to avoid recursive updates. in nand_erase_nand()
2582 if (chip->options & BBT_AUTO_REFRESH && !allowbbt) in nand_erase_nand()
2583 bbt_masked_page = chip->bbt_td->pages[chipnr] & BBT_PAGE_MASK; in nand_erase_nand()
2586 len = instr->len; in nand_erase_nand()
2588 instr->state = MTD_ERASING; in nand_erase_nand()
2593 chip->page_shift, 0, allowbbt)) { in nand_erase_nand()
2594 pr_warn("%s: attempt to erase a bad block at page 0x%08x\n", in nand_erase_nand()
2596 instr->state = MTD_ERASE_FAILED; in nand_erase_nand()
2604 if (page <= chip->pagebuf && chip->pagebuf < in nand_erase_nand()
2606 chip->pagebuf = -1; in nand_erase_nand()
2608 chip->erase_cmd(mtd, page & chip->pagemask); in nand_erase_nand()
2610 status = chip->waitfunc(mtd, chip); in nand_erase_nand()
2616 if ((status & NAND_STATUS_FAIL) && (chip->errstat)) in nand_erase_nand()
2617 status = chip->errstat(mtd, chip, FL_ERASING, in nand_erase_nand()
2624 instr->state = MTD_ERASE_FAILED; in nand_erase_nand()
2625 instr->fail_addr = in nand_erase_nand()
2626 ((loff_t)page << chip->page_shift); in nand_erase_nand()
2631 * If BBT requires refresh, set the BBT rewrite flag to the in nand_erase_nand()
2637 ((loff_t)page << chip->page_shift); in nand_erase_nand()
2640 len -= (1 << chip->phys_erase_shift); in nand_erase_nand()
2643 /* Check, if we cross a chip boundary */ in nand_erase_nand()
2644 if (len && !(page & chip->pagemask)) { in nand_erase_nand()
2646 chip->select_chip(mtd, -1); in nand_erase_nand()
2647 chip->select_chip(mtd, chipnr); in nand_erase_nand()
2650 * If BBT requires refresh and BBT-PERCHIP, set the BBT in nand_erase_nand()
2651 * page mask to see if this BBT should be rewritten. in nand_erase_nand()
2654 (chip->bbt_td->options & NAND_BBT_PERCHIP)) in nand_erase_nand()
2655 bbt_masked_page = chip->bbt_td->pages[chipnr] & in nand_erase_nand()
2659 instr->state = MTD_ERASE_DONE; in nand_erase_nand()
2663 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; in nand_erase_nand()
2679 for (chipnr = 0; chipnr < chip->numchips; chipnr++) { in nand_erase_nand()
2682 /* Update the BBT for chip */ in nand_erase_nand()
2685 chip->bbt_td->pages[chipnr]); in nand_erase_nand()
2694 * nand_sync - [MTD Interface] sync
2697 * Sync is actually a wait for chip ready function.
2701 struct nand_chip *chip = mtd->priv; in nand_sync() local
2706 nand_get_device(chip, mtd, FL_SYNCING); in nand_sync()
2712 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
2714 * @offs: offset relative to mtd start
2719 if (offs > mtd->size) in nand_block_isbad()
2720 return -EINVAL; in nand_block_isbad()
2726 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
2728 * @ofs: offset relative to mtd start
2732 struct nand_chip *chip = mtd->priv; in nand_block_markbad() local
2743 return chip->block_markbad(mtd, ofs); in nand_block_markbad()
2747 * nand_suspend - [MTD Interface] Suspend the NAND flash
2752 struct nand_chip *chip = mtd->priv; in nand_suspend() local
2754 return nand_get_device(chip, mtd, FL_PM_SUSPENDED); in nand_suspend()
2758 * nand_resume - [MTD Interface] Resume the NAND flash
2763 struct nand_chip *chip = mtd->priv; in nand_resume() local
2765 if (chip->state == FL_PM_SUSPENDED) in nand_resume()
2768 pr_err("%s called for a chip which is not in suspended state\n", in nand_resume()
2773 static void nand_set_defaults(struct nand_chip *chip, int busw) in nand_set_defaults() argument
2776 if (!chip->chip_delay) in nand_set_defaults()
2777 chip->chip_delay = 20; in nand_set_defaults()
2780 if (chip->cmdfunc == NULL) in nand_set_defaults()
2781 chip->cmdfunc = nand_command; in nand_set_defaults()
2784 if (chip->waitfunc == NULL) in nand_set_defaults()
2785 chip->waitfunc = nand_wait; in nand_set_defaults()
2787 if (!chip->select_chip) in nand_set_defaults()
2788 chip->select_chip = nand_select_chip; in nand_set_defaults()
2789 if (!chip->read_byte) in nand_set_defaults()
2790 chip->read_byte = busw ? nand_read_byte16 : nand_read_byte; in nand_set_defaults()
2791 if (!chip->read_word) in nand_set_defaults()
2792 chip->read_word = nand_read_word; in nand_set_defaults()
2793 if (!chip->block_bad) in nand_set_defaults()
2794 chip->block_bad = nand_block_bad; in nand_set_defaults()
2795 if (!chip->block_markbad) in nand_set_defaults()
2796 chip->block_markbad = nand_default_block_markbad; in nand_set_defaults()
2797 if (!chip->write_buf) in nand_set_defaults()
2798 chip->write_buf = busw ? nand_write_buf16 : nand_write_buf; in nand_set_defaults()
2799 if (!chip->read_buf) in nand_set_defaults()
2800 chip->read_buf = busw ? nand_read_buf16 : nand_read_buf; in nand_set_defaults()
2801 if (!chip->verify_buf) in nand_set_defaults()
2802 chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf; in nand_set_defaults()
2803 if (!chip->scan_bbt) in nand_set_defaults()
2804 chip->scan_bbt = nand_default_bbt; in nand_set_defaults()
2806 if (!chip->controller) { in nand_set_defaults()
2807 chip->controller = &chip->hwcontrol; in nand_set_defaults()
2808 spin_lock_init(&chip->controller->lock); in nand_set_defaults()
2809 init_waitqueue_head(&chip->controller->wq); in nand_set_defaults()
2820 s[len - 1] = 0; in sanitize_string()
2823 for (i = 0; i < len - 1; i++) { in sanitize_string()
2835 while (len--) { in onfi_crc16()
2845 * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise.
2847 static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip, in nand_flash_detect_onfi() argument
2850 struct nand_onfi_params *p = &chip->onfi_params; in nand_flash_detect_onfi()
2854 /* Try ONFI for unknown chip or LP */ in nand_flash_detect_onfi()
2855 chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1); in nand_flash_detect_onfi()
2856 if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' || in nand_flash_detect_onfi()
2857 chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I') in nand_flash_detect_onfi()
2861 chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1); in nand_flash_detect_onfi()
2863 chip->read_buf(mtd, (uint8_t *)p, sizeof(*p)); in nand_flash_detect_onfi()
2865 le16_to_cpu(p->crc)) { in nand_flash_detect_onfi()
2875 val = le16_to_cpu(p->revision); in nand_flash_detect_onfi()
2877 chip->onfi_version = 23; in nand_flash_detect_onfi()
2879 chip->onfi_version = 22; in nand_flash_detect_onfi()
2881 chip->onfi_version = 21; in nand_flash_detect_onfi()
2883 chip->onfi_version = 20; in nand_flash_detect_onfi()
2885 chip->onfi_version = 10; in nand_flash_detect_onfi()
2887 chip->onfi_version = 0; in nand_flash_detect_onfi()
2889 if (!chip->onfi_version) { in nand_flash_detect_onfi()
2894 sanitize_string(p->manufacturer, sizeof(p->manufacturer)); in nand_flash_detect_onfi()
2895 sanitize_string(p->model, sizeof(p->model)); in nand_flash_detect_onfi()
2896 if (!mtd->name) in nand_flash_detect_onfi()
2897 mtd->name = p->model; in nand_flash_detect_onfi()
2898 mtd->writesize = le32_to_cpu(p->byte_per_page); in nand_flash_detect_onfi()
2899 mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize; in nand_flash_detect_onfi()
2900 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page); in nand_flash_detect_onfi()
2901 chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize; in nand_flash_detect_onfi()
2903 if (le16_to_cpu(p->features) & 1) in nand_flash_detect_onfi()
2906 chip->options &= ~NAND_CHIPOPTIONS_MSK; in nand_flash_detect_onfi()
2907 chip->options |= (NAND_NO_READRDY | in nand_flash_detect_onfi()
2917 struct nand_chip *chip, in nand_get_flash_type() argument
2927 chip->select_chip(mtd, 0); in nand_get_flash_type()
2930 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx) in nand_get_flash_type()
2931 * after power-up. in nand_get_flash_type()
2933 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); in nand_get_flash_type()
2936 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); in nand_get_flash_type()
2939 *maf_id = chip->read_byte(mtd); in nand_get_flash_type()
2940 *dev_id = chip->read_byte(mtd); in nand_get_flash_type()
2943 * Try again to make sure, as some systems the bus-hold or other in nand_get_flash_type()
2945 * possibly credible NAND flash to appear. If the two results do in nand_get_flash_type()
2949 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); in nand_get_flash_type()
2952 id_data[i] = chip->read_byte(mtd); in nand_get_flash_type()
2958 return ERR_PTR(-ENODEV); in nand_get_flash_type()
2964 for (; type->name != NULL; type++) in nand_get_flash_type()
2965 if (*dev_id == type->id) in nand_get_flash_type()
2968 chip->onfi_version = 0; in nand_get_flash_type()
2969 if (!type->name || !type->pagesize) { in nand_get_flash_type()
2970 /* Check is chip is ONFI compliant */ in nand_get_flash_type()
2971 ret = nand_flash_detect_onfi(mtd, chip, &busw); in nand_get_flash_type()
2976 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); in nand_get_flash_type()
2981 id_data[i] = chip->read_byte(mtd); in nand_get_flash_type()
2983 if (!type->name) in nand_get_flash_type()
2984 return ERR_PTR(-ENODEV); in nand_get_flash_type()
2986 if (!mtd->name) in nand_get_flash_type()
2987 mtd->name = type->name; in nand_get_flash_type()
2989 chip->chipsize = (uint64_t)type->chipsize << 20; in nand_get_flash_type()
2991 if (!type->pagesize && chip->init_size) { in nand_get_flash_type()
2993 busw = chip->init_size(mtd, chip, id_data); in nand_get_flash_type()
2994 } else if (!type->pagesize) { in nand_get_flash_type()
2997 chip->cellinfo = id_data[2]; in nand_get_flash_type()
3007 * to decide what to do. in nand_get_flash_type()
3011 (chip->cellinfo & NAND_CI_CELLTYPE_MSK) && in nand_get_flash_type()
3014 mtd->writesize = 2048 << (extid & 0x03); in nand_get_flash_type()
3019 mtd->oobsize = 128; in nand_get_flash_type()
3022 mtd->oobsize = 218; in nand_get_flash_type()
3025 mtd->oobsize = 400; in nand_get_flash_type()
3028 mtd->oobsize = 436; in nand_get_flash_type()
3033 mtd->erasesize = (128 * 1024) << in nand_get_flash_type()
3038 mtd->writesize = 1024 << (extid & 0x03); in nand_get_flash_type()
3041 mtd->oobsize = (8 << (extid & 0x01)) * in nand_get_flash_type()
3042 (mtd->writesize >> 9); in nand_get_flash_type()
3045 mtd->erasesize = (64 * 1024) << (extid & 0x03); in nand_get_flash_type()
3052 * Old devices have chip data hardcoded in the device id table. in nand_get_flash_type()
3054 mtd->erasesize = type->erasesize; in nand_get_flash_type()
3055 mtd->writesize = type->pagesize; in nand_get_flash_type()
3056 mtd->oobsize = mtd->writesize / 32; in nand_get_flash_type()
3057 busw = type->options & NAND_BUSWIDTH_16; in nand_get_flash_type()
3063 * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39) in nand_get_flash_type()
3067 id_data[7] == 0x00 && mtd->writesize == 512) { in nand_get_flash_type()
3068 mtd->erasesize = 128 * 1024; in nand_get_flash_type()
3069 mtd->erasesize <<= ((id_data[3] & 0x03) << 1); in nand_get_flash_type()
3072 /* Get chip options, preserve non chip based options */ in nand_get_flash_type()
3073 chip->options &= ~NAND_CHIPOPTIONS_MSK; in nand_get_flash_type()
3074 chip->options |= type->options & NAND_CHIPOPTIONS_MSK; in nand_get_flash_type()
3077 * Check if chip is not a Samsung device. Do not clear the in nand_get_flash_type()
3080 if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize) in nand_get_flash_type()
3081 chip->options &= ~NAND_SAMSUNG_LP_OPTIONS; in nand_get_flash_type()
3085 * Set chip as a default. Board drivers can override it, if necessary. in nand_get_flash_type()
3087 chip->options |= NAND_NO_AUTOINCR; in nand_get_flash_type()
3089 /* Try to identify manufacturer */ in nand_get_flash_type()
3097 * chip correct! in nand_get_flash_type()
3099 if (busw != (chip->options & NAND_BUSWIDTH_16)) { in nand_get_flash_type()
3101 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, in nand_get_flash_type()
3102 *dev_id, nand_manuf_ids[maf_idx].name, mtd->name); in nand_get_flash_type()
3104 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8, in nand_get_flash_type()
3106 return ERR_PTR(-EINVAL); in nand_get_flash_type()
3110 chip->page_shift = ffs(mtd->writesize) - 1; in nand_get_flash_type()
3111 /* Convert chipsize to number of pages per chip -1 */ in nand_get_flash_type()
3112 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; in nand_get_flash_type()
3114 chip->bbt_erase_shift = chip->phys_erase_shift = in nand_get_flash_type()
3115 ffs(mtd->erasesize) - 1; in nand_get_flash_type()
3116 if (chip->chipsize & 0xffffffff) in nand_get_flash_type()
3117 chip->chip_shift = ffs((unsigned)chip->chipsize) - 1; in nand_get_flash_type()
3119 chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32)); in nand_get_flash_type()
3120 chip->chip_shift += 32 - 1; in nand_get_flash_type()
3123 chip->badblockbits = 8; in nand_get_flash_type()
3126 if (mtd->writesize > 512 || (busw & NAND_BUSWIDTH_16)) in nand_get_flash_type()
3127 chip->badblockpos = NAND_LARGE_BADBLOCK_POS; in nand_get_flash_type()
3129 chip->badblockpos = NAND_SMALL_BADBLOCK_POS; in nand_get_flash_type()
3138 if ((chip->cellinfo & NAND_CI_CELLTYPE_MSK) && in nand_get_flash_type()
3141 chip->bbt_options |= NAND_BBT_SCANLASTPAGE; in nand_get_flash_type()
3142 else if ((!(chip->cellinfo & NAND_CI_CELLTYPE_MSK) && in nand_get_flash_type()
3148 (mtd->writesize == 2048 && in nand_get_flash_type()
3150 chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; in nand_get_flash_type()
3153 if (chip->options & NAND_4PAGE_ARRAY) in nand_get_flash_type()
3154 chip->erase_cmd = multi_erase_cmd; in nand_get_flash_type()
3156 chip->erase_cmd = single_erase_cmd; in nand_get_flash_type()
3159 if (mtd->writesize > 512 && chip->cmdfunc == nand_command) in nand_get_flash_type()
3160 chip->cmdfunc = nand_command_lp; in nand_get_flash_type()
3163 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, *dev_id, in nand_get_flash_type()
3165 chip->onfi_version ? chip->onfi_params.model : type->name); in nand_get_flash_type()
3171 * nand_scan_ident - [NAND Interface] Scan for the NAND device
3173 * @maxchips: number of chips to scan for
3179 * The mtd->owner field must be set to the module of the caller.
3185 struct nand_chip *chip = mtd->priv; in nand_scan_ident() local
3188 /* Get buswidth to select the correct functions */ in nand_scan_ident()
3189 busw = chip->options & NAND_BUSWIDTH_16; in nand_scan_ident()
3191 nand_set_defaults(chip, busw); in nand_scan_ident()
3194 type = nand_get_flash_type(mtd, chip, busw, in nand_scan_ident()
3198 if (!(chip->options & NAND_SCAN_SILENT_NODEV)) in nand_scan_ident()
3200 chip->select_chip(mtd, -1); in nand_scan_ident()
3204 /* Check for a chip array */ in nand_scan_ident()
3206 chip->select_chip(mtd, i); in nand_scan_ident()
3208 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); in nand_scan_ident()
3210 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); in nand_scan_ident()
3212 if (nand_maf_id != chip->read_byte(mtd) || in nand_scan_ident()
3213 nand_dev_id != chip->read_byte(mtd)) in nand_scan_ident()
3220 chip->numchips = i; in nand_scan_ident()
3221 mtd->size = i * chip->chipsize; in nand_scan_ident()
3229 * nand_scan_tail - [NAND Interface] Scan for the NAND device
3239 struct nand_chip *chip = mtd->priv; in nand_scan_tail() local
3241 if (!(chip->options & NAND_OWN_BUFFERS)) in nand_scan_tail()
3242 chip->buffers = kmalloc(sizeof(*chip->buffers), GFP_KERNEL); in nand_scan_tail()
3243 if (!chip->buffers) in nand_scan_tail()
3244 return -ENOMEM; in nand_scan_tail()
3247 chip->oob_poi = chip->buffers->databuf + mtd->writesize; in nand_scan_tail()
3252 if (!chip->ecc.layout && (chip->ecc.mode != NAND_ECC_SOFT_BCH)) { in nand_scan_tail()
3253 switch (mtd->oobsize) { in nand_scan_tail()
3255 chip->ecc.layout = &nand_oob_8; in nand_scan_tail()
3258 chip->ecc.layout = &nand_oob_16; in nand_scan_tail()
3261 chip->ecc.layout = &nand_oob_64; in nand_scan_tail()
3264 chip->ecc.layout = &nand_oob_128; in nand_scan_tail()
3268 mtd->oobsize); in nand_scan_tail()
3273 if (!chip->write_page) in nand_scan_tail()
3274 chip->write_page = nand_write_page; in nand_scan_tail()
3277 * Check ECC mode, default to software if 3byte/512byte hardware ECC is in nand_scan_tail()
3278 * selected and we have 256 byte pagesize fallback to software ECC in nand_scan_tail()
3281 switch (chip->ecc.mode) { in nand_scan_tail()
3283 /* Similar to NAND_ECC_HW, but a separate read_page handle */ in nand_scan_tail()
3284 if (!chip->ecc.calculate || !chip->ecc.correct || in nand_scan_tail()
3285 !chip->ecc.hwctl) { in nand_scan_tail()
3290 if (!chip->ecc.read_page) in nand_scan_tail()
3291 chip->ecc.read_page = nand_read_page_hwecc_oob_first; in nand_scan_tail()
3295 if (!chip->ecc.read_page) in nand_scan_tail()
3296 chip->ecc.read_page = nand_read_page_hwecc; in nand_scan_tail()
3297 if (!chip->ecc.write_page) in nand_scan_tail()
3298 chip->ecc.write_page = nand_write_page_hwecc; in nand_scan_tail()
3299 if (!chip->ecc.read_page_raw) in nand_scan_tail()
3300 chip->ecc.read_page_raw = nand_read_page_raw; in nand_scan_tail()
3301 if (!chip->ecc.write_page_raw) in nand_scan_tail()
3302 chip->ecc.write_page_raw = nand_write_page_raw; in nand_scan_tail()
3303 if (!chip->ecc.read_oob) in nand_scan_tail()
3304 chip->ecc.read_oob = nand_read_oob_std; in nand_scan_tail()
3305 if (!chip->ecc.write_oob) in nand_scan_tail()
3306 chip->ecc.write_oob = nand_write_oob_std; in nand_scan_tail()
3309 if ((!chip->ecc.calculate || !chip->ecc.correct || in nand_scan_tail()
3310 !chip->ecc.hwctl) && in nand_scan_tail()
3311 (!chip->ecc.read_page || in nand_scan_tail()
3312 chip->ecc.read_page == nand_read_page_hwecc || in nand_scan_tail()
3313 !chip->ecc.write_page || in nand_scan_tail()
3314 chip->ecc.write_page == nand_write_page_hwecc)) { in nand_scan_tail()
3320 if (!chip->ecc.read_page) in nand_scan_tail()
3321 chip->ecc.read_page = nand_read_page_syndrome; in nand_scan_tail()
3322 if (!chip->ecc.write_page) in nand_scan_tail()
3323 chip->ecc.write_page = nand_write_page_syndrome; in nand_scan_tail()
3324 if (!chip->ecc.read_page_raw) in nand_scan_tail()
3325 chip->ecc.read_page_raw = nand_read_page_raw_syndrome; in nand_scan_tail()
3326 if (!chip->ecc.write_page_raw) in nand_scan_tail()
3327 chip->ecc.write_page_raw = nand_write_page_raw_syndrome; in nand_scan_tail()
3328 if (!chip->ecc.read_oob) in nand_scan_tail()
3329 chip->ecc.read_oob = nand_read_oob_syndrome; in nand_scan_tail()
3330 if (!chip->ecc.write_oob) in nand_scan_tail()
3331 chip->ecc.write_oob = nand_write_oob_syndrome; in nand_scan_tail()
3333 if (mtd->writesize >= chip->ecc.size) in nand_scan_tail()
3336 "%d byte page size, fallback to SW ECC\n", in nand_scan_tail()
3337 chip->ecc.size, mtd->writesize); in nand_scan_tail()
3338 chip->ecc.mode = NAND_ECC_SOFT; in nand_scan_tail()
3341 chip->ecc.calculate = nand_calculate_ecc; in nand_scan_tail()
3342 chip->ecc.correct = nand_correct_data; in nand_scan_tail()
3343 chip->ecc.read_page = nand_read_page_swecc; in nand_scan_tail()
3344 chip->ecc.read_subpage = nand_read_subpage; in nand_scan_tail()
3345 chip->ecc.write_page = nand_write_page_swecc; in nand_scan_tail()
3346 chip->ecc.read_page_raw = nand_read_page_raw; in nand_scan_tail()
3347 chip->ecc.write_page_raw = nand_write_page_raw; in nand_scan_tail()
3348 chip->ecc.read_oob = nand_read_oob_std; in nand_scan_tail()
3349 chip->ecc.write_oob = nand_write_oob_std; in nand_scan_tail()
3350 if (!chip->ecc.size) in nand_scan_tail()
3351 chip->ecc.size = 256; in nand_scan_tail()
3352 chip->ecc.bytes = 3; in nand_scan_tail()
3360 chip->ecc.calculate = nand_bch_calculate_ecc; in nand_scan_tail()
3361 chip->ecc.correct = nand_bch_correct_data; in nand_scan_tail()
3362 chip->ecc.read_page = nand_read_page_swecc; in nand_scan_tail()
3363 chip->ecc.read_subpage = nand_read_subpage; in nand_scan_tail()
3364 chip->ecc.write_page = nand_write_page_swecc; in nand_scan_tail()
3365 chip->ecc.read_page_raw = nand_read_page_raw; in nand_scan_tail()
3366 chip->ecc.write_page_raw = nand_write_page_raw; in nand_scan_tail()
3367 chip->ecc.read_oob = nand_read_oob_std; in nand_scan_tail()
3368 chip->ecc.write_oob = nand_write_oob_std; in nand_scan_tail()
3370 * Board driver should supply ecc.size and ecc.bytes values to in nand_scan_tail()
3372 * for details. Otherwise, default to 4 bits for large page in nand_scan_tail()
3375 if (!chip->ecc.size && (mtd->oobsize >= 64)) { in nand_scan_tail()
3376 chip->ecc.size = 512; in nand_scan_tail()
3377 chip->ecc.bytes = 7; in nand_scan_tail()
3379 chip->ecc.priv = nand_bch_init(mtd, in nand_scan_tail()
3380 chip->ecc.size, in nand_scan_tail()
3381 chip->ecc.bytes, in nand_scan_tail()
3382 &chip->ecc.layout); in nand_scan_tail()
3383 if (!chip->ecc.priv) { in nand_scan_tail()
3392 chip->ecc.read_page = nand_read_page_raw; in nand_scan_tail()
3393 chip->ecc.write_page = nand_write_page_raw; in nand_scan_tail()
3394 chip->ecc.read_oob = nand_read_oob_std; in nand_scan_tail()
3395 chip->ecc.read_page_raw = nand_read_page_raw; in nand_scan_tail()
3396 chip->ecc.write_page_raw = nand_write_page_raw; in nand_scan_tail()
3397 chip->ecc.write_oob = nand_write_oob_std; in nand_scan_tail()
3398 chip->ecc.size = mtd->writesize; in nand_scan_tail()
3399 chip->ecc.bytes = 0; in nand_scan_tail()
3403 pr_warn("Invalid NAND_ECC_MODE %d\n", chip->ecc.mode); in nand_scan_tail()
3408 if (!chip->ecc.read_oob_raw) in nand_scan_tail()
3409 chip->ecc.read_oob_raw = chip->ecc.read_oob; in nand_scan_tail()
3410 if (!chip->ecc.write_oob_raw) in nand_scan_tail()
3411 chip->ecc.write_oob_raw = chip->ecc.write_oob; in nand_scan_tail()
3414 * The number of bytes available for a client to place data into in nand_scan_tail()
3417 chip->ecc.layout->oobavail = 0; in nand_scan_tail()
3418 for (i = 0; chip->ecc.layout->oobfree[i].length in nand_scan_tail()
3419 && i < ARRAY_SIZE(chip->ecc.layout->oobfree); i++) in nand_scan_tail()
3420 chip->ecc.layout->oobavail += in nand_scan_tail()
3421 chip->ecc.layout->oobfree[i].length; in nand_scan_tail()
3422 mtd->oobavail = chip->ecc.layout->oobavail; in nand_scan_tail()
3428 chip->ecc.steps = mtd->writesize / chip->ecc.size; in nand_scan_tail()
3429 if (chip->ecc.steps * chip->ecc.size != mtd->writesize) { in nand_scan_tail()
3433 chip->ecc.total = chip->ecc.steps * chip->ecc.bytes; in nand_scan_tail()
3435 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */ in nand_scan_tail()
3436 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && in nand_scan_tail()
3437 !(chip->cellinfo & NAND_CI_CELLTYPE_MSK)) { in nand_scan_tail()
3438 switch (chip->ecc.steps) { in nand_scan_tail()
3440 mtd->subpage_sft = 1; in nand_scan_tail()
3445 mtd->subpage_sft = 2; in nand_scan_tail()
3449 chip->subpagesize = mtd->writesize >> mtd->subpage_sft; in nand_scan_tail()
3452 chip->state = FL_READY; in nand_scan_tail()
3454 /* De-select the device */ in nand_scan_tail()
3455 chip->select_chip(mtd, -1); in nand_scan_tail()
3458 chip->pagebuf = -1; in nand_scan_tail()
3461 mtd->type = MTD_NANDFLASH; in nand_scan_tail()
3462 mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM : in nand_scan_tail()
3464 mtd->erase = nand_erase; in nand_scan_tail()
3465 mtd->point = NULL; in nand_scan_tail()
3466 mtd->unpoint = NULL; in nand_scan_tail()
3467 mtd->read = nand_read; in nand_scan_tail()
3468 mtd->write = nand_write; in nand_scan_tail()
3469 mtd->panic_write = panic_nand_write; in nand_scan_tail()
3470 mtd->read_oob = nand_read_oob; in nand_scan_tail()
3471 mtd->write_oob = nand_write_oob; in nand_scan_tail()
3472 mtd->sync = nand_sync; in nand_scan_tail()
3473 mtd->lock = NULL; in nand_scan_tail()
3474 mtd->unlock = NULL; in nand_scan_tail()
3475 mtd->suspend = nand_suspend; in nand_scan_tail()
3476 mtd->resume = nand_resume; in nand_scan_tail()
3477 mtd->block_isbad = nand_block_isbad; in nand_scan_tail()
3478 mtd->block_markbad = nand_block_markbad; in nand_scan_tail()
3479 mtd->writebufsize = mtd->writesize; in nand_scan_tail()
3481 /* propagate ecc.layout to mtd_info */ in nand_scan_tail()
3482 mtd->ecclayout = chip->ecc.layout; in nand_scan_tail()
3485 if (chip->options & NAND_SKIP_BBTSCAN) in nand_scan_tail()
3489 return chip->scan_bbt(mtd); in nand_scan_tail()
3495 * test if this is a module _anyway_ -- they'd have to try _really_ hard
3496 * to call us from in-kernel code if the core NAND support is modular.
3506 * nand_scan - [NAND Interface] Scan for the NAND device
3508 * @maxchips: number of chips to scan for
3511 * The flash ID is read and the mtd/chip structures are filled with the
3512 * appropriate values. The mtd->owner field must be set to the module of the
3520 if (!mtd->owner && caller_is_module()) { in nand_scan()
3521 pr_crit("%s called with NULL mtd->owner!\n", __func__); in nand_scan()
3533 * nand_release - [NAND Interface] Free resources held by the NAND device
3538 struct nand_chip *chip = mtd->priv; in nand_release() local
3540 if (chip->ecc.mode == NAND_ECC_SOFT_BCH) in nand_release()
3541 nand_bch_free((struct nand_bch_control *)chip->ecc.priv); in nand_release()
3546 kfree(chip->bbt); in nand_release()
3547 if (!(chip->options & NAND_OWN_BUFFERS)) in nand_release()
3548 kfree(chip->buffers); in nand_release()
3551 if (chip->badblock_pattern && chip->badblock_pattern->options in nand_release()
3553 kfree(chip->badblock_pattern); in nand_release()
3559 led_trigger_register_simple("nand-disk", &nand_led_trigger); in nand_base_init()