boot/dts/p1022ds.dts

11 /include/ "fsl/p1022si-pre.dtsi"
35 		board-control@0,0 {
36 			compatible = "fsl,p1022ds-indirect-pixis";
41 		nor@0,0 {
42 			#address-cells = <1>;
43 			#size-cells = <1>;
44 			compatible = "cfi-flash";
46 			bank-width = <2>;
47 			device-width = <1>;
51 				label = "ramdisk-nor";
52 				read-only;
57 				label = "diagnostic-nor";
58 				read-only;
63 				label = "dink-nor";
64 				read-only;
69 				label = "kernel-nor";
70 				read-only;
75 				label = "jffs2-nor";
80 				label = "dtb-nor";
81 				read-only;
86 				label = "u-boot-nor";
87 				read-only;
92 			#address-cells = <1>;
93 			#size-cells = <1>;
94 			compatible = "fsl,elbc-fcm-nand";
99 				label = "u-boot-nand";
100 				read-only;
105 				label = "jffs2-nand";
110 				label = "ramdisk-nand";
111 				read-only;
116 				label = "kernel-nand";
121 				label = "dtb-nand";
122 				read-only;
127 				label = "reserved-nand";
131 		board-control@3,0 {
132 			compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
134 			interrupt-parent = <&mpic>;
151 				 * clock-frequency will be set by U-Boot if
157 		spi@7000 {
159 				#address-cells = <1>;
160 				#size-cells = <1>;
163 				spi-max-frequency = <40000000>; /* input clock */
166 					label = "u-boot-spi";
168 					read-only;
171 					label = "kernel-spi";
173 					read-only;
176 					label = "dtb-spi";
178 					read-only;
181 					label = "file system-spi";
188 			fsl,mode = "i2s-slave";
189 			codec-handle = <&wm8776>;
190 			fsl,ssi-asynchronous;
202 			phy0: ethernet-phy@0 {
206 			phy1: ethernet-phy@1 {
210 			tbi-phy@2 {
211 				device_type = "tbi-phy";
217 			phy-handle = <&phy0>;
218 			phy-connection-type = "rgmii-id";
222 			phy-handle = <&phy1>;
223 			phy-connection-type = "rgmii-id";
274 /include/ "fsl/p1022si-post.dtsi"