Lines Matching +full:0 +full:x10000
19 * EXYNOS4 UART offset is 0x10000 but the older S5P SoCs are 0x400.
22 #define S3C_UART_OFFSET (0x10000)
26 #define EXYNOS4_PA_SYSRAM0 0x02025000
27 #define EXYNOS4_PA_SYSRAM1 0x02020000
29 #define EXYNOS4_PA_FIMC0 0x11800000
30 #define EXYNOS4_PA_FIMC1 0x11810000
31 #define EXYNOS4_PA_FIMC2 0x11820000
32 #define EXYNOS4_PA_FIMC3 0x11830000
34 #define EXYNOS4_PA_I2S0 0x03830000
35 #define EXYNOS4_PA_I2S1 0xE3100000
36 #define EXYNOS4_PA_I2S2 0xE2A00000
38 #define EXYNOS4_PA_PCM0 0x03840000
39 #define EXYNOS4_PA_PCM1 0x13980000
40 #define EXYNOS4_PA_PCM2 0x13990000
42 #define EXYNOS4_PA_SROM_BANK(x) (0x04000000 + ((x) * 0x01000000))
44 #define EXYNOS4_PA_ONENAND 0x0C000000
45 #define EXYNOS4_PA_ONENAND_DMA 0x0C600000
47 #define EXYNOS4_PA_CHIPID 0x10000000
49 #define EXYNOS4_PA_SYSCON 0x10010000
50 #define EXYNOS4_PA_PMU 0x10020000
51 #define EXYNOS4_PA_CMU 0x10030000
53 #define EXYNOS4_PA_SYSTIMER 0x10050000
54 #define EXYNOS4_PA_WATCHDOG 0x10060000
55 #define EXYNOS4_PA_RTC 0x10070000
57 #define EXYNOS4_PA_KEYPAD 0x100A0000
59 #define EXYNOS4_PA_DMC0 0x10400000
61 #define EXYNOS4_PA_COMBINER 0x10440000
63 #define EXYNOS4_PA_GIC_CPU 0x10480000
64 #define EXYNOS4_PA_GIC_DIST 0x10490000
66 #define EXYNOS4_PA_COREPERI 0x10500000
67 #define EXYNOS4_PA_TWD 0x10500600
68 #define EXYNOS4_PA_L2CC 0x10502000
70 #define EXYNOS4_PA_MDMA 0x10810000
71 #define EXYNOS4_PA_PDMA0 0x12680000
72 #define EXYNOS4_PA_PDMA1 0x12690000
74 #define EXYNOS4_PA_SYSMMU_MDMA 0x10A40000
75 #define EXYNOS4_PA_SYSMMU_SSS 0x10A50000
76 #define EXYNOS4_PA_SYSMMU_FIMC0 0x11A20000
77 #define EXYNOS4_PA_SYSMMU_FIMC1 0x11A30000
78 #define EXYNOS4_PA_SYSMMU_FIMC2 0x11A40000
79 #define EXYNOS4_PA_SYSMMU_FIMC3 0x11A50000
80 #define EXYNOS4_PA_SYSMMU_JPEG 0x11A60000
81 #define EXYNOS4_PA_SYSMMU_FIMD0 0x11E20000
82 #define EXYNOS4_PA_SYSMMU_FIMD1 0x12220000
83 #define EXYNOS4_PA_SYSMMU_PCIe 0x12620000
84 #define EXYNOS4_PA_SYSMMU_G2D 0x12A20000
85 #define EXYNOS4_PA_SYSMMU_ROTATOR 0x12A30000
86 #define EXYNOS4_PA_SYSMMU_MDMA2 0x12A40000
87 #define EXYNOS4_PA_SYSMMU_TV 0x12E20000
88 #define EXYNOS4_PA_SYSMMU_MFC_L 0x13620000
89 #define EXYNOS4_PA_SYSMMU_MFC_R 0x13630000
90 #define EXYNOS4_PA_SPI0 0x13920000
91 #define EXYNOS4_PA_SPI1 0x13930000
92 #define EXYNOS4_PA_SPI2 0x13940000
95 #define EXYNOS4_PA_GPIO1 0x11400000
96 #define EXYNOS4_PA_GPIO2 0x11000000
97 #define EXYNOS4_PA_GPIO3 0x03860000
99 #define EXYNOS4_PA_MIPI_CSIS0 0x11880000
100 #define EXYNOS4_PA_MIPI_CSIS1 0x11890000
102 #define EXYNOS4_PA_FIMD0 0x11C00000
104 #define EXYNOS4_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000))
105 #define EXYNOS4_PA_DWMCI 0x12550000
107 #define EXYNOS4_PA_SATA 0x12560000
108 #define EXYNOS4_PA_SATAPHY 0x125D0000
109 #define EXYNOS4_PA_SATAPHY_CTRL 0x126B0000
111 #define EXYNOS4_PA_SROMC 0x12570000
113 #define EXYNOS4_PA_EHCI 0x12580000
114 #define EXYNOS4_PA_OHCI 0x12590000
115 #define EXYNOS4_PA_HSPHY 0x125B0000
116 #define EXYNOS4_PA_MFC 0x13400000
118 #define EXYNOS4_PA_UART 0x13800000
120 #define EXYNOS4_PA_VP 0x12C00000
121 #define EXYNOS4_PA_MIXER 0x12C10000
122 #define EXYNOS4_PA_SDO 0x12C20000
123 #define EXYNOS4_PA_HDMI 0x12D00000
124 #define EXYNOS4_PA_IIC_HDMIPHY 0x138E0000
126 #define EXYNOS4_PA_IIC(x) (0x13860000 + ((x) * 0x10000))
128 #define EXYNOS4_PA_ADC 0x13910000
129 #define EXYNOS4_PA_ADC1 0x13911000
131 #define EXYNOS4_PA_AC97 0x139A0000
133 #define EXYNOS4_PA_SPDIF 0x139B0000
135 #define EXYNOS4_PA_TIMER 0x139D0000
137 #define EXYNOS4_PA_SDRAM 0x40000000
141 #define S3C_PA_HSMMC0 EXYNOS4_PA_HSMMC(0)
145 #define S3C_PA_IIC EXYNOS4_PA_IIC(0)
187 #define S5P_PA_UART0 S5P_PA_UART(0)