Lines Matching +full:gpio +full:- +full:mux +full:- +full:clock
4 * Modified from original 644X-EVM board support.
11 * DM644X-EVM board. It has:
14 * Additionally realtime clock, IR remote control receiver,
16 * from used in DM644X-EVM), internal ATA-6 3.5” HDD drive
17 * with PATA interface, two muxed red-green leds.
27 #include <linux/gpio.h>
30 #include <asm/mach-types.h>
37 #include <mach/mux.h>
42 #define NEUROS_OSD2_PHY_ID "davinci_mdio-0:01"
59 /* UBL (a few copies) plus U-Boot */
63 .mask_flags = MTD_WRITEABLE, /* force read-only */
65 /* U-Boot environment */
96 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
100 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
119 .id = -1,
130 { .name = "led1_green", .gpio = GPIO(10), },
131 { .name = "led1_red", .gpio = GPIO(11), },
132 { .name = "led2_green", .gpio = GPIO(12), },
133 { .name = "led2_red", .gpio = GPIO(13), },
142 .name = "leds-gpio",
143 .id = -1,
253 soc_info->emac_pdata->phy_id = NEUROS_OSD2_PHY_ID; in davinci_ntosd2_init()
257 * Mux the pins to be GPIOs, VLYNQEN is already done at startup. in davinci_ntosd2_init()
259 * They are a bitmask for GPIO management. According TI in davinci_ntosd2_init()
261 * gpio(10,11,12,13) for leds any combination of bits works except in davinci_ntosd2_init()