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4 The following is a summary of the SMBus protocol. It applies to
10 which is a subset from the I2C protocol. Fortunately, many devices use
13 If you write a driver for some I2C device, please try to use the SMBus
20 Below is a list of SMBus protocol operations, and the functions executing
22 don't match these function names.  For some of the operations which pass a
24 a different protocol operation entirely.
33 A, NA (1 bit) : Accept and reverse accept bit. 
35                 get a 10 bit I2C address.
36 Comm  (8 bits): Command byte, a data byte which often selects a register on
38 Data  (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh
40 Count (8 bits): A data byte containing the length of a block operation.
48 This sends a single bit to the device, at the place of the Rd/Wr bit.
50 A Addr Rd/Wr [A] P
56 This reads a single byte from a device, without specifying a device
58 others, it is a shorthand if you want to read the same register as in
61 S Addr Rd [A] [Data] NA P
67 This operation is the reverse of Receive Byte: it sends a single byte
68 to a device.  See Receive Byte for more information.
70 S Addr Wr [A] Data [A] P
76 This reads a single byte from a device, from a designated register.
79 S Addr Wr [A] Comm [A] S Addr Rd [A] [Data] NA P
85 This operation is very like Read Byte; again, data is read from a
86 device, from a designated register that is specified through the Comm
87 byte. But this time, the data is a complete word (16 bits).
89 S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P
99 This writes a single byte to a device, to a designated register. The
103 S Addr Wr [A] Comm [A] Data [A] P
110 of data is written to a device, to the designated register that is
113 S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P
123 This command selects a device register (through the Comm byte), sends
126 S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] 
127                              S Addr Rd [A] [DataLow] A [DataHigh] NA P
133 This command reads a block of up to 32 bytes from a device, from a 
137 S Addr Wr [A] Comm [A] 
138            S Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P
145 a device, to a designated register that is specified through the
148 S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P
157 This command selects a device register (through the Comm byte), sends
160 S Addr Wr [A] Comm [A] Count [A] Data [A] ...
161                              S Addr Rd [A] [Count] A [Data] ... A P
167 This command is sent from a SMBus device acting as a master to the
168 SMBus host acting as a slave.
172 [S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P]
180 PEC adds a CRC-8 error-checking byte to transfers using it, immediately
188 the specification. It is a higher-layer protocol which uses the
201 The SMBus alert protocol allows several SMBus slave devices to share a
220 but the SMBus layer places a limit of 32 bytes.
226 This command reads a block of bytes from a device, from a 
229 S Addr Wr [A] Comm [A] 
230            S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
236 This command reads a block of bytes from a device, from a 
239 S Addr Wr [A] Comm1 [A] Comm2 [A] 
240            S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
247 a device, to a designated register that is specified through the
251 S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P