| #
e39d3a6b
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| 16-Mar-2026 |
Mitchell Horne <mhorne@FreeBSD.org> |
pmc.h: bump PMC_VERSION_MINOR
Bump for the addition of PMC_OP_GETCAPS and the recently added Intel CPUs.
Sponsored by: The FreeBSD Foundation
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| #
44a983d2
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| 01-Mar-2026 |
Ali Mashtizadeh <mashti@uwaterloo.ca> |
libpmc: Query hwpmc for caps
This change allows for fine-grained capabilities per counter index. This is particularly useful for AMD where subclasses are not exposed to the general PMC code, but oth
libpmc: Query hwpmc for caps
This change allows for fine-grained capabilities per counter index. This is particularly useful for AMD where subclasses are not exposed to the general PMC code, but other architectures also have asymmetric behaviors when it comes to specific counter indices.
A new PMC_OP_GETCAPS op is added to the hwpmc(4) ioctl interface.
Reviewed by: mhorne Sponsored by: Netflix Pull Request: https://github.com/freebsd/freebsd-src/pull/2058
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| #
e409e51f
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| 20-Feb-2026 |
Ali Mashtizadeh <mashti@uwaterloo.ca> |
hwpmc: Remove left over k7, xscale and p4 references pmc
Support for these processors was removed a few years ago, but a few references remain that should be removed.
Sponsored by: Netflix Reviewed
hwpmc: Remove left over k7, xscale and p4 references pmc
Support for these processors was removed a few years ago, but a few references remain that should be removed.
Sponsored by: Netflix Reviewed by: imp Pull Request: https://github.com/freebsd/freebsd-src/pull/2039
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| #
e51ef8ae
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| 30-Jan-2026 |
Ali Mashtizadeh <ali@mashtizadeh.com> |
hwpmc: Initial support for AMD IBS
This patch adds support for AMD IBS. It adds a new class of performance counter that cotains two events: ibs-fetch and ibs-op events. Unlike most existing sampled
hwpmc: Initial support for AMD IBS
This patch adds support for AMD IBS. It adds a new class of performance counter that cotains two events: ibs-fetch and ibs-op events. Unlike most existing sampled events, IBS events provide a number of values containing extra information regarding the sample. To support this we use the existing callchain event, and introduce a new flag for multipart payloads. The first 8 bytes of the pc_sample contains a header that defines up to four payloads.
Sponsored by: Netflix
Reviewed by: imp,mhorne Pull Request: https://github.com/freebsd/freebsd-src/pull/2022
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| #
a3ff85e1
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| 02-Feb-2026 |
Bojan Novković <bnovkov@FreeBSD.org> |
pmc: Import Intel Granite Rapids events
Reviewed by: mhorne Sponsored by: Klara, Inc. Obtained from: Intel perfmon (JSON event definitions) Differential Revision: https://reviews.freebsd.org/D55081
pmc: Import Intel Granite Rapids events
Reviewed by: mhorne Sponsored by: Klara, Inc. Obtained from: Intel perfmon (JSON event definitions) Differential Revision: https://reviews.freebsd.org/D55081 MFC after: 2 days
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| #
ca3e47b0
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| 04-Dec-2025 |
Anaëlle CAZUC <Anaelle.CAZUC@stormshield.eu> |
pmc: add alderlaken model
This commit adds alderlaken CPU model to hwpmc/libpmc. JSON event definitions are imported from Intel perfmon version 1.16.
Reviewed by: mhorne MFC after: 1 week Sponsored
pmc: add alderlaken model
This commit adds alderlaken CPU model to hwpmc/libpmc. JSON event definitions are imported from Intel perfmon version 1.16.
Reviewed by: mhorne MFC after: 1 week Sponsored by: Stormshield Differential Revision: https://reviews.freebsd.org/D49229
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| #
51a01f3d
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| 04-Dec-2025 |
Anaëlle CAZUC <Anaelle.CAZUC@stormshield.eu> |
pmc: add emerald rapids model
This commit adds emerald rapids CPU model to hwpmc/libpmc. JSON event definitions are imported from Intel perfmon version 1.06.
Reviewed by: mhorne MFC after: 1 week S
pmc: add emerald rapids model
This commit adds emerald rapids CPU model to hwpmc/libpmc. JSON event definitions are imported from Intel perfmon version 1.06.
Reviewed by: mhorne MFC after: 1 week Sponsored by: Stormshield Differential Revision: https://reviews.freebsd.org/D49228
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| #
82d6d46d
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| 18-Oct-2023 |
Mitchell Horne <mhorne@FreeBSD.org> |
pmc: remove last bits of AMD K7 CPU support
This includes event definitions from sys/pmc_events.h, definitions from sys/pmc.h, and the man pages.
Reviewed by: jkoshy Sponsored by: The FreeBSD Found
pmc: remove last bits of AMD K7 CPU support
This includes event definitions from sys/pmc_events.h, definitions from sys/pmc.h, and the man pages.
Reviewed by: jkoshy Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D41275
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| #
c190fb35
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| 06-Jun-2023 |
Mitchell Horne <mhorne@FreeBSD.org> |
pmc: better distinguish pmu-events allocation path
Background:
The pm_ev field of struct pmc_op_pmcallocate and struct pmc traditionally contains the index of the chosen event, corresponding to the
pmc: better distinguish pmu-events allocation path
Background:
The pm_ev field of struct pmc_op_pmcallocate and struct pmc traditionally contains the index of the chosen event, corresponding to the __PMC_EVENTS array in pmc_events.h. This is a static list of events, maintained by FreeBSD.
In the usual case, libpmc translates the user supplied event name (string) into the pm_ev index, which is passed as an argument to the allocation syscall. On the kernel side, the allocation method for the relevant hwpmc class translates the given index into the event code that will be written to an event selection register.
In 2018, a new source of performance event definitions was introduced: the pmu-events json files, which are maintained by the Linux kernel. The result was better coverage for newer Intel processors with a reduced maintenance burden for libpmc/hwpmc. Intel and AMD CPUs were unconditionally switched to allocate events from pmu-events instead of the traditional scheme (959826ca1bb0a, 81eb4dcf9e0d).
Under the pmu-events scheme, the pm_ev field contains an index corresponding to the selected event from the pmu-events table, something which the kernel has no knowledge of. The configuration for the performance counting registers is instead passed via class-dependent fields (struct pmc_md_op_pmcallocate).
In 2021 I changed the allocation logic so that it would attempt to pull from the pmu-events table first, and fall-back to the traditional method (dfb4fb41166bc3). Later, pmu-events support for arm64 and power8 CPUs was added (28dd6730a5d6 and b48a2770d48b).
The problem that remains is that the pm_ev field is overloaded, without a definitive way to determine whether the event allocation came from the pmu-events table or FreeBSD's statically-defined PMC events. This resulted in a recent fix, 21f7397a61f7.
Change:
To disambiguate these two supported but separate use-cases, add a new flag, PMC_F_EV_PMU, to be set as part of the allocation, indicating that the event index came from pmu-events.
This is useful in two ways: 1. On the kernel side, we can validate the syscall arguments better. Some classes support only the traditional event scheme (e.g. hwpmc_armv7), while others support only the pmu-events method (e.g. hwpmc_core for Intel). We can now check for this. The hwpmc_arm64 class supports both methods, so the new flag supersedes the existing MD flag, PM_MD_EVENT_RAW.
2. The flag will be tracked in struct pmc for the duration of its lifetime, meaning it is communicated back to userspace. This allows libpmc to perform the reverse index-to-event-name translation without speculating about the meaning of the index value.
Adding the flag is a backwards-incompatible ABI change. We recently bumped the major version of the hwpmc module, so this breakage is acceptable.
Reviewed by: jkoshy MFC after: 3 days Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D40753
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| #
95ee2897
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| 16-Aug-2023 |
Warner Losh <imp@FreeBSD.org> |
sys: Remove $FreeBSD$: two-line .h pattern
Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
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| #
5fc97cc3
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| 16-Jun-2023 |
Mitchell Horne <mhorne@FreeBSD.org> |
hwpmc(4): document debugging options
The debug options for hwpmc are not documented in detail anywhere, and setting it up was error-prone the first time I had to figure it out (and each time I've ha
hwpmc(4): document debugging options
The debug options for hwpmc are not documented in detail anywhere, and setting it up was error-prone the first time I had to figure it out (and each time I've had to remember it). Add some explanation of the required options and describe the kern.hwpmc.debugflags sysctl format.
Reviewed by: emaste MFC after: 1 week Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D40545
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| #
569f89b2
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| 16-Jun-2023 |
Mitchell Horne <mhorne@FreeBSD.org> |
hwpmc: add error for HWPMC_DEBUG without KTR
The option is a no-op otherwise, but this is not necessarily obvious. Failing the compile gives the user a hint.
Reviewed by: jkoshy, emaste MFC after:
hwpmc: add error for HWPMC_DEBUG without KTR
The option is a no-op otherwise, but this is not necessarily obvious. Failing the compile gives the user a hint.
Reviewed by: jkoshy, emaste MFC after: 1 week Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D40544
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| #
0589e705
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| 14-Jun-2023 |
Mitchell Horne <mhorne@FreeBSD.org> |
hpwmc: add __pmcdbg_used annotation
For variables which are only used in PMCDBG* macros.
Reviewed by: jkoshy, emaste MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: h
hpwmc: add __pmcdbg_used annotation
For variables which are only used in PMCDBG* macros.
Reviewed by: jkoshy, emaste MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D40288
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| #
d6f00fa0
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| 30-May-2023 |
Jessica Clarke <jrtc27@FreeBSD.org> |
pmc: Bump major version for just-committed breaking changes
Reviewed by: jkoshy, mhorne, emaste Differential Revision: https://reviews.freebsd.org/D40050
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| #
4d846d26
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| 10-May-2023 |
Warner Losh <imp@FreeBSD.org> |
spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD
The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch up to that fact and revert to their recommended match of
spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD
The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch up to that fact and revert to their recommended match of BSD-2-Clause.
Discussed with: pfg MFC After: 3 days Sponsored by: Netflix
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| #
39f92a76
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| 05-May-2023 |
Mitchell Horne <mhorne@FreeBSD.org> |
hwpmc: pass pmc pointer to more class methods
In many cases this avoids an extra lookup, since the callers always have pm at hand. We can also eliminate several assertions, mostly for pm != NULL. Th
hwpmc: pass pmc pointer to more class methods
In many cases this avoids an extra lookup, since the callers always have pm at hand. We can also eliminate several assertions, mostly for pm != NULL. The class methods are an internal interface, and the callers already handle such a scenario. No functional change intended.
Reviewed by: jkoshy MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D39915
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| #
772b2dc3
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| 05-May-2023 |
Mitchell Horne <mhorne@FreeBSD.org> |
hwpmc: remove pmd_pcpu_{init,fini} callbacks
These are unused on all platforms.
Reviewed by: jkoshy, emaste MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https://re
hwpmc: remove pmd_pcpu_{init,fini} callbacks
These are unused on all platforms.
Reviewed by: jkoshy, emaste MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D39912
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| #
7253dc57
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| 05-May-2023 |
Mitchell Horne <mhorne@FreeBSD.org> |
hwpmc: formatting of CPU and class lists
The end result is much more legible in both cases.
Reviewed by: jkoshy MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https:
hwpmc: formatting of CPU and class lists
The end result is much more legible in both cases.
Reviewed by: jkoshy MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D39906
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| #
3c8b7f49
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| 05-May-2023 |
Mitchell Horne <mhorne@FreeBSD.org> |
hwpmc: trim MIPS CPU and class defs
MIPS is gone, and this is the last remaining bit in the pmc code.
Reviewed by: jkoshy, emaste MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differentia
hwpmc: trim MIPS CPU and class defs
MIPS is gone, and this is the last remaining bit in the pmc code.
Reviewed by: jkoshy, emaste MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D39905
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| #
ca43b2ae
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| 05-May-2023 |
Mitchell Horne <mhorne@FreeBSD.org> |
hwpmc: trim obsolete Intel CPU and class defs
No functional change.
Reviewed by: jkoshy MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D3
hwpmc: trim obsolete Intel CPU and class defs
No functional change.
Reviewed by: jkoshy MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D39904
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| #
57014ab7
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| 28-Mar-2023 |
Joseph Koshy <jkoshy@FreeBSD.org> |
pmc: Add a reminder to maintain documentation.
Approved by: gnn (mentor) Differential Revision: https://reviews.freebsd.org/D39298
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| #
b6e28991
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| 16-Feb-2022 |
Aleksandr Rybalko <ray@freebsd.org> |
System wide and NUMA domain wide counters support. PMC classes for ARM DMC-620 and CMN-600.
Add support for system wide and NUMA domain wide counters support. Add 3 new PMC classes for ARM DMC-620 a
System wide and NUMA domain wide counters support. PMC classes for ARM DMC-620 and CMN-600.
Add support for system wide and NUMA domain wide counters support. Add 3 new PMC classes for ARM DMC-620 and CMN-600 controllers PMU.
Reviewed by: mhorne Sponsored By: ARM Sponsored By: Ampere Computing Differential Revision: https://reviews.freebsd.org/D35342
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| #
eff9ee7c
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| 07-Jun-2022 |
Alexander Motin <mav@FreeBSD.org> |
hwpmc: Increase thread priority while iterating CPUs.
This allows to profile already running high-priority threads, that otherwise by blocking thread migration to respective CPUs blocked PMC managem
hwpmc: Increase thread priority while iterating CPUs.
This allows to profile already running high-priority threads, that otherwise by blocking thread migration to respective CPUs blocked PMC management, i.e. profiling could start only when workload completed.
While there, return the thread to its original CPU after iterating the list. Otherwise all threads using PMC end up on the last CPU.
MFC after: 1 month
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| #
13260178
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| 03-Jun-2022 |
Alexander Motin <mav@FreeBSD.org> |
hwpmc: Add IDs for few more Intel Atom CPUs.
MFC after: 1 month
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| #
fe109d31
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| 31-May-2022 |
Alexander Motin <mav@FreeBSD.org> |
hwpmc: Add basic Intel Alderlake CPUs support.
The PMC subsystem is not designed for non-uniform CPU capabilities (P/E-cores are different), but at least several working architectural events like cp
hwpmc: Add basic Intel Alderlake CPUs support.
The PMC subsystem is not designed for non-uniform CPU capabilities (P/E-cores are different), but at least several working architectural events like cpu_clk_unhalted.thread_p should be better than nothing.
MFC after: 1 month
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