| #
b31abc95
|
| 19-Sep-2025 |
Konstantin Belousov <kib@FreeBSD.org> |
arm, powerpc, riscv: implement atomic_set/clear_16
Reviewed by: jrtc27, markj Sponsored by: The FreeBSD Foundation MFC after: 1 week Differential revision: https://reviews.freebsd.org/D52626
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| #
ac2156c1
|
| 20-Jan-2025 |
Olivier Certner <olce@FreeBSD.org> |
atomics: Constify loads: riscv: Convert missed atomic_load_acq_64()
Reviewed by: kib Fixes: 5e9a82e898d5 ("atomics: Constify loads") MFC after: 4 days Sponsored by: The FreeBSD Fo
atomics: Constify loads: riscv: Convert missed atomic_load_acq_64()
Reviewed by: kib Fixes: 5e9a82e898d5 ("atomics: Constify loads") MFC after: 4 days Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D48497
show more ...
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| #
5e9a82e8
|
| 19-Jul-2024 |
Olivier Certner <olce@FreeBSD.org> |
atomics: Constify loads
In order to match reality, allow using these functions with pointers on const objects, and bring us closer to C11.
Remove the '+' modifier in the atomic_load_acq_64_i586()'s
atomics: Constify loads
In order to match reality, allow using these functions with pointers on const objects, and bring us closer to C11.
Remove the '+' modifier in the atomic_load_acq_64_i586()'s inline asm statement's constraint for '*p' (the value to load). CMPXCHG8B always writes back some value, even when the value exchange does not happen in which case what was read is written back. atomic_load_acq_64_i586() further takes care of the operation atomically writing back the same value that was read in any case. All in all, this makes the inline asm's write back undetectable by any other code, whether executing on other CPUs or code on the same CPU before and after the call to atomic_load_acq_64_i586(), except for the fact that CMPXCHG8B will trigger a #GP(0) if the memory address is part of a read-only mapping. This unfortunate property is however out of scope of the C abstract machine, and in particular independent of whether the 'uint64_t' pointed to is declared 'const' or not.
Approved by: markj (mentor) MFC after: 5 days Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D46887
show more ...
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| #
a80b9ee1
|
| 19-Nov-2024 |
John Baldwin <jhb@FreeBSD.org> |
atomic(9): Implement atomic_testand(clear|set)_ptr
For current architectures, these are just aliases for the existing operation on the relevant scalar integer.
Reviewed by: imp, kib Obtained from:
atomic(9): Implement atomic_testand(clear|set)_ptr
For current architectures, these are just aliases for the existing operation on the relevant scalar integer.
Reviewed by: imp, kib Obtained from: CheriBSD Sponsored by: AFRL, DARPA Differential Revision: https://reviews.freebsd.org/D47631
show more ...
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| #
a474e53d
|
| 19-Nov-2024 |
John Baldwin <jhb@FreeBSD.org> |
riscv: Add implementations of atomic_testand(set|clear)_(32|64|long)
These use amoor and amoand rather than a loop.
Also define atomic_testandset_acq_(64|long) using amoor.aq.
Reviewed by: mhorne,
riscv: Add implementations of atomic_testand(set|clear)_(32|64|long)
These use amoor and amoand rather than a loop.
Also define atomic_testandset_acq_(64|long) using amoor.aq.
Reviewed by: mhorne, kib Sponsored by: AFRL, DARPA Differential Revision: https://reviews.freebsd.org/D47627
show more ...
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| #
2183004e
|
| 22-May-2024 |
Ruslan Bukin <br@FreeBSD.org> |
riscv: Implement atomic operations
Implement atomic_load_acq_16, atomic_store_rel_16.
These are needed by bhyve(8) PCIe bus emulation code.
Group 16-bit atomic functions similarly to 32 and 64-bit
riscv: Implement atomic operations
Implement atomic_load_acq_16, atomic_store_rel_16.
These are needed by bhyve(8) PCIe bus emulation code.
Group 16-bit atomic functions similarly to 32 and 64-bit.
Reviewed by: mhorne Differential Revision: https://reviews.freebsd.org/D45228
show more ...
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| #
95ee2897
|
| 16-Aug-2023 |
Warner Losh <imp@FreeBSD.org> |
sys: Remove $FreeBSD$: two-line .h pattern
Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
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| #
0d3b3bee
|
| 04-Mar-2021 |
Mitchell Horne <mhorne@FreeBSD.org> |
riscv: fix errors in some atomic type aliases
This appears to be a copy-and-paste error that has simply been overlooked. The tree contains only two calls to any of the affected variants, but recent
riscv: fix errors in some atomic type aliases
This appears to be a copy-and-paste error that has simply been overlooked. The tree contains only two calls to any of the affected variants, but recent additions to the test suite started exercising the call to atomic_clear_rel_int() in ng_leave_write(), reliably causing panics.
Apparently, the issue was inherited from the arm64 atomic header. That instance was addressed in c90baf6817a0, but the fix did not make its way to RISC-V.
Note that the particular test case ng_macfilter_test:main still appears to fail on this platform, but this change reduces the panic to a timeout.
PR: 253237 Reported by: Jenkins, arichardson Reviewed by: kp, arichardson MFC after: 3 days Differential Revision: https://reviews.freebsd.org/D29064
show more ...
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| #
e91d4ae8
|
| 01-Sep-2020 |
Mateusz Guzik <mjg@FreeBSD.org> |
riscv: clean up empty lines in .c and .h files
|
| #
b96562eb
|
| 23-Oct-2019 |
John Baldwin <jhb@FreeBSD.org> |
Fix atomic_*cmpset32 on riscv64 with clang.
The lr.w instruction used to read the value from memory sign-extends the value read from memory. GCC sign-extends the 32-bit comparison value passed in w
Fix atomic_*cmpset32 on riscv64 with clang.
The lr.w instruction used to read the value from memory sign-extends the value read from memory. GCC sign-extends the 32-bit comparison value passed in whereas clang currently does not. As a result, if the value being compared has the MSB set, the comparison fails for matching 32-bit values when compiled with clang.
Use a cast to explicitly sign-extend the unsigned comparison value. This works with both GCC and clang.
There is commentary in the RISC-V spec that suggests that GCC's approach is more correct, but it is not clear if the commentary in the RISC-V spec is binding.
Reviewed by: mhorne Obtained from: Axiado MFC after: 2 weeks Sponsored by: DARPA Differential Revision: https://reviews.freebsd.org/D22084
show more ...
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| #
8b3bc70a
|
| 08-Oct-2019 |
Dimitry Andric <dim@FreeBSD.org> |
Merge ^/head r352764 through r353315.
|
| #
29a5f639
|
| 06-Oct-2019 |
Kyle Evans <kevans@FreeBSD.org> |
riscv: use the common sub-word {,f}cmpset implementation
Reviewed by: mhorne Differential Revision: https://reviews.freebsd.org/D21888
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| #
f9c0a512
|
| 10-Aug-2018 |
Dimitry Andric <dim@FreeBSD.org> |
Merge ^/head r337286 through r337585.
|
| #
b31abc95
|
| 19-Sep-2025 |
Konstantin Belousov <kib@FreeBSD.org> |
arm, powerpc, riscv: implement atomic_set/clear_16
Reviewed by: jrtc27, markj Sponsored by: The FreeBSD Foundation MFC after: 1 week Differential revision: https://reviews.freebsd.org/D52626
|
| #
ac2156c1
|
| 20-Jan-2025 |
Olivier Certner <olce@FreeBSD.org> |
atomics: Constify loads: riscv: Convert missed atomic_load_acq_64()
Reviewed by: kib Fixes: 5e9a82e898d5 ("atomics: Constify loads") MFC after: 4 days Sponsored by: The FreeBSD Fo
atomics: Constify loads: riscv: Convert missed atomic_load_acq_64()
Reviewed by: kib Fixes: 5e9a82e898d5 ("atomics: Constify loads") MFC after: 4 days Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D48497
show more ...
|
| #
5e9a82e8
|
| 19-Jul-2024 |
Olivier Certner <olce@FreeBSD.org> |
atomics: Constify loads
In order to match reality, allow using these functions with pointers on const objects, and bring us closer to C11.
Remove the '+' modifier in the atomic_load_acq_64_i586()'s
atomics: Constify loads
In order to match reality, allow using these functions with pointers on const objects, and bring us closer to C11.
Remove the '+' modifier in the atomic_load_acq_64_i586()'s inline asm statement's constraint for '*p' (the value to load). CMPXCHG8B always writes back some value, even when the value exchange does not happen in which case what was read is written back. atomic_load_acq_64_i586() further takes care of the operation atomically writing back the same value that was read in any case. All in all, this makes the inline asm's write back undetectable by any other code, whether executing on other CPUs or code on the same CPU before and after the call to atomic_load_acq_64_i586(), except for the fact that CMPXCHG8B will trigger a #GP(0) if the memory address is part of a read-only mapping. This unfortunate property is however out of scope of the C abstract machine, and in particular independent of whether the 'uint64_t' pointed to is declared 'const' or not.
Approved by: markj (mentor) MFC after: 5 days Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D46887
show more ...
|
| #
a80b9ee1
|
| 19-Nov-2024 |
John Baldwin <jhb@FreeBSD.org> |
atomic(9): Implement atomic_testand(clear|set)_ptr
For current architectures, these are just aliases for the existing operation on the relevant scalar integer.
Reviewed by: imp, kib Obtained from:
atomic(9): Implement atomic_testand(clear|set)_ptr
For current architectures, these are just aliases for the existing operation on the relevant scalar integer.
Reviewed by: imp, kib Obtained from: CheriBSD Sponsored by: AFRL, DARPA Differential Revision: https://reviews.freebsd.org/D47631
show more ...
|
| #
a474e53d
|
| 19-Nov-2024 |
John Baldwin <jhb@FreeBSD.org> |
riscv: Add implementations of atomic_testand(set|clear)_(32|64|long)
These use amoor and amoand rather than a loop.
Also define atomic_testandset_acq_(64|long) using amoor.aq.
Reviewed by: mhorne,
riscv: Add implementations of atomic_testand(set|clear)_(32|64|long)
These use amoor and amoand rather than a loop.
Also define atomic_testandset_acq_(64|long) using amoor.aq.
Reviewed by: mhorne, kib Sponsored by: AFRL, DARPA Differential Revision: https://reviews.freebsd.org/D47627
show more ...
|
| #
2183004e
|
| 22-May-2024 |
Ruslan Bukin <br@FreeBSD.org> |
riscv: Implement atomic operations
Implement atomic_load_acq_16, atomic_store_rel_16.
These are needed by bhyve(8) PCIe bus emulation code.
Group 16-bit atomic functions similarly to 32 and 64-bit
riscv: Implement atomic operations
Implement atomic_load_acq_16, atomic_store_rel_16.
These are needed by bhyve(8) PCIe bus emulation code.
Group 16-bit atomic functions similarly to 32 and 64-bit.
Reviewed by: mhorne Differential Revision: https://reviews.freebsd.org/D45228
show more ...
|
| #
95ee2897
|
| 16-Aug-2023 |
Warner Losh <imp@FreeBSD.org> |
sys: Remove $FreeBSD$: two-line .h pattern
Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
|
| #
0d3b3bee
|
| 04-Mar-2021 |
Mitchell Horne <mhorne@FreeBSD.org> |
riscv: fix errors in some atomic type aliases
This appears to be a copy-and-paste error that has simply been overlooked. The tree contains only two calls to any of the affected variants, but recent
riscv: fix errors in some atomic type aliases
This appears to be a copy-and-paste error that has simply been overlooked. The tree contains only two calls to any of the affected variants, but recent additions to the test suite started exercising the call to atomic_clear_rel_int() in ng_leave_write(), reliably causing panics.
Apparently, the issue was inherited from the arm64 atomic header. That instance was addressed in c90baf6817a0, but the fix did not make its way to RISC-V.
Note that the particular test case ng_macfilter_test:main still appears to fail on this platform, but this change reduces the panic to a timeout.
PR: 253237 Reported by: Jenkins, arichardson Reviewed by: kp, arichardson MFC after: 3 days Differential Revision: https://reviews.freebsd.org/D29064
show more ...
|
| #
e91d4ae8
|
| 01-Sep-2020 |
Mateusz Guzik <mjg@FreeBSD.org> |
riscv: clean up empty lines in .c and .h files
|
| #
b96562eb
|
| 23-Oct-2019 |
John Baldwin <jhb@FreeBSD.org> |
Fix atomic_*cmpset32 on riscv64 with clang.
The lr.w instruction used to read the value from memory sign-extends the value read from memory. GCC sign-extends the 32-bit comparison value passed in w
Fix atomic_*cmpset32 on riscv64 with clang.
The lr.w instruction used to read the value from memory sign-extends the value read from memory. GCC sign-extends the 32-bit comparison value passed in whereas clang currently does not. As a result, if the value being compared has the MSB set, the comparison fails for matching 32-bit values when compiled with clang.
Use a cast to explicitly sign-extend the unsigned comparison value. This works with both GCC and clang.
There is commentary in the RISC-V spec that suggests that GCC's approach is more correct, but it is not clear if the commentary in the RISC-V spec is binding.
Reviewed by: mhorne Obtained from: Axiado MFC after: 2 weeks Sponsored by: DARPA Differential Revision: https://reviews.freebsd.org/D22084
show more ...
|
| #
8b3bc70a
|
| 08-Oct-2019 |
Dimitry Andric <dim@FreeBSD.org> |
Merge ^/head r352764 through r353315.
|
| #
29a5f639
|
| 06-Oct-2019 |
Kyle Evans <kevans@FreeBSD.org> |
riscv: use the common sub-word {,f}cmpset implementation
Reviewed by: mhorne Differential Revision: https://reviews.freebsd.org/D21888
|