sys: Remove $FreeBSD$: one-line .h pattern

Remove /^\s*\*+\s*\$FreeBSD\$.*$\n/

powerpc: clean up empty lines in .c and .h files

Merge ^/head r356848 through r356919.

D23057: [PowerPC] Fix offset calculations in bridge mode

In rS354701, I replaced text relocations with offsets from &generictrap.

Unfortunately, the magic variable I was using doesn't actually mean

D23057: [PowerPC] Fix offset calculations in bridge mode

In rS354701, I replaced text relocations with offsets from &generictrap.

Unfortunately, the magic variable I was using doesn't actually mean the
address of &generictrap, in bridge mode it actually means &generictrap64.

So, for bridge mode to work, it is necessary to differentiate between
"where do we need to branch to to handle a trap" and "where is &generictrap
for purposes of doing relative math".

Introduce a new TRAP_ENTRY and use it instead of TRAP_GENTRAP for doing
actual calls to the generic trap handler.

Reported by: Mark Millard <marklmi@yahoo.com>
Reviewed by: jhibbits
Sponsored by: Tag1 Consulting, Inc.
Differential Revision: https://reviews.freebsd.org/D23057

show more ...

MFHead @349476

Sponsored by: The FreeBSD Foundation

powerpc/booke: Handle misaligned floating point loads/stores as on AIM

Misaligned floating point loads and stores are already handled for AIM, but
use the DSISR to obtain the necessary data. Book-E

powerpc/booke: Handle misaligned floating point loads/stores as on AIM

Misaligned floating point loads and stores are already handled for AIM, but
use the DSISR to obtain the necessary data. Book-E does not have the DSISR,
so these fixups are not performed, leading to a SIGBUS on misaligned FP
loads or stores. Obtain the necessary data on the Book-E side, similar to
how is done for SPE.

MFC after: 1 week

show more ...

MFHead@r345880

powerpc: Allow emulating optional FPU instructions on CPUs with an FPU

The e5500 has an FPU, but lacks the optional fsqrt instruction. This
instruction gets emulated in the kernel, but the emulatio

powerpc: Allow emulating optional FPU instructions on CPUs with an FPU

The e5500 has an FPU, but lacks the optional fsqrt instruction. This
instruction gets emulated in the kernel, but the emulation uses stale data,
from the last switch out, and does not return the result of the operation
immediately. Fix both of these conditions by saving and restoring the FPRs
around the emulation point.

MFC after: 1 week
MFC with: r345829

show more ...

MFHead@r345677

powernv: Add Hypervisor Maintenance Interrupt handler

Attempting to build www/firefox on POWER9 resulted in a HMI exception being
thrown, a fatal trap currently. This is typically caused by timer f

powernv: Add Hypervisor Maintenance Interrupt handler

Attempting to build www/firefox on POWER9 resulted in a HMI exception being
thrown, a fatal trap currently. This is typically caused by timer facility
errors, but examination of the Hypervisor Maintenance Exception Register
(HMER) yielded only that an exception had recovered, with no information of
the actual exception cause.

When an HMI occurs, OPAL_HANDLE_HMI or OPAL_HANDLE_HMI2 must be called to
handle the exception at the firmware level. If the exception is handled, we
can continue.

This adds only the preliminary handler, enough to prevent package building
from panicking. An enhancement in the future is to use the flags returned
by OPAL_HANDLE_HMI2 to print more useful error messages, and log maintenance
events.

Reviewed by: luporl
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D19634

show more ...

Merge ^/head r341764 through r341812.

ppc64: handle exception 0x1500 (soft patch)

This change adds a hypervisor trap handler for exception 0x1500 (soft patch),
normalizing all VSX registers and returning.
This avoids a kernel panic due

ppc64: handle exception 0x1500 (soft patch)

This change adds a hypervisor trap handler for exception 0x1500 (soft patch),
normalizing all VSX registers and returning.
This avoids a kernel panic due to unknown exception.

Change made with the collaboration of leonardo.bianconi_eldorado.org.br,
that found out that this is a hypervisor exception and not a supervisor one,
and fixed this in the code.

Reviewed by: jhibbits, sbruno
Differential Revision: https://reviews.freebsd.org/D17806

show more ...

Merge ^/head r339015 through r339669.

powerpcspe: Implement SPE exception handling

The Signal Processing Engine (SPE) found in Freescale e500 cores (and
others) offloads IEEE-754 compliance (NaN, Inf handling, overflow,
underflow) to so

powerpcspe: Implement SPE exception handling

The Signal Processing Engine (SPE) found in Freescale e500 cores (and
others) offloads IEEE-754 compliance (NaN, Inf handling, overflow,
underflow) to software, most likely as a means of simplifying the APU
silicon. Some software, like AbiWord, needs full IEEE-754 compliance,
including NaN handling. Implement the necessary bits to enable it.

Differential Revision: https://reviews.freebsd.org/D17446

show more ...

sys: Remove $FreeBSD$: one-line .h pattern

Remove /^\s*\*+\s*\$FreeBSD\$.*$\n/

powerpc: clean up empty lines in .c and .h files

Merge ^/head r356848 through r356919.

D23057: [PowerPC] Fix offset calculations in bridge mode

In rS354701, I replaced text relocations with offsets from &generictrap.

Unfortunately, the magic variable I was using doesn't actually mean

D23057: [PowerPC] Fix offset calculations in bridge mode

In rS354701, I replaced text relocations with offsets from &generictrap.

Unfortunately, the magic variable I was using doesn't actually mean the
address of &generictrap, in bridge mode it actually means &generictrap64.

So, for bridge mode to work, it is necessary to differentiate between
"where do we need to branch to to handle a trap" and "where is &generictrap
for purposes of doing relative math".

Introduce a new TRAP_ENTRY and use it instead of TRAP_GENTRAP for doing
actual calls to the generic trap handler.

Reported by: Mark Millard <marklmi@yahoo.com>
Reviewed by: jhibbits
Sponsored by: Tag1 Consulting, Inc.
Differential Revision: https://reviews.freebsd.org/D23057

show more ...

MFHead @349476

Sponsored by: The FreeBSD Foundation

powerpc/booke: Handle misaligned floating point loads/stores as on AIM

Misaligned floating point loads and stores are already handled for AIM, but
use the DSISR to obtain the necessary data. Book-E

powerpc/booke: Handle misaligned floating point loads/stores as on AIM

Misaligned floating point loads and stores are already handled for AIM, but
use the DSISR to obtain the necessary data. Book-E does not have the DSISR,
so these fixups are not performed, leading to a SIGBUS on misaligned FP
loads or stores. Obtain the necessary data on the Book-E side, similar to
how is done for SPE.

MFC after: 1 week

show more ...

MFHead@r345880

powerpc: Allow emulating optional FPU instructions on CPUs with an FPU

The e5500 has an FPU, but lacks the optional fsqrt instruction. This
instruction gets emulated in the kernel, but the emulatio

powerpc: Allow emulating optional FPU instructions on CPUs with an FPU

The e5500 has an FPU, but lacks the optional fsqrt instruction. This
instruction gets emulated in the kernel, but the emulation uses stale data,
from the last switch out, and does not return the result of the operation
immediately. Fix both of these conditions by saving and restoring the FPRs
around the emulation point.

MFC after: 1 week
MFC with: r345829

show more ...

MFHead@r345677

powernv: Add Hypervisor Maintenance Interrupt handler

Attempting to build www/firefox on POWER9 resulted in a HMI exception being
thrown, a fatal trap currently. This is typically caused by timer f

powernv: Add Hypervisor Maintenance Interrupt handler

Attempting to build www/firefox on POWER9 resulted in a HMI exception being
thrown, a fatal trap currently. This is typically caused by timer facility
errors, but examination of the Hypervisor Maintenance Exception Register
(HMER) yielded only that an exception had recovered, with no information of
the actual exception cause.

When an HMI occurs, OPAL_HANDLE_HMI or OPAL_HANDLE_HMI2 must be called to
handle the exception at the firmware level. If the exception is handled, we
can continue.

This adds only the preliminary handler, enough to prevent package building
from panicking. An enhancement in the future is to use the flags returned
by OPAL_HANDLE_HMI2 to print more useful error messages, and log maintenance
events.

Reviewed by: luporl
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D19634

show more ...

Merge ^/head r341764 through r341812.