Revert "pcb.h: mark struct pcb to be preserved"

kgdb only uses the marked fields from dumppcb for initial frame
reconstruction.

This reverts commit 8f23665fed2fbaf4481359b4d2fcdd7b9feb40e3.

pcb.h: mark struct pcb to be preserved

There are programs that depend on this structure (e.g. kernel debuggers)
that breaks when the ABI changes.

Signed-off-by: Minsoo Choo <minsoochoo0122@proton.m

pcb.h: mark struct pcb to be preserved

There are programs that depend on this structure (e.g. kernel debuggers)
that breaks when the ABI changes.

Signed-off-by: Minsoo Choo <minsoochoo0122@proton.me>
Reviewed by: kib
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D55149

show more ...

powerpc: Fix multiple issues with FP/VSX save/restore

Multiple issues existed within the powerpc FP/VSX save/restore functionality,
leading to register corruption and loss of register contents in sp

powerpc: Fix multiple issues with FP/VSX save/restore

Multiple issues existed within the powerpc FP/VSX save/restore functionality,
leading to register corruption and loss of register contents in specific
scenarios involving high signal load and use of both floating point and VSX
instructions.

Issue #1

On little endian systems the PCB used the wrong location for the shadowed
FP register within the larger VSX register. This appears to have been an
attempt to correct issue #2 without understanding how the vector load/store
instructions actually operate.

Issue #2

On little endian systems, the VSX state save/restore routines swapped 32-bit
words within the 64-bit aliased double word for the associated floating point
register. This was due to the use of a word-oriented load/store vs. doubleword
oriented load/store.

Issue #3

The FPU was turned off in the PCB but not in hardware, leading to a potential
race condition if the same thread was scheduled immediately after sigreturn.

The triggering codebase for this is Go, which makes heavy use of signals and
and generates an unusual mix of floating point and VSX assembler. As a result,
when combined with th powerpc lazy FPU restore, a condition was repeatedly hit
whereby the thread was interrupted in FP+VSX mode, then restored in FP only
mode, thus reliably triggering the issues above.

Also clean up the associated asm() style issue flagged by GitHub Actions.

Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>

MFC after: 1 week
Pull Request: https://github.com/freebsd/freebsd-src/pull/1756

show more ...

powerpc: Implement fpu_kern_enter/fpu_kern_leave

Summary:
Provide an implementation of fpu_kern_enter/fpu_kern_leave for PPC to
enable FPU, VSX, and Altivec usage in-kernel. The functions currently

powerpc: Implement fpu_kern_enter/fpu_kern_leave

Summary:
Provide an implementation of fpu_kern_enter/fpu_kern_leave for PPC to
enable FPU, VSX, and Altivec usage in-kernel. The functions currently
only support FPU_KERN_NOCTX, but this is sufficient for ossl(1) and many
other users of the API.

This patchset has been tested on powerpc64le using a modified version of
the in-tree tools/tools/crypto/cryptocheck.c tool to check for FPU/Vec
register clobbering along with a follow-up patch to enable ossl(4) on
powerpc64*.

Reviewed by: jhibbits
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D41540

show more ...

Revert "powerpc: Implement fpu_kern_enter/fpu_kern_leave"

This reverts commit 6a47fa697ace42851b44498a53446b29b2593316.

Need to correct authorship.

powerpc: Implement fpu_kern_enter/fpu_kern_leave

Summary:
Provide an implementation of fpu_kern_enter/fpu_kern_leave for PPC to
enable FPU, VSX, and Altivec usage in-kernel. The functions currently

powerpc: Implement fpu_kern_enter/fpu_kern_leave

Summary:
Provide an implementation of fpu_kern_enter/fpu_kern_leave for PPC to
enable FPU, VSX, and Altivec usage in-kernel. The functions currently
only support FPU_KERN_NOCTX, but this is sufficient for ossl(1) and many
other users of the API.

This patchset has been tested on powerpc64le using a modified version of
the in-tree tools/tools/crypto/cryptocheck.c tool to check for FPU/Vec
register clobbering along with a follow-up patch to enable ossl(4) on
powerpc64*.

Reviewed by: jhibbits
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D41540

show more ...

sys: Remove $FreeBSD$: one-line .h pattern

Remove /^\s*\*+\s*\$FreeBSD\$.*$\n/

[PowerPC64LE] Fix LE VSX/fpr interop

In the PCB struct, we need to match the VSX register file layout
correctly, as the VSRs shadow the FPRs.

In LE, we need to have a dword of padding before the fp

[PowerPC64LE] Fix LE VSX/fpr interop

In the PCB struct, we need to match the VSX register file layout
correctly, as the VSRs shadow the FPRs.

In LE, we need to have a dword of padding before the fprs so they end up
on the correct side, as the struct may be manipulated by either the FP
routines or the VSX routines.

Additionally, when saving and restoring fprs, we need to explicitly target
the fpr union member so it gets offset correctly on LE.

Fixes weirdness with FP registers in VSX-using programs (A FPR that was
saved by the FP routines but restored by the VSX routines was becoming 0
due to being loaded to the wrong side of the VSR.)

Original patch by jhibbits.

Reviewed by: jhibbits
Differential Revision: https://reviews.freebsd.org/D27431

show more ...

powerpc: clean up empty lines in .c and .h files

[PPC] Fix wrong comment

pcb_context[20] holds r12-r31 and not r14-r31, as the comment said.

MFHead @347527

Sponsored by: The FreeBSD Foundation

powerpc: Add support for additional FSCR-managed facilities

Add support to enable, save, and restore the following facilities:
* Target Address Register (bctar) -- seemingly just another register to

powerpc: Add support for additional FSCR-managed facilities

Add support to enable, save, and restore the following facilities:
* Target Address Register (bctar) -- seemingly just another register to
branch to.
* Event-based branching -- an interrupt-like userspace event handler
subsystem.
* Load-monitored facility -- A facility that allows monitoring a range of
physical memory, and triggering an event on access. Targeted to garbage
collection software features.

show more ...

powerpc64: Add the DSCR facility on POWER8 and later

The Data Stream Control Register (DSCR) is privileged on POWER7, but
unprivileged (different register) on POWER8 and later. However, it's now
gu

powerpc64: Add the DSCR facility on POWER8 and later

The Data Stream Control Register (DSCR) is privileged on POWER7, but
unprivileged (different register) on POWER8 and later. However, it's now
guarded by a new register, the Facility Status and Control Register, instead of
the MSR like other pre-existing facilities (FPU, Altivec). The FSCR must be
managed explicitly, since it's effectively an extension of the MSR.

Tested by: Brandon Bergren

show more ...

Merge ^/head r340427 through r340868.

powerpc: Sync icache on SIGILL, in case of cache issues

The update of jemalloc to 5.1.0 exposed a cache syncing issue on a Freescale
e500 base system. There was already code in the FPU emulator to

powerpc: Sync icache on SIGILL, in case of cache issues

The update of jemalloc to 5.1.0 exposed a cache syncing issue on a Freescale
e500 base system. There was already code in the FPU emulator to address
this, but it was limited to a single static variable, and did not attempt to
sync the cache. This pulls that out to the higher level program exception
handler, and syncs the cache.

If a SIGILL is hit a second time at the same address, it will be treated as
a real illegal instruction, and handled accordingly.

show more ...

Merge ^/head r338392 through r338594.

powerpc64: Add initial support for HTM (kABI)

This patch adds the very initial support for HTM that might come at FreeBSD
version 12.1. This basic support defines a new kABI, so, we do not need to c

powerpc64: Add initial support for HTM (kABI)

This patch adds the very initial support for HTM that might come at FreeBSD
version 12.1. This basic support defines a new kABI, so, we do not need to change
it later during 12.1 time frame, when the full implementation will come.

Reviewed by: jhibbits
Approved by: re(marius), jhibbits (mentor)
Differential Revision: https://reviews.freebsd.org/D16889

show more ...

powerpc: Fix multiple issues with FP/VSX save/restore

Multiple issues existed within the powerpc FP/VSX save/restore functionality,
leading to register corruption and loss of register contents in sp

powerpc: Fix multiple issues with FP/VSX save/restore

Multiple issues existed within the powerpc FP/VSX save/restore functionality,
leading to register corruption and loss of register contents in specific
scenarios involving high signal load and use of both floating point and VSX
instructions.

Issue #1

On little endian systems the PCB used the wrong location for the shadowed
FP register within the larger VSX register. This appears to have been an
attempt to correct issue #2 without understanding how the vector load/store
instructions actually operate.

Issue #2

On little endian systems, the VSX state save/restore routines swapped 32-bit
words within the 64-bit aliased double word for the associated floating point
register. This was due to the use of a word-oriented load/store vs. doubleword
oriented load/store.

Issue #3

The FPU was turned off in the PCB but not in hardware, leading to a potential
race condition if the same thread was scheduled immediately after sigreturn.

The triggering codebase for this is Go, which makes heavy use of signals and
and generates an unusual mix of floating point and VSX assembler. As a result,
when combined with th powerpc lazy FPU restore, a condition was repeatedly hit
whereby the thread was interrupted in FP+VSX mode, then restored in FP only
mode, thus reliably triggering the issues above.

Also clean up the associated asm() style issue flagged by GitHub Actions.

Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>

MFC after: 1 week
Pull Request: https://github.com/freebsd/freebsd-src/pull/1756

show more ...

powerpc: Implement fpu_kern_enter/fpu_kern_leave

Summary:
Provide an implementation of fpu_kern_enter/fpu_kern_leave for PPC to
enable FPU, VSX, and Altivec usage in-kernel. The functions currently

powerpc: Implement fpu_kern_enter/fpu_kern_leave

Summary:
Provide an implementation of fpu_kern_enter/fpu_kern_leave for PPC to
enable FPU, VSX, and Altivec usage in-kernel. The functions currently
only support FPU_KERN_NOCTX, but this is sufficient for ossl(1) and many
other users of the API.

This patchset has been tested on powerpc64le using a modified version of
the in-tree tools/tools/crypto/cryptocheck.c tool to check for FPU/Vec
register clobbering along with a follow-up patch to enable ossl(4) on
powerpc64*.

Reviewed by: jhibbits
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D41540

show more ...

Revert "powerpc: Implement fpu_kern_enter/fpu_kern_leave"

This reverts commit 6a47fa697ace42851b44498a53446b29b2593316.

Need to correct authorship.

powerpc: Implement fpu_kern_enter/fpu_kern_leave

Summary:
Provide an implementation of fpu_kern_enter/fpu_kern_leave for PPC to
enable FPU, VSX, and Altivec usage in-kernel. The functions currently

powerpc: Implement fpu_kern_enter/fpu_kern_leave

Summary:
Provide an implementation of fpu_kern_enter/fpu_kern_leave for PPC to
enable FPU, VSX, and Altivec usage in-kernel. The functions currently
only support FPU_KERN_NOCTX, but this is sufficient for ossl(1) and many
other users of the API.

This patchset has been tested on powerpc64le using a modified version of
the in-tree tools/tools/crypto/cryptocheck.c tool to check for FPU/Vec
register clobbering along with a follow-up patch to enable ossl(4) on
powerpc64*.

Reviewed by: jhibbits
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D41540

show more ...

sys: Remove $FreeBSD$: one-line .h pattern

Remove /^\s*\*+\s*\$FreeBSD\$.*$\n/

[PowerPC64LE] Fix LE VSX/fpr interop

In the PCB struct, we need to match the VSX register file layout
correctly, as the VSRs shadow the FPRs.

In LE, we need to have a dword of padding before the fp

[PowerPC64LE] Fix LE VSX/fpr interop

In the PCB struct, we need to match the VSX register file layout
correctly, as the VSRs shadow the FPRs.

In LE, we need to have a dword of padding before the fprs so they end up
on the correct side, as the struct may be manipulated by either the FP
routines or the VSX routines.

Additionally, when saving and restoring fprs, we need to explicitly target
the fpr union member so it gets offset correctly on LE.

Fixes weirdness with FP registers in VSX-using programs (A FPR that was
saved by the FP routines but restored by the VSX routines was becoming 0
due to being loaded to the wrong side of the VSR.)

Original patch by jhibbits.

Reviewed by: jhibbits
Differential Revision: https://reviews.freebsd.org/D27431

show more ...

powerpc: clean up empty lines in .c and .h files

[PPC] Fix wrong comment

pcb_context[20] holds r12-r31 and not r14-r31, as the comment said.