arm64: Reduce where we decode msr/mrs instructions

We only use the mrs_Op* and mrs_CR* functions and MRS_* macros when
handling userspace executing a msr/msr instruction.

Move the macros to where t

arm64: Reduce where we decode msr/mrs instructions

We only use the mrs_Op* and mrs_CR* functions and MRS_* macros when
handling userspace executing a msr/msr instruction.

Move the macros to where they are used and expand the functions to
just use the macros directly.

While here update MRS_Op0_MASK to include bit 20 as this will cause
the correct op0 value to be calculated for all instructions we decode.

Reviewed by: Harry Moulton <harry.moulton@arm.com>
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D50214

show more ...

arm64: Start splitting out undef sys insn handling

We shouldn't need to decode the instruction when handling an unknown
SYS, MSR, or MRS instruction that raises an EXCP_MSR exception. The
exception

arm64: Start splitting out undef sys insn handling

We shouldn't need to decode the instruction when handling an unknown
SYS, MSR, or MRS instruction that raises an EXCP_MSR exception. The
exception syndrome (esr) contains all the information we need and is
safer to use than reading the instruction.

Add a new set of callbacks for these instructions that we can pass in
either the esr from hardware, or a generated version when we have to
fall back to instruction decoding.

Reviewed by: harry.moulton_arm.com
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D50208

show more ...

arm64: Split out the 32-bit undef handling

Rather than checking in the handler if we are in a 32 or 64 bit
process have two lists to iterate over.

Reviewed by: harry.moulton_arm.com
Sponsored by: A

arm64: Split out the 32-bit undef handling

Rather than checking in the handler if we are in a 32 or 64 bit
process have two lists to iterate over.

Reviewed by: harry.moulton_arm.com
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D50207

show more ...

arm64: Remove kernel undef instruction support

Now we don't handle any undefined instructions in the kernel remove
the support to handle them. The kernel should only ever execute valid
instructions.

arm64: Remove kernel undef instruction support

Now we don't handle any undefined instructions in the kernel remove
the support to handle them. The kernel should only ever execute valid
instructions. The only case it needed to handle was an old emulator
that is now well out of support, and the handler for this has been
removed.

Reviewed by: harry.moulton_arm.com
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D50205

show more ...

sys: Remove $FreeBSD$: two-line .h pattern

Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/

Move ID reading signatures to a better header

The functions to read the common user and kernel ID registers should be
in cpu.h rather than undefined.h as they are related to CPU details and
used by

Move ID reading signatures to a better header

The functions to read the common user and kernel ID registers should be
in cpu.h rather than undefined.h as they are related to CPU details and
used by undefined instruction handlers.

Sponsored by: Innovate UK

show more ...

Create a kernel arm64 ID register view

In preparation for using ifuncs in the kernel is is useful to have a common
view of the arm64 ID registers across all CPUs. Add this and extract the
logic for

Create a kernel arm64 ID register view

In preparation for using ifuncs in the kernel is is useful to have a common
view of the arm64 ID registers across all CPUs. Add this and extract the
logic for finding the lower value of two fields to a new helper function.

Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D25463

show more ...

Allow the userspace ID register fields to be read from the kernel

To allow consistent values to be used in both the kernel and userspace
create a function for these to be read from the kernel. They

Allow the userspace ID register fields to be read from the kernel

To allow consistent values to be used in both the kernel and userspace
create a function for these to be read from the kernel. They use a newly
created macro with the name of the ID register to read. For now there is
redundant information in the user_regs array as it still holds the CRm and
Op2 values, however this will be fixed in a later change.

This will be used by ptrace to allow hardware breakpoints in userspace.

Sponsored by: DARPA, AFRL

show more ...

Move the MRS instruction decode macros to armreg.h

These instructions are used to access the registers described in armreg.h,
and will be used in a future change to create a per-register identificat

Move the MRS instruction decode macros to armreg.h

These instructions are used to access the registers described in armreg.h,
and will be used in a future change to create a per-register identification
macro.

Sponsored by: DARPA, AFRL

show more ...

MFH r338661 through r339200.

Sponsored by: The FreeBSD Foundation

Merge ^/head r338731 through r338987.

Move the undefined instruction handler to identcpu.c so we have access
to the registers from boot.

Approved by: re (kib)
Sponsored by: ABT Systems Ltd
Differential Revision: https://reviews.freebsd.

Move the undefined instruction handler to identcpu.c so we have access
to the registers from boot.

Approved by: re (kib)
Sponsored by: ABT Systems Ltd
Differential Revision: https://reviews.freebsd.org/D17301

show more ...

arm64: Reduce where we decode msr/mrs instructions

We only use the mrs_Op* and mrs_CR* functions and MRS_* macros when
handling userspace executing a msr/msr instruction.

Move the macros to where t

arm64: Reduce where we decode msr/mrs instructions

We only use the mrs_Op* and mrs_CR* functions and MRS_* macros when
handling userspace executing a msr/msr instruction.

Move the macros to where they are used and expand the functions to
just use the macros directly.

While here update MRS_Op0_MASK to include bit 20 as this will cause
the correct op0 value to be calculated for all instructions we decode.

Reviewed by: Harry Moulton <harry.moulton@arm.com>
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D50214

show more ...

arm64: Start splitting out undef sys insn handling

We shouldn't need to decode the instruction when handling an unknown
SYS, MSR, or MRS instruction that raises an EXCP_MSR exception. The
exception

arm64: Start splitting out undef sys insn handling

We shouldn't need to decode the instruction when handling an unknown
SYS, MSR, or MRS instruction that raises an EXCP_MSR exception. The
exception syndrome (esr) contains all the information we need and is
safer to use than reading the instruction.

Add a new set of callbacks for these instructions that we can pass in
either the esr from hardware, or a generated version when we have to
fall back to instruction decoding.

Reviewed by: harry.moulton_arm.com
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D50208

show more ...

arm64: Split out the 32-bit undef handling

Rather than checking in the handler if we are in a 32 or 64 bit
process have two lists to iterate over.

Reviewed by: harry.moulton_arm.com
Sponsored by: A

arm64: Split out the 32-bit undef handling

Rather than checking in the handler if we are in a 32 or 64 bit
process have two lists to iterate over.

Reviewed by: harry.moulton_arm.com
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D50207

show more ...

arm64: Remove kernel undef instruction support

Now we don't handle any undefined instructions in the kernel remove
the support to handle them. The kernel should only ever execute valid
instructions.

arm64: Remove kernel undef instruction support

Now we don't handle any undefined instructions in the kernel remove
the support to handle them. The kernel should only ever execute valid
instructions. The only case it needed to handle was an old emulator
that is now well out of support, and the handler for this has been
removed.

Reviewed by: harry.moulton_arm.com
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D50205

show more ...

sys: Remove $FreeBSD$: two-line .h pattern

Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/

Move ID reading signatures to a better header

The functions to read the common user and kernel ID registers should be
in cpu.h rather than undefined.h as they are related to CPU details and
used by

Move ID reading signatures to a better header

The functions to read the common user and kernel ID registers should be
in cpu.h rather than undefined.h as they are related to CPU details and
used by undefined instruction handlers.

Sponsored by: Innovate UK

show more ...

Create a kernel arm64 ID register view

In preparation for using ifuncs in the kernel is is useful to have a common
view of the arm64 ID registers across all CPUs. Add this and extract the
logic for

Create a kernel arm64 ID register view

In preparation for using ifuncs in the kernel is is useful to have a common
view of the arm64 ID registers across all CPUs. Add this and extract the
logic for finding the lower value of two fields to a new helper function.

Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D25463

show more ...

Allow the userspace ID register fields to be read from the kernel

To allow consistent values to be used in both the kernel and userspace
create a function for these to be read from the kernel. They

Allow the userspace ID register fields to be read from the kernel

To allow consistent values to be used in both the kernel and userspace
create a function for these to be read from the kernel. They use a newly
created macro with the name of the ID register to read. For now there is
redundant information in the user_regs array as it still holds the CRm and
Op2 values, however this will be fixed in a later change.

This will be used by ptrace to allow hardware breakpoints in userspace.

Sponsored by: DARPA, AFRL

show more ...

Move the MRS instruction decode macros to armreg.h

These instructions are used to access the registers described in armreg.h,
and will be used in a future change to create a per-register identificat

Move the MRS instruction decode macros to armreg.h

These instructions are used to access the registers described in armreg.h,
and will be used in a future change to create a per-register identification
macro.

Sponsored by: DARPA, AFRL

show more ...

MFH r338661 through r339200.

Sponsored by: The FreeBSD Foundation

Merge ^/head r338731 through r338987.

Move the undefined instruction handler to identcpu.c so we have access
to the registers from boot.

Approved by: re (kib)
Sponsored by: ABT Systems Ltd
Differential Revision: https://reviews.freebsd.

Move the undefined instruction handler to identcpu.c so we have access
to the registers from boot.

Approved by: re (kib)
Sponsored by: ABT Systems Ltd
Differential Revision: https://reviews.freebsd.org/D17301

show more ...

Merge ^/head r323559 through r325504.