| #
2a63c3be
|
| 16-Aug-2023 |
Warner Losh <imp@FreeBSD.org> |
Remove $FreeBSD$: one-line .c comment pattern
Remove /^/[*/]\s*\$FreeBSD\$.*\n/
|
| #
2a63c3be
|
| 16-Aug-2023 |
Warner Losh <imp@FreeBSD.org> |
Remove $FreeBSD$: one-line .c comment pattern
Remove /^/[*/]\s*\$FreeBSD\$.*\n/
|
| #
0bfd163f
|
| 18-Oct-2013 |
Gleb Smirnoff <glebius@FreeBSD.org> |
Merge head r233826 through r256722.
|
| #
1ccca3b5
|
| 10-Oct-2013 |
Alan Somers <asomers@FreeBSD.org> |
IFC @256277
Approved by: ken (mentor)
|
| #
27650413
|
| 02-Oct-2013 |
Mark Murray <markm@FreeBSD.org> |
MFC - tracking update.
|
| #
ef90af83
|
| 20-Sep-2013 |
Peter Grehan <grehan@FreeBSD.org> |
IFC @ r255692
Comment out IA32_MISC_ENABLE MSR access - this doesn't exist on AMD.
Need to sort out how arch-specific MSRs will be handled.
|
| #
d466a5b0
|
| 11-Sep-2013 |
Simon J. Gerraty <sjg@FreeBSD.org> |
Merge head
|
| #
47823319
|
| 11-Sep-2013 |
Peter Grehan <grehan@FreeBSD.org> |
IFC @ r255459
|
| #
0a10f22a
|
| 07-Sep-2013 |
Andrew Turner <andrew@FreeBSD.org> |
On ARM EABI double precision floating point values are stored in the
endian the CPU is in, i.e. little-endian on most ARM cores.
This allows ARMv4 and ARMv5 boards to boot with the ARM EABI.
|
| #
cfe30d02
|
| 19-Jun-2013 |
Gleb Smirnoff <glebius@FreeBSD.org> |
Merge fresh head.
|
| #
d241a0e6
|
| 26-Feb-2013 |
Xin LI <delphij@FreeBSD.org> |
IFC @247348.
|
| #
d9a44755
|
| 08-Feb-2013 |
David E. O'Brien <obrien@FreeBSD.org> |
Sync with HEAD.
|
| #
1b54fbe6
|
| 09-Jan-2013 |
Neel Natu <neel@FreeBSD.org> |
IFC @ r245178
|
| #
955c8cbb
|
| 06-Jan-2013 |
Andrew Turner <andrew@FreeBSD.org> |
Silence a clang warning by telling it we are only interested in left
shifting the lower 32bits of the floating point value when we demangle it.
|
| #
0bfd163f
|
| 18-Oct-2013 |
Gleb Smirnoff <glebius@FreeBSD.org> |
Merge head r233826 through r256722.
|
| #
1ccca3b5
|
| 10-Oct-2013 |
Alan Somers <asomers@FreeBSD.org> |
IFC @256277
Approved by: ken (mentor)
|
| #
27650413
|
| 02-Oct-2013 |
Mark Murray <markm@FreeBSD.org> |
MFC - tracking update.
|
| #
ef90af83
|
| 20-Sep-2013 |
Peter Grehan <grehan@FreeBSD.org> |
IFC @ r255692
Comment out IA32_MISC_ENABLE MSR access - this doesn't exist on AMD.
Need to sort out how arch-specific MSRs will be handled.
|
| #
d466a5b0
|
| 11-Sep-2013 |
Simon J. Gerraty <sjg@FreeBSD.org> |
Merge head
|
| #
47823319
|
| 11-Sep-2013 |
Peter Grehan <grehan@FreeBSD.org> |
IFC @ r255459
|
| #
0a10f22a
|
| 07-Sep-2013 |
Andrew Turner <andrew@FreeBSD.org> |
On ARM EABI double precision floating point values are stored in the
endian the CPU is in, i.e. little-endian on most ARM cores.
This allows ARMv4 and ARMv5 boards to boot with the ARM EABI.
|
| #
cfe30d02
|
| 19-Jun-2013 |
Gleb Smirnoff <glebius@FreeBSD.org> |
Merge fresh head.
|
| #
d241a0e6
|
| 26-Feb-2013 |
Xin LI <delphij@FreeBSD.org> |
IFC @247348.
|
| #
d9a44755
|
| 08-Feb-2013 |
David E. O'Brien <obrien@FreeBSD.org> |
Sync with HEAD.
|
| #
1b54fbe6
|
| 09-Jan-2013 |
Neel Natu <neel@FreeBSD.org> |
IFC @ r245178
|